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This paper presents an improved correlation-based timing-skew calibration strategy with constant input impedance characteristics. A full sampling rate operating time-interleaved reference ADC (TI-RADC) whose interleaving factor is coprime with TI-ADC is introduced to replace the conventional single-channel reference ADC. This paper theoretically demonstrates that by setting an appropriate time interval between the sampling edge of TI-ADC and TI-RADC and aligning the sampling edge of each channel in TI-ADC with each other but not with the reference ADC, the skew of the TI-RADC would not affect the timing skew calibration of the TI-ADC. A prototype 13-bit 2-GS/s 8-way TI pipelined SAR ADC employing a 1-bit 3-way TI-RADC is fabricated in 28-nm process to verify the presented calibration strategy. Measurement results demonstrate the correctness of the calibration strategy and reveal that compared with using single-channel reference ADC operating at a decimated sampling rate, the spurs resulting from the time-variant input impedance are suppressed more than 20 dB. The prototype ADC achieves an SNDR of 60.36 dB with a near Nyquist rate input when operating at 2-GS/s. The power consumption of the prototype ADCis 252.6 mW (Including the 4.1 mW estimated digital calibration), which translates into a Walden FoM of 148.3-fJ/conversion-step. [ABSTRACT FROM AUTHOR]

This paper is concerned with the secure estimation problem for the state of charge of Lithium-ion batteries subject to malicious attacks during the data transmission from sensors to cloud-based battery management system terminal. First, the second-order resistance-capacitance equivalent circuit model, whose parameters are identified by Kalman filter in an off-line manner, is introduced to describe the internal dynamics of lithium-ion batteries. Then, by applying the $\chi ^{2}$ detection mechanism, real-time malicious attacks are first detected and then a secure estimator is designed to suppress the influence of attacks on the estimation performance. An upper bound of the filtering error covariance is determined by solving certain coupled Riccati-like equations, and the filter parameter is obtained by minimizing such an upper bound at each time step. Finally, the validity of the proposed attack detection approach and the effectiveness of the developed estimation scheme are verified by experiment results under Federal Urban Driving Schedule condition. [ABSTRACT FROM AUTHOR]

This paper presents an iterative decimation approach to significantly alleviate the computational burden of centralized controllers applying real-time recursive system identification algorithms in multi-rail power converters. The proposed approach uses an adaptive update rate as opposed to the fixed update rate used in conventional adaptive filters. Also, the step size/forgetting factors vary at different iteration stages. As a result, a reduced computational burden and faster model update can be achieved. Besides, recursive algorithms, such as Recursive Least Square (RLS), Fast Affine Projection (FAP) and Kalman Filter (KF), contain two important updates per iteration cycle; Covariance Matrix Approximation (CMA) update and Gradient Vector (GV) update. Usually, the CMA update requires the greater computational effort than the GV update. Therefore, in circumstances where the sampled data in the regressor does not experience significant fluctuations, re-using the CMA, calculated from the last iteration cycle for the current update can result in computational cost savings for real-time system identification. In this paper, both iteration rate adjustment and CMA re-cycling are combined and applied to simultaneously identify the power converter models in a three-rail power conversion architecture. [ABSTRACT FROM AUTHOR]

This paper proposes a novel all-digital background calibration of timing mismatch for a time-interleaved analog-to-digital converter (TIADC). For two different calibration strategies, the absolute calibration and the relative calibration, the inductive expressions of modulation matrices are derived from the coefficient matrices provided by different estimation methods. Based on the modulation matrix, we develop a digital calibration architecture, which enables the output of TIADC to be modulated firstly before being corrected, so the costly matrix multiplication processing can be avoided. This calibration architecture also enables the estimation process of each channel to be independent and can be executed simultaneously, which accelerates the convergence speed of the timing mismatch. We show the efficiency of the calibration structure by simulations, including examples from the literature. Numerical simulation demonstrates that the convergence speed of the timing mismatch has been improved by at least 27%, compared with the estimation method depending on the specified reference channel. The result of FPGA-based hardware implementation shows that the spurious-free dynamic range (SFDR) is improved by 37.63dB. [ABSTRACT FROM AUTHOR]

Neural networks (NNs) with large scales of artificial neurons are increasingly used in recognition and classification tasks. In power-constrained scenarios, the tradeoff between performance and hardware consumptions must be carefully evaluated before silicon tape-out. In this paper, we proposed a systematic approach to design ultra-low power NN system. This work is motivated by the facts that NNs are resilient to approximation in many of the computations and NNs are outputting statistical tensors which are acceptable to less-than-perfect results. We resort to the front-back end approach with a twofold aim: (1) a fast and accurate design approach is proposed by estimating the computing quality of low-power approximate adder arrays, and it is adopted to evaluate the neural network system; (2) a quality configurable engine with different approximation degrees while processing NNs is implemented. The proposed work is demonstrated with a comprehensive keyword spotting (KWS) system as an ultra-low power NN engine. The experimental environment is setup with ten keywords from the google speech command dataset (GSCD) using an industrial 22-nm ultra-low-leakage (ULL) process. Comparing to the state-of-the-art KWS processors, the proposed approximate NN engine can demonstrate over 60% improvement in power efficiency and $1.1\times $ area efficiency while achieving similar recognition accuracy. [ABSTRACT FROM AUTHOR]

Multiple Signal Classification (MUSIC) is a high-performance Direction of Arrival (DOA) estimation algorithm, which has been widely used. The algorithm needs to calculate the covariance matrix, eigenvalue decomposition and spectral peak search. In the paper, the hardware structure of the existing Jacobi algorithm for Hermitian matrices is proposed. On this basis, a novel hardware acceleration of the MUSIC algorithm for sparse arrays and uniform linear arrays is proposed, and the sparse array is a nested array. There are two designs, Design 1 supports 1~10 nested array elements or 1~32 uniform linear array elements, distinguishes 1~32 sources, configures snapshots 1~2048, and the maximum number of iterations and iteration accuracy of the complex Jacobi algorithm. Design 2 only needs $101.8~\mu $ s to complete a DOA estimation when the number of array elements is 8, the number of sources is 1, and the snapshots is 128. In more detail, the Root Mean Squared Error (RMSE) of both can reach 0.03°. The logic resources on the Zynq-7000 development board are 14,761 and 28,305 Look-Up Tables (LUTs), respectively. [ABSTRACT FROM AUTHOR]

This paper proposes a battery management system, including a fast battery charger, battery aging diagnosis, and charge estimation and balancing. The charger adopts a single-inductor single-input dual-output architecture to achieve charge balancing among battery cells. Interleaved pulse charging is proposed to reduce the charging time and slow down the aging process of batteries as well. This method also significantly suppresses the variations of the temperature of battery cells and is beneficial to the implementation of charge balancing. An artificial neural network is proposed to detect the state of health (SOH) of battery cells and improve the accuracy of the state of charge (SOC) estimation. The prototype is implemented in TSMC 0.35- $\mu \text{m}$ process and TensorFlow tools are used. Measurement results show that the interleaved pulse charging reduces 30% variation of the battery temperature and saves 24% charging time when charging four battery cells concurrently. A mean absolute error of SOC estimation of 0.35% is achieved in this work. [ABSTRACT FROM AUTHOR]

Sparse recovery algorithms are integral to compressed sensing (CS) as they facilitate the reconstruction of higher dimensional signals from sub-Nyquist measurements. Although Orthogonal Matching Pursuit (OMP) has been ubiquitously adopted in hardware implementations to curb the computational complexity of CS recovery, increasing sparsity levels incur higher reconstruction costs. Sparsity independent regularized pursuit (SIRP) is a recent algorithm that employs parallel index selection and regularization to curtail the number of iterations required to reconstruct the signal and thereby enhance the reconstruction speed. This paper proposes a novel reformulation of the SIRP algorithm from the hardware perspective, incorporating a cheaper regularization strategy and a modified Gram-Schmidt (MGS) based incremental QR decomposition (QRD) approach. The proposed design incorporates an iterative QRD architecture with feedback circuitry to exploit the parallelism of the triangularization step in MGS. Additionally, a fast inverse square block circumvents the need for parallel divider blocks giving considerable hardware and latency savings. The design reuses the iterative QRD block to implement the interdependent computations of the algorithm by sophisticated scheduling techniques. The proposed implementation on a Xilinx Virtex Ultrascale FPGA can recover 1024-dimensional signals from 25% measurements within $77~\mu \text{s}$ , which translates to a 37% reduction in processing cycles from state-of-art. [ABSTRACT FROM AUTHOR]

Millimeter-wave (mmWave) RF and analog front-end circuits are very susceptible to chip process and temperature variation, which cause I/Q mismatch and DC offset. As a consequence, the system performance can be seriously degraded, especially in wideband multi-Gb/s systems. This paper proposes an online estimation and compensation in the baseband receiver end of a single carrier (SC) system for TX and RX frequency independent (FI) initial and time-varying (TV) I/Q mismatch and DC-offset. Based on specification of IEEE 802.11ay, the compensated image rejection ratio (IRR) performance of the TX and RX FI I/Q mismatch effects can be improved from 16.43 dB to 54.70 dB at SNR of 25.52 dB. Moreover, we propose a novel algorithm based on the Golay sequence for estimation and compensation to cancel TX and RX initial/TV DC-offset. The DC-offset in the I/Q channel is improved from −56.46 dB/−58.56 dB to −97.30 dB/−98.70 dB at SNR of 25.52 dB. In the hardware implementation, a four-time parallelism architecture are proposed to work at a 625 MHz clock rate with a 28-nm HPC_PLUS CMOS process under 64-QAM mode for 15 Gbps transmission. Using a clock gating control scheme for FI I/Q mismatch and DC-offset estimator, the total power of the proposed the module can be reduced from 59.5 mW to 32.7 mW. The gate count and power of the proposed estimation/compensation design are only 2.94% and 1.69% of the overall digital RX baseband gate count and power consumption. [ABSTRACT FROM AUTHOR]

As is known to all that the Lyapunov-Krasovskii functional (LKF) has played a vital role in studying the fixed-time (FXT) stability of the time-delayed Filippov discontinuous systems. When investigating the FXT stability of the time-delayed discontinuous systems, the interesting topic is to provide the more relaxed conditions imposed on the LKF and obtain the more accurate settling-time (ST). This paper aims to investigate the new FXT stability lemma with more relaxed conditions for the time-delayed Filippov discontinuous systems. By using some novel inequality techniques and analytical methods, the new FXT stability lemma is established and more accurate ST is estimated. The traditional discussion about $0 < V < 1$ and $V \geq 1$ is not required. For the purpose of validation, FXT stabilization of discontinuous inertial networks with mixed time delays is considered. By using differential inclusions theory and the new FXT stability lemma, the delay-dependent FXT stabilization criteria are derived. It is the first time to derive the delay-dependent FXT stabilization criteria for the discontinuous inertial networks. Finally, examples are given to show the effectiveness of the established results. [ABSTRACT FROM AUTHOR]

This paper presents a nonlinear digital decoder (reconstruction filter) for incremental delta-sigma modulators. This decoder utilizes both the magnitude and pattern information of the modulator output to achieve accurate input estimation. Compared to the conventional linear filters with the same oversampling ratio (OSR), it can improve the converter’s signal-to-quantization noise ratio by a few dB to a few 10’s of dB with slight thermal noise performance degradation. Using the proposed decoder, the modulator’s OSR can be a few times less while achieving the same resolution and data rate, thus minimizing the modulator as well as its peripheral circuits’ energy consumption. In this paper, the proposed decoder is optimized for digital implementation, with its function being verified using a modulator prototype. This decoder is mainly designed for dc or near-dc signal conversions and it does not provide frequency notches. [ABSTRACT FROM AUTHOR]

The paper describes the FPGA implementation of a novel position evaluation algorithm based on the time difference of arrival (TDOA) principle that combines the characteristics of an Orthogonal Frequency Division Modulation (OFDM) symbol with the properties of the Zadoff-Chu mathematical sequences. The resulting system is highly scalable and its characteristics are easily adaptable to different operating scenarios. The algorithm has been implemented using the Stratix IV-E EP4SGX70HF35C3 FPGA, requiring about 112k bit of memory and less than 44k logic elements of which about 16k are registers. The paper describes the algorithm and its FPGA implementation along with experimental results validating the system performance even in the presence of multipath interferences and showing precision in target position estimation that is better than 2 cm. [ABSTRACT FROM AUTHOR]

Piecewise affine (PWA) systems are attractive models that can represent various hybrid systems with local affine subsystems and polyhedral regions due to their universal approximation properties. The identification problem of PWA systems amounts to estimating the number of subsystems, parameters of each subsystem, and the corresponding polyhedral partitions via state-input vectors. In this paper, we propose a novel approach to address the online identification problem of continuous-time PWA systems in state-space form. Specifically, an online active mode recognition algorithm and a generalized integral concurrent learning identifier are presented to acquire the number of subsystems, the switching sequence, and the parameter of each subsystem. In addition, we develop the optimization problem for the polyhedral partition estimation, which is solved by using the estimated switching sequence and subsystem parameters. The effectiveness of the proposed identification approach is demonstrated via simulation results. [ABSTRACT FROM AUTHOR]

This paper discusses finite/fixed-time (FNT/FXT) synchronization of multi-layer networks based on energy consumption estimation. Firstly, a novel FXT stability theorem of dynamical system is presented. Secondly, sufficient criteria for FNT/FXT synchronization in multi-layer networks are given, and the estimation of the energy consumption are also gained. Especially, the range of the number of layers of network is gained based on the least convergence time and the estimation of the least energy consumption. The results show that shorter synchronization time and less energy consumption does not mean less network layers. Finally, the validity of the theoretical method is verified by numerical simulation. [ABSTRACT FROM AUTHOR]

The estimation of the Direction of Arrival (DoA) is one of the most critical parameters for target recognition, identification and classification. MUltiple SIgnal Classification (MUSIC) is a powerful technique for DoA estimation. The algorithm requires complex mathematical operations like the computation of the covariance matrix for the input signals, eigenvalue decomposition and signal peak search. All these signal processing operations make real-time and resource-efficient implementation of the MUSIC algorithm on Field Programmable Gate Arrays (FPGAs) a challenge. In this paper, a novel design approach is proposed for the FPGA-implementation of the MUSIC algorithm. This approach enables a significant reduction in both FPGA resources and latency. In more detail, the proposed design enables the estimation of DoA in real-time scenarios in 2μ sec with 30% to 50% fewer resources as compared to existing techniques. [ABSTRACT FROM AUTHOR]

This paper presents a novel Look-up Table (LUT) calibration technique for static non-linearity compensation in analog-to-digital converters (ADCs) with digital redundancy, such as Successive Approximation Register (SAR), Algorithmic, Sub-ranging or Pipeline ADCs. The method compensates the performance limitations of the conventional LUT approach in presence of comparison noise and/or non-monotonicity. In these circumstances, the input-output transfer function of a redundant ADC becomes significantly multivalued - that is, different output codes can be achieved for the same input level at different time instants. This behavior is motivated because from sample to sample, in a design with redundancy, the processing signal path is not unique, causing that the error under calibration becomes time-dependent, something which is not contemplated in the conventional calibration model. To deal with this effect, this work proposes a digital low-cost post-processing of the standardized Integral-Non-linearity (INL), which resolves multivalued situations using a direct access to the internal redundant codes. The method improvements are validated by realistic SAR and Pipeline ADC case studies at behavioral level, and by experimental data from an 11-bit 60Msps Pipeline ADC implemented in a 130nm CMOS process. These experimental results show that the proposed calibration achieves an improvement of approximately 1.6 effective bits at full-scale input amplitude. [ABSTRACT FROM AUTHOR]

This paper presents a statistical model to accurately estimate post-FEC BER for high-speed wireline links using standard linear block codes, such as the RS(544,514,15) KP4 and RS(528,514,7) KR4 codes. A hierarchical approach is adopted to analyze the propagation of PAM-symbol and FEC-symbol errors through a two-layer Markov model. A series of techniques including state aggregation, time aggregation, state reduction, and dynamic programming are introduced making the time complexity to compute post-FEC BER below 10−15 reasonable. Error bounds associated with each method are found. The efficiency of the proposed model allows it to handle a larger state space, more DFE taps, and more sophisticated linear block codes than prior work. A 4-PAM 60 Gb/s wireline transceiver fabricated in a 7 nm FinFET technology is used as a test vehicle to validate this model. Measured data with two different channels reveals that the statistical model can properly predict the post-FEC error floor with standard FEC codes. While this paper demonstrates the method for capturing DFE error propagation, the method is general and can be applied to model other communication systems having memory effects. Moreover, our proposed model can be easily extended to higher-level PAM schemes and other advanced equalizer architectures to assist in making architectural choices for wireline transceivers. [ABSTRACT FROM AUTHOR]

To increase lifespan and optimize capacity utilization of lithium-ion (Li-ion) battery, it is imperative to predict its states accurately. This paper primarily focuses on offering an improved solution for estimating one of the most important battery states known as state of charge (SOC). After extensive analysis of the current state-of-the-art methods, we propose a new adaptive observer based approach for precise estimation of battery SOC using super twisting algorithm. The proposed approach avoids overestimation of gains while ensuring finite-time convergence of the states. For choosing the associated adaptive gains, it does not demand any information on upper bounds of the uncertainty and its derivative, except for their existence. Unlike most of the sliding mode methods employed for SOC estimation, the proposed approach provides continuous control injection resulting in reduced chattering and eliminates the need for low pass filter that leads to improved accuracy and response time. Lyapunov stability theory is utilized to prove the robustness and the error convergence of the proposed observer. The presented algorithm is executed on a lithium-polymer battery and the obtained results demonstrate that it outperforms the well-established approaches in terms of accuracy, chattering, robustness, computational complexity, and convergence time. [ABSTRACT FROM AUTHOR]

In this paper, the resilient control for linear discrete-time multi-agent networks subjected to unconfined cyber-attacks is investigated based on a data-driven method. Firstly, according to the evolution of the original network dynamics, a distributed data-driven estimation algorithm is presented. On this basis, a switching control law is proposed to solve the resilient consensus problem for the discrete-time multi-agent network under unconfined cyber-attacks. Further, some necessary and sufficient conditions for designing the resilient controllers are obtained by solving a nonlinear matrix inequation. Secondly, the proposed data-driven method is extended to study the resilient tracking control and formation control problems. Finally, some numerical simulations are provided to verify the effectiveness of the data-driven resilient control method. [ABSTRACT FROM AUTHOR]

This paper proposes a new design methodology to explore the state-of-the-art approximate adders for accelerator architectures conceived in the realm of multiplier-less multiple constant multiplication optimization problem. The proposed methodology is composed of: 1) a search heuristic to seek faster and feasible approximate configurations for the architectures under evaluation; 2) low-power techniques regarding hybrid approximate adders design for accelerators based on trees of shift-and-add operations; 3) high-performance evaluation by exploring parallel prefix adders and low power analysis through the use of the adder optimized by a commercial synthesis tool in the precise part of the approximate adders; and 4) energy efficiency analysis by considering both the approximate techniques and voltage over scaling estimation. Furthermore, improvements are proposed for the state-of-the-art approximate adders under evaluation in this paper. Two case studies are considered to assess the proposed methodology: 1) Gaussian image filter and 2) Sobel operator. The precise and approximate image filters were described in very high-speed integrated circuits hardware description language regarding the proposed methodology. Results are shown after synthesis to a 45-nm standard cell-based technology, where energy reductions ranging from 7.7% up to 73.2% were experienced for multiple levels of quality considering the applications under analysis. [ABSTRACT FROM AUTHOR]

To effectively use the network resources, a suitable event-driven communication scheme is proposed for the networked switched systems in this paper. Under the EDCS, a finite-time filter is designed for switched systems, which does not synchronize with the switched systems. Different from the existing finite-time problems, finite-time boundedness (FTBs) and input–output finite-time stability (IO-FTSy) are simultaneously considered in this paper. Some sufficient conditions are established to check the properties of the FTBs and the IO-FTSy of the event-driven asynchronous filtering error system by constructing a reasonable Lyapunov–Krasovskii functional and using the average dwell time approach. All the matrix inequalities can be converted to linear matrix inequalities so as to design the event-driven asynchronous filter. The applicability of the proposed filtering scheme is demonstrated via a mass-spring system model. [ABSTRACT FROM AUTHOR]

With the quick expansion of signal bandwidth in communication systems, time-interleaved Analog-to-Digital Converters (TI-ADC) provide quick pathway to very high sampling speed. Nonetheless, mismatches among the sub-ADC channels are major performance limiting factors for TI-ADCs. With the scaling of CMOS processes, all-digital background calibration techniques with blind estimation have been actively pursued in recent years to compensate for the mismatches from TI-ADCs. In this paper, a new all-digital background calibration technique is introduced. The technique achieves blind estimation by exploiting the correlation difference between the signal component and the mismatch spurs. This method can process wideband signals and can be implemented with low calibration overhead. The technique is verified with extensive simulations over a 2GS/s 12bit 16-channel ADC. Simulation shows that, with ADC mismatch spurs over −40dBc, the new technique can reliably suppress the spurs to be lower than −80dBc within the duration of about $1.2\times 10^{6}$ samples with a typical wideband OFDM (orthogonal frequency-division multiplexing) signal. [ABSTRACT FROM AUTHOR]

In order to gain substantial circuit performance improvement in terms of power, speed and area cost, approximate computing is ideally applied in many error-resilient DSP and multimedia applications by relaxing the requirements of exact computation. Fixed-width multipliers are intensively used in those applications, which makes them a good demonstration for approximation through dynamic range reduction. In this paper, a probabilistic prediction based fixed-width Booth multiplier has been proposed. The error compensation function is derived from the probabilistic analysis on the partial products obtained from Booth encoding. By slightly modifying the partial product array with dedicated partitioning, a simple compensation circuit is thus formulated. Compared with the previous works, the proposed design exhibits the best performance-accuracy tradeoff. It achieves at least 27% reduction on the area-energy-delay-error product compared with the other multipliers among various operand lengths. Additionally, the evaluation on 2-Dimensional discrete cosine transform (DCT) circuits indicates that our proposed fixed-width Booth multiplier is applicable for lossy applications with a considerable reduction on hardware expenses and power dissipation while maintaining decent output quality. [ABSTRACT FROM AUTHOR]

Interference between users in adjacent channels negatively affects throughput of mobile networks. In this paper we aim at cancellation of interference caused by a nonlinear power amplifier in a generalized orthogonal frequency division system. We propose an interference cancellation method to subtract these out-of-band emissions from the received signal. In contrast to state-of-the-art methods, our proposed method employs over-the-air estimation of power amplifier model parameters together with a particular frequency domain filtering method that allows to generate the required training data. The proposed interference cancellation method is also verified by an experiment on a software defined radio test bench. [ABSTRACT FROM AUTHOR]

Piecewise affine (PWA) models are attractive frameworks that can represent various hybrid systems with local affine submodels and polyhedral regions due to their universal approximation properties. The PWA identification problem amounts to estimating both the submodel parameters and the polyhedral partitions from data. In this paper, we propose a novel approach to address the identification problem of PWA systems such that the number of submodels, parameters of submodels, and the polyhedral partitions are obtained. In particular, a cluster-based algorithm is designed to acquire the number of submodels, the initial labeled data set, and initial parameters corresponding to each submodel. Additionally, we develop a modified self-training support vector machine algorithm to simultaneously identify the hyperplanes and parameter of each submodel with the ouputs of the cluster-based algorithm. The proposed algorithm is computationally efficient for region estimation and able to accomplish this task with only a small quantity of classified regression vectors. The effectiveness of the proposed identification approach is illustrated via simulation results. [ABSTRACT FROM AUTHOR]

As computing devices continue growing explosively, computational efficiency is increasingly important. To improve the efficiency of computations, approximate computing is widely used in today’s arithmetic circuits. For simple arithmetic units, manual approximation methods achieved high efficiency. However, with the increasing scale and complexity of the calculation circuit, the approximation efficiency of manual approximation method is gradually reduced and the difficulty of judging the approximate part is also increasing. To this end, automatic approximation methods become especially important. For automatic approximation methods, the key challenge is choosing a metric to guide the approximation process which is easy to calculate accurately and minimize the time spent on it. Therefore, modified optimal slope ranking (OSR) method is proposed in this paper for improving the metric precision and greatly reducing the time cost of approximation process. The simulation results show that the proposed method shows advantages in different circuits, including adders, fixed-width multipliers and DCT. Compared with manual approximation methods, modified OSR method achieves 16.8% lower EDP consumption than competitors on fixed-width multipliers. Compared with our previous work, the proposed method achieves an EDP advantage of 9.17% on DCT at highest accuracy mode. At the lowest accuracy, modified OSR method still maintains certain performance advantages and becomes more obvious as the circuit complexity increases for all precision modes. In terms of time consumption, modified OSR method achieves a speed increase of nearly 10% with the highest precision and a speed increase of up to $7.73\times $ for DCT at the lowest accuracy. In addition, modified OSR also provides flexible precision choices for different application scenarios. [ABSTRACT FROM AUTHOR]

This paper proposes a new nonlinear filtering technique under the Gaussian filtering approach, which is based on the numerical approximation of intractable integrals. The proposition is in the category of spherical-radial rule based Gaussian filtering (dominated by cubature Kalman filter), which is most commonly used in practical applications. The existing Gaussian filters with spherical-radial rule are accurate only for the systems modelled with polynomials of a certain order and suffer from poor estimation accuracy for the oscillatory systems. The proposed method, however, provides an efficient approach for estimation and filtering in oscillatory environment. It introduces an exponentially-fitted spherical-radial rule of numerical approximation, which is accurate for oscillatory functions. The exponentially-fitted spherical-radial rule is composed of a third-degree spherical-cubature rule and an exponentially-fitted Gauss-Laguerre quadrature rule. The proposed filter is named as exponentially-fitted cubature Kalman filter (ECKF). The estimation accuracy of the ECKF is analyzed for nonlinear filtering problems related to the Duffing and Coulomb oscillators in terms of root mean square error (RMSE). The RMSE analysis concludes an improved estimation accuracy for the proposed ECKF compared to the existing Gaussian filters. [ABSTRACT FROM AUTHOR]

Time-interleaving (TI) is a major trend for high-speed ADC designs. The major limitation of TI-ADC is the mismatches among ADC channels. Calibration techniques have been actively pursued to compensate the mismatches. In this paper, we present a new spectral calibration technique for TI-ADC. Although the technique does not run in the background, it does not need external calibration signals and has no constraint on the input signal, which is similar to blind estimation. Compared to benchmark designs, the new technique involves much less calibration hardware overhead, and calibrates all mismatches with much less time. In practice, this efficient technique can run repetitively to track the environment changes. It addresses the needs from practical TI-ADCs well. The technique is verified with extensive simulations on a 2GS/s 12-bit 16-channel ADC. With mismatch spurs over −40dBc, the technique can reliably suppress the spurs to be lower than −80dBc within about 4000 samples without the need of iteration. [ABSTRACT FROM AUTHOR]

This paper studies consensus problems of multi-agent systems with binary-valued communications. Different from most existing works, the agents considered in this paper can only get binary-valued observations of its neighbors’ states with random noises. A consensus algorithm is proposed: first, each agent estimates its neighbors’ states by the recursive projection algorithm; then, each agent designs the control timely based on the estimates. It is proved that the estimates of the states can converge to the true states with a faster convergence rate than that in the parameter estimation. Moreover, the states of the agents can achieve mean-square consensus, and the corresponding consensus speed can achieve $O(1/t)$ under certain conditions. Finally, simulations are given to demonstrate the theoretical results. [ABSTRACT FROM AUTHOR]

This paper proposes a new variable forgetting factor QRD-based recursive least squares algorithm with bias compensation (VFF-QRRLS-BC) for system identification under input noise. A new variable forgetting factor scheme is proposed to improve its convergence speed and steady-state mean squares error. A new method for recursive estimation of the additive noise variance is also proposed for reliable bias compensation. The mean and mean-square asymptotic behaviors of the algorithm are analyzed and a self-calibration scheme is further proposed to improve the steady-state mean squares error (MSE) due to finite sample effect. Simulations show that the proposed VFF approach offers improved tracking and steady-state MSE performance over the conventional recursive least squares method and its fixed FF counterpart. A linear array architecture is proposed for the realization of this algorithm and several hardware efficient techniques are introduced to avoid the expensive cubic root and division operations required. The proposed algorithm is validated on Xilinx Zynq®-7000 AP SoC ZC702 Field Programmable Gate Array (FPGA). For a 10-tap finite impulse response (FIR) system, the implementation requires only about 11.5k slice look-up table (LUT)s, 4.5k slice registers and 50 DSP48s and it can work up to about 0.58 MHz sample rate with a 200 MHz system clock. The hardware resources are considerably lower than traditional techniques using divider and cubic root realization. The linear array architecture also serves as an attractive alternative to the systolic array in medium to low rate applications due to its reduced hardware usages. [ABSTRACT FROM AUTHOR]

This paper proposes a bound-based simulation budget allocation (BSBA) procedure for solving ranking and selection (R&S) problems in simulation optimization. For many practical applications, strict bounds on system performances can be obtained through empirical and theoretical approaches. These bounds provide additional information which may help solve R&S problems. In this paper, a new method of objective function estimation is proposed using both bound information and simulation outputs. This new estimation method is demonstrated to be particularly effective. To solve R&S problems, several asymptotic optimal allocation rules are also derived. Using these allocation rules, a BSBA procedure is proposed to achieve high efficiency in identifying the best design. Numerical experiments are provided to examine the performance of the proposed BSBA procedure. The computational results show that BSBA outperforms three compared allocation procedures, especially when bounds are tight or the simulation budget is small. [ABSTRACT FROM AUTHOR]

In this paper, a novel ANOVA Kernel Kalman Filter (AKKF)-based adaptive control algorithm is introduced which is used for accurate harmonics support during operation of grid-integrated solar energy conversion system (SECS). For grid integrated SECS, a single-phase two-stage topology is considered, where local loads are attached on common point of interconnection (CPI), and a battery is attached on DC link. The AKKF is the improved form of Kalman Filter (KF), where the ANOVA Kernel (AK) trick is hybridized to improve the estimation accuracy of the KF. The objective of proposed control technique is to use this solar power to fulfil the load requirement. After satisfying the load requirement, the rest of solar power is fed to the grid. However, when the solar power is not available (in nighttime), then the system operates as Distribution Static Compensator (DSTATCOM), which provides reactive power support to the grid. The performance of the developed control technique is validated through experimentation on a developed prototype. During testing, adverse grid conditions, solar insolation variation, and load unbalance conditions are considered for satisfying the motive of the developed control technique. [ABSTRACT FROM AUTHOR]

The Hilbert space embedding provides a powerful and flexible tool for dealing with the nonlinearity and high-order statistics of random variables in a dynamical system. The kernel Kalman filtering based on the conditional embedding operator (KKF-CEO) shows significant performance improvements over the traditional Kalman filters in the noisy nonlinear time-series prediction. However, KKF-CEO based on the minimum mean-square-error (MMSE) criterion is sensitive to the outliers or heavy-tailed noises. In contrast to the MMSE criterion, the maximum correntropy criterion (MCC) can achieve more robust performance in the presence of outliers. In this paper, we develop a novel kernel Kalman-type filter based on MCC, referred to kernel Kalman filtering with conditional embedding operator and maximum correntropy criterion (KKF-CEO-MCC). The proposed KKF-CEO-MCC can capture higher order statistics of errors and is robust to outliers. In addition, two simplified versions of KKF-CEO-MCC are developed, namely, KKF-CEO-MCC-O and KKF-CEO-MCC-NA. The former is an online approach and the latter is based on Nyström approximation. Simulations on noisy nonlinear time-series prediction confirm the desirable accuracy and robustness of the new filters. [ABSTRACT FROM AUTHOR]

This paper presents an all-digital background calibration technique for the time skew mismatch in time-interleaved ADCs (TIADCs). The technique jointly estimates all of the time skew values by processing the outputs of a bank of correlators. A low-complexity sampling sequence intervention technique, suitable for successive approximation register (SAR) ADC architectures, is proposed to overcome the limitations associated with blind estimation. A two-stage digital correction mechanism based on the Taylor series is proposed to satisfy the target high-precision correction. A quantitative study is performed regarding the requirements imposed on the digital correction circuit in order to satisfy the target performance and yield, and a corresponding filter design method is proposed, which is tailored to meet these requirements. Mitchell’s logarithmic multiplier is adopted for the implementation of the principal multipliers in both the estimation and correction mechanisms, leading to a 25% area and power reduction in the estimation circuit. The proposed calibration is synthesized using a TSMC 28-nm HPL process targeting a 2.4-GHz sampling frequency for an eight-sub-ADC system. The calibration block occupies 0.03 mm2 and consumes 11 mW. The algorithm maintains the SNDR above 65 dB for a sinusoidal input within the target bandwidth. [ABSTRACT FROM AUTHOR]

This paper deals with the estimation of convergence rate and domain of attraction of control-Lyapunov functions in Lyapunov-based control. This pair of estimation problems has been considered only for input-affine systems with constraints on the input norm. In this paper, we propose a novel optimization framework to address the estimation of convergence rate and domain of attraction. Specifically, we formulate the estimation problems as min–max bilevel programs for the decay rate of the Lyapunov function, where the inner problem can be resolved using Karush–Kuhn–Tucker optimality conditions, and the resulting single-level programs can be transformed into and solved as mixed-integer nonlinear programs. The proposed approach is applicable to systems with input-nonaffinity or more general forms of input constraints under an input-convexity assumption. [ABSTRACT FROM AUTHOR]

This paper addresses the distributed estimation problem in a set membership framework. The agents of a network collect measurements which are affected by bounded errors, thus implying that the unknown parameters to be estimated belong to a suitable feasible set. Two distributed algorithms are considered, based on projections of the estimate of each agent onto its local feasible set. The main contribution of the paper is to show that such algorithms are asymptotic interpolatory estimators, i.e., they converge to an element of the global feasible set, under the assumption that the feasible set associated to each measurement is convex. The proposed techniques are demonstrated on a distributed linear regression estimation problem. [ABSTRACT FROM AUTHOR]

Blind source separation (BSS) in time-frequency (TF) domain is a versatile framework to recover sources from the recorded mixture signals in a reverberant environment. In general, a two-stage strategy is one of the popular BSS frameworks for the underdetermined BSS case (the number of mixtures is less than the number of sources), which is a tough problem due to the mixing matrix is not invertible. In this paper, we propose a new two-stage scheme combining density-based clustering and sparse reconstruction to estimate mixing matrix and sources, respectively. At the first stage, we transform the mixing matrix estimation as an eigenvector clustering problem based on a particular local dominant assumption. The eigenvectors are first exploited from the rank-one structure of local covariance matrices of mixture TF vectors. These eigenvectors are then clustered and adjusted to give estimated mixing matrix by cooperating density-based clustering and weight clustering. At the second stage, we transform the source reconstruction as a $\ell _{p}$ norm $(0 < p \leq 1)$ minimization by an iterative Lagrange multiplier method. With a proper initialization, the obtained solution is a global minimum for any $p$ in (0, 1] with convergence guarantee. The proposed approach is demonstrated to be superior to the state-of-the-art baseline methods in various underdetermined experiments. [ABSTRACT FROM AUTHOR]

This paper presents a mean absolute deviation (MAD)-based background timing-skew calibration technique for time-interleaved (TI) ADCs. It uses a single comparator-based window detector to select input samples near the zero crossing and computes their MAD value, which is used as an indicator for the timing skew. The proposed technique has low computation complexity, as it only requires taking absolute value and averaging. It also has a fast convergence speed when operating in the background with unknown random inputs, as the MAD value can be accurately estimated with a small number of samples. A prototype 10-bit 2-way TI-SAR ADC is built in 40-nm CMOS to verify the proposed technique. It achieves over 52 dB of SNDR over the entire Nyquist band. Operating at 600 MS/s, it consumes 4.7 mW, which translates to a Walden figure-of-merit of 24-fJ/conversion-step. [ABSTRACT FROM AUTHOR]

In analog fault simulation, the number one challenge is that simulation time could grow rapidly and become prohibitive as the circuit size becomes large. This paper proposes a systematic method to significantly improve the time efficiency in estimating the fault coverage for analog fault simulation. In the proposed method, a circuit under test (CUT) is first partitioned into independent sub-circuits. This is accomplished through mapping the circuit into a graph, decomposing the graph into strongly connected components (SCCs), and generating a sub-circuit for each SCC. The impacts of potential faults directly entering a sub-circuit are then simulated and recorded using the sub-circuits, which is expected to be much more time efficient than fault simulation using the whole circuit, which is much larger in size. Finally, the fault detectability at the given test points is evaluated based on the fault impacts and sensitivity among different sub-circuits. As a first step toward quick estimation of fault coverage, this paper focuses on dc tests. Simulation results show that the fault coverage of dc tests can be estimated sufficiently accurately with simulation time being reduced by 10X for the benchmark circuit, or by approximately the number of SCCs. For a much larger circuit, the number of SCCs is expected to be much larger and the time-saving factor will be much larger. [ABSTRACT FROM PUBLISHER]

This paper is concerned with the distributed $H_\infty $ filtering problem of discrete-time switched linear systems in sensor networks in face of packet dropouts and quantization. Specifically, due to the packet dropout phenomenon, the filters may lose access to the real-time switching signal of the plant. It is assumed that the maximal packet dropout number of switching signal is bounded. Then, a distributed filtering system is proposed by further considering the quantization effect. Based on the Lyapunov stability theory, a sufficient condition is obtained for the convergence of filtering error dynamics. The filter gain design is transformed into a convex optimization problem. In this paper, a quantitative relation between the switching rule missing rate and filtering performance is established. Furthermore, the upper bound of the switching rule missing rate is also calculated. Finally, the effectiveness of the proposed filter design is validated by a simulation study on the pulse-width-modulation-driven boost converter circuit. The impact of noise covariance, system dynamics, and network connectivity is studied, and some discussions are presented on how these parameters affect the filtering performance. [ABSTRACT FROM PUBLISHER]

In this paper, a time-of-flight 3-D camera is presented for indoor/outdoor high-speed applications. A three-phase algorithm is proposed using one-tap/capacitor in-pixel background light subtraction. By integrating the background light only once, the standard four-phase time-of-flight operation is done in three-phases. The use of a single tap in the proposed pixel provides background light subtraction with lower mismatch and additionally, increases the camera speed. A $24 \times 24 $ pixel array image sensor, fabricated in AMS 0.35- $\mu \text{m}$ CMOS process is characterized in 2-D and 3-D mode for background light subtraction and distance estimation. The pixel pitch is $48~\mu \text{m}$ with 17.36% fill-factor. The sensor subtracts 125-klx background light with 8.2-cm distance offset at 80-cm object distance, without using an optical filter. The background-to-signal-ratio is 32.04 dB while frame-rate of the camera is 207 and 100 fps in 2-D and 3-D mode, respectively. [ABSTRACT FROM AUTHOR]

This paper presents a generic foreground calibration algorithm that estimates and corrects memoryless nonlinear impairments in both single channel and time-interleaved analog-to-digital converters (TIADCs), and which is capable of correcting for amplifier nonlinearity, comparator offsets, and capacitance mismatch for each channel. It operates by generating, and then using, a look-up table which maps raw ADC output decision vectors to linearized output. For TIADCs, the algorithm also uses information gained during the calibration phase to estimate timing and gain mismatches among the sub-ADCs. The problem of selecting an appropriate timing reference so as to relax the requirements on the time-skew correction circuitry is statistically analyzed, as is the corresponding impact on manufacturing yield. Accordingly, a new method is proposed having superior performance; for example, in the case of an eight sub-ADC TIADC system, the proposed scheme reduces the time skew correction requirement by 44% compared with conventional methods. The architecture is instrumented with some additional circuitry to facilitate built-in self-test, allowing manufacturing test time and cost reductions. Implementation aspects are discussed, and several complexity reduction techniques are presented along with synthesis results from a Verilog implementation of the calibration engine. [ABSTRACT FROM AUTHOR]

Pulse compression (PuC) is exploited in several applications, where the impulse response of a linear system must be estimated in a noisy environment. In nondestructive testing (NDT), PuC based on frequency-modulated signals is applied with sensors of different types. The presence of sidelobes in the impulse response retrieved after the PuC is a major drawback of the method as it degrades the quality of the estimation. To limit this effect, the matched filter is usually shaped by means of windows. Here, a windowing function based on reactance transformation is proposed that outperforms the most used ones in terms of near-sidelobes level reduction and sidelobes oscillations suppression. Numerical and experimental data were used to validate the technique. It is shown that the proposed approach is particularly suitable for those NDT techniques, such as eddy current and thermography that use very broadband excitations. The proposed window function is first introduced and applied to linear frequency-modulated signals and then extended to nonlinear frequency-modulated signals, which are needed in some applications. The quite general framework introduced in this paper for designing frequency-modulated signals and optimizing sidelobes is of general validity and can be successfully exploited in any application relying on chirp PuC. [ABSTRACT FROM AUTHOR]

Traffic congestion often incurs environmental problems. One of the most effective ways to mitigate this is carpooling transportation, which substantially reduces automobile demands. Due to the popularization of smartphones and mobile applications, a carpool service can be conveniently accessed via the intelligent carpool system. In this system, the service optimization required to intelligently and adaptively distribute the carpool participant resources is called the carpool service problem (CSP). Several previous studies have examined viable and preliminary solutions to the CSP by using exact and metaheuristic optimization approaches. For CSP-solving, evolutionary computation (e.g., metaheuristics) is a more promising option in comparison to exact-type approaches. However, all the previous state-of-the-art approaches use pure optimization to solve the CSP. In this paper, we employ the framework of neuroevolution to propose the self-organizing map-based neuroevolution (SOMNE) solver by which the SOM-like network represents the abstract CSP solution and is well-trained by using neural learning and evolutionary mechanism. The experimental section of this paper investigates the comparisons and analyses of two objective functions of the CSP and demonstrates that the proposed SOMNE solver achieves superior results when compared against those the other approaches produce, especially in regard to the optimization of the primary objective functions of the CSP. Finally, the visual results of the SOM are illustrated to show the effectiveness and efficiency of the evolutionary neural learning process. [ABSTRACT FROM AUTHOR]

The performance of resonant piezoelectric vibration energy harvesters (RPVEHs) is strongly affected by the characteristics (shape, amplitude, spectrum, and so on) of the vibrations from which energy is harvested. In particular, the estimation of the power that can be harvested by a given RPVEH fed by a specific vibration source is of great importance for design purposes. A fast estimation of the extractable power allows an effective and proper sizing of the harvesting devices. This paper addresses this issue for non-sinusoidal vibration sources, filling the gap in the existing literature. To this end, an accurate and efficient analysis tool for RPVEH systems loaded by bridge rectifiers is provided. The estimation of the average extracted power as a function of the bridge rectifier dc output voltage is carried out for both weakly and non-weakly electromechanically coupled RPVEHs. A closed-form expression is provided for the case of amplitude-modulated vibrations, whereas an analytical-numerical expression is given in case of vibrations with a non-sinusoidal slowly varying envelope. Experimental tests, obtained by using a commercial RPVEH, validate the theoretical results. [ABSTRACT FROM AUTHOR]

In this paper, we present a framework for analytically estimating the output quality of common digital signal processing (DSP) blocks that utilize approximate adders. The framework is based on considering the error of approximate adders as an additive noise (approximation noise) that disturbs the output of the DSP block in question. A signal processing theoretical modeling approach for describing the power of the approximation noise which is the integral of error spectral density over the bandwidth, is developed. The output qualities of DSP blocks, such as finite impulse response filter, discrete cosine transform, and fast Fourier transform, which utilize approximate adders, are thus estimated. The accuracy of the proposed framework is evaluated by comparing mathematical model predictions to simulation results by using the signal-to-noise ratio (SNR) metric. The inaccuracy of the SNRs predicted by the framework was, on average, less than 2.5dB compared with that obtained from simulations. Therefore, a mathematical optimization approach based on Lagrange Multipliers for optimizing design parameters is also presented. The optimization is realized by choosing a proper configuration of the target block, such as determining the data width of the inexact computation part for each approximate adder in the design. [ABSTRACT FROM AUTHOR]

This paper presents a digital nonlinearity calibration technique for ADCs with strong input–output discontinuities between adjacent codes, such as pipeline, algorithmic, and SAR ADCs with redundancy. In this kind of converter, the ADC transfer function often involves multivalued regions, where conventional integral-nonlinearity (INL)-based calibration methods tend to miscalibrate, negatively affecting the ADC’s performance. As a solution to this problem, this paper proposes a novel INL-based calibration which incorporates information from the ADC’s internal signals to provide a robust estimation of static nonlinear errors for multivalued ADCs. The method is fully generalizable and can be applied to any existing design as long as there is access to internal digital signals. In pipeline or subranging ADCs, this implies access to partial subcodes before digital correction; for algorithmic or SAR ADCs, conversion bit/bits per cycle are used. As a proof-of-concept demonstrator, the experimental results for a 1.2 V 23 mW 130 nm-CMOS pipeline ADC with a SINAD of 58.4 dBc (in nominal conditions without calibration) is considered. In a stressed situation with 0.95 V of supply, the ADC has SINAD values of 47.8 dBc and 56.1 dBc, respectively, before and after calibration (total power consumption, including the calibration logic, being 15.4 mW). [ABSTRACT FROM AUTHOR]

In this paper, a statistics-based digital background calibration technique for pipelined analog-to-digital converters (ADCs) is presented. This technique employs the residue voltage probability distribution to continuously estimate and digitally eliminate the conversion errors resulted from the residue amplifier gain error and third-order nonlinearity. In order to remove the conversion errors, the proposed method evaluates and corrects the digitized residue probability distribution exploiting a two-level pseudorandom-noise sequence. Behavioral simulation results are provided for a 12-bit pipelined ADC architecture to validate the effectiveness of this scheme. The required number of conversions for convergence is approximately $5\times 10^{6}$. With calibration, the signal-to-noise and distortion ratio is improved from 49.9 to 70.9 dB. [ABSTRACT FROM AUTHOR]

In this paper, we deal with the learning problem when using an adaptive filtering method. For the learning system in filtering, the knowledge is obtained and updated based on the newly acquired information that is extracted and learned from the sequential samples over time. Effective measurement on the informativeness of a sample and reasonable subsequent treatment on the sample will improve the learning performance. This paper proposes a sequential outlier criterion for sparsification of online adaptive filtering. The method is proposed to achieve effective informativeness measurement of online filtering to obtain a more accurate and more compact network in the learning process. In the proposed method, the measurement on the samples’ informativeness is established based on the historical sequentially adjacent samples, and then the informative-measured samples are treated individually by the learning system based on whether the sample is informative, redundant, or abnormal. With our method, a more sensible learning process can be achieved with valid knowledge extracted, and the optimal network in the learning system can be obtained. Simulations based on static function estimation, Mackey-Glass time series prediction, and Lorenz chaotic time series prediction demonstrate that the proposed method can provide more effective classification on samples and more accurate networks in online adaptive filtering. [ABSTRACT FROM AUTHOR]

This paper focuses on the data-driven filtering problem on nonlinear systems with bounded noises and quantized measurements which are subject to logarithmic quantization. Because the accurate system model is unknown, an almost-optimal data-driven filter is designed from an available data set within the nonlinear set membership framework. The set is composed of system inputs and quantized measurements, which can be more easily obtained than the mathematical model. The logarithmic quantization is dependent on the fact that its quantization error serves as a multiplicative noise which widely exists in many applications. For a further improvement of estimation performance, a preliminary approximation is obtained by neural network technique. Two numerical examples are given to illustrate the effectiveness of the proposed algorithm. [ABSTRACT FROM AUTHOR]