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This paper presents a systematic approach to synthetize constant power loads using switching converters under sliding-mode control. The generation of sliding motions is analyzed in converters with a series inductor in the input port and a switching function representing the error between the input power and a suitable power reference. The analysis establishes the existence conditions for sliding-mode and the stability of the resulting ideal dynamics. Simulation and experimental results verifying the theoretical predictions in boost, Ćuk and SEPIC converters illustrate the proposal. The design procedure yields a simple, economical and small-size prototype that can be useful in the experimental validation of converters supplying constant power loads. [ABSTRACT FROM AUTHOR]

The growth of IoT applications requires DC-DC converters to have small printed circuit board (PCB) areas and high efficiency over a wide load range. A multi-mode operation of DC-DC converters, therefore, is often necessary to achieve this high efficiency over a wide load range. This paper introduces a tri-mode DC-DC buck converter for IoT applications. The tri-mode operation with PWM, PFM, and multiple-sawtooth PWM (MSPWM) modes helps to retain the high efficiency over the wide load range. The MSPWM mode also enhances a noise margin of the converter, ensuring a regular switching operation at an ultra-light load condition. With a load current prediction scheme, the proposed tri-mode converter requires neither additional load current sensor nor multiple mode controllers. In addition, a soft-start operation is employed to prevent an in-rush current. The proposed tri-mode buck converter has been fabricated through a 0.18- $\mu \text{m}$ CMOS process with a chip area of 0.97 mm $\times0.88$ mm. A load-dependent seamless mode transition is realized, and a maximum converter efficiency of 91% has been measured with a 7.4-MHz switching frequency. [ABSTRACT FROM AUTHOR]

This paper proposed a high efficiency boost converter targeting thermoelectric generator energy harvesting. The proposed converter adopts the critical conduction mode rather than the discontinuous mode to reduce the conduction loss, which can improve the peak efficiency at high input power. To reduce the minimum input voltage, an adaptive on-resistance switch, which can automatically change the high side and low side on-resistance according to the input voltage, is used. To maximize the output power, a maximum power point tracking circuit is designed to track the internal source resistance. Radio frequency (RF) kick-up and low voltage startup are used to improve the cold start voltage. The proposed converter is implemented in a 0.18- $\mu \text{m}$ standard CMOS process, which occupies a chip area of about 0.48 mm2. Measurement results show that the peak efficiency of the converter can be up to 90.8% and 60% at 180 and 20 mV of the open-circuit voltage, respectively. Owing to the cold startup circuit, the proposed converter can start successfully with 260-mV open-circuit voltage or −16-dBm RF input. Moreover, the open-circuit voltage can be further lowered to 12 mV with 1.5- $\mu \text{W}$ output power after startup. [ABSTRACT FROM AUTHOR]

Multiple-supply are required to minimize the power consumptions in bio-implant systems. A single-inductor multiple-output (SIMO) switching converter is one of the solutions. But it has inherent problems which block the applications in the embedded biomedical systems. In this paper, a circuit arrangement for providing multiple outputs based on low-dropout (LDO) regulator is proposed. The regulating transistor of LDO is time-shared by N output legs. Two error amplifiers (EAs) are utilized in the topology, irrespective of number of the output legs. The corresponding switching strategy alleviates the difficulties associated with controlling multiple switching functions for conventional time-sharing methods, and thus, permits multiple outputs to be generated easily. A prototype multiple-output LDO (MOLDO) regulator with four output legs was fabricated with a standard 0.35 \mu\ m CMOS process. The measurement results verify the good performance of this design such as no cross regulation (CR), small ripples, and less power consumption. Moreover, it does not require inductor and presents low total harmonic distortion, which is very suitable for bio-implant fields. [ABSTRACT FROM PUBLISHER]

The general structure of a multilevel multistate dc–dc converter is introduced, which is a hybrid between inductor-based (buck) converters and capacitor-based (switched capacitor) converters. The control of the new converter is hybrid between switched capacitor converters and buck converters, where the coarse tuning of the output voltage is achieved through the selection of an appropriate operating region similar to an SC converter, while fine tuning is achieved through the adjustment of a duty cycle value similar to a buck converter. A silicon implementation of a four-level four-state hybrid converter is presented as a specific example of the general hybrid converter structure. A new state interleaving technique was employed resulting in an increased effective switching frequency of the converter. Silicon measurements of the integrated four-level four-state converter on a 65-nm GF technology show that the converter can cover a wide range of output voltage values achieving a peak efficiency of 93% with a power density of 47 mW/mm2. The implemented converter attains a response time in the sub- ${\mu }\text{s}$ range with output voltage ripples below 50 mV. [ABSTRACT FROM AUTHOR]