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Harmonic content modulation of the oscillator output voltage can contribute to flicker noise up-conversion in LC-tuned oscillators. The paper reports a quantitative analysis of the effect in Van der Pol oscillators using the framework of the impulse sensitivity function (ISF). It is shown that most of the up-conversion efficiency results from the first harmonic of the ISF, which is not perfectly in quadrature to the output voltage waveform, and from the first harmonic of the transistor current, which is slightly lagging the voltage waveform. A closed-form expression of 1/f3 phase noise in voltage-limited LC-tuned oscillator is derived that is in good agreement with circuit simulations. The paper also shows that the values of both phase shifts are determined by the non-linearity of the active element and are linked to the relevant oscillator parameters, i.e., excess gain and tank quality factor. [ABSTRACT FROM PUBLISHER]

As externally powered microsystems become more common, designers need better tools to understand power delivery systems such as non-resonant capacitive coupling. In this paper we present the first general method which allows a designer to easily model power delivery through capacitive coupling. The method uses a power iteration technique which allows one to analyze systems when the time to charge the coupling capacitor is longer than a charge cycle, enabling us to analyze a greater range of systems than previously possible. In fact, we are able to model the entire system with an equivalent resistance. We show that our model accurately reproduces both static and dynamic characteristics of the exact solution and that this model is general, in that it is valid for capacitor charge times that are longer as well as shorter than a charge cycle. This model also reveals several regions of operation where different parameters (e.g., capacitance, frequency and series resistance) dominate, allowing the designer to quickly and intuitively understand the design space for capacitive power transfer. [ABSTRACT FROM PUBLISHER]

In this paper, a novel class of element-wise inverse Jacket transforms (EIJT) with many parameters are proposed for signal length N = 3 × 2r. The EIJT has 2N-1 independent parameters. It is shown that the inverse transform of the proposed EIJT can be easily obtained by taking each reciprocal entry of the forward matrix of Jacket transform and then transposing the resulting matrix. Their fast transforms are also developed. Due to their simplicity, the proposed EIJT transforms may be used in many transform-based applications, where their independent parameters may provide more degrees of freedom such as affording an additional secret key in watermarking and encryption applications. [ABSTRACT FROM PUBLISHER]

Stability conditions for 2-D shift-varying systems are presented. The shift-varying nature of such systems emerges in applications such as adaptive filtering or adaptive image processing, where the coefficients are neither static nor periodic. The forms considered in this paper are the Givone-Roesser and the Fornasini-Marchesini models, both of which are discrete 2-D state-space filters. The sufficient conditions for BIBO stability that are proven herein are an outgrowth of the 1-D time-varying state-space conditions that have been previously established. The nature of feedback in the 2-D space is explored and found to be much more complex than for the 1-D case. However, it is also shown that when every feedback path is guaranteed to satisfy a variation on exponential stability, then BIBO stability of these two models can be assured. Further conditions are also established which engage the Lyapunov equation and guarantee the exponential stability requirement. [ABSTRACT FROM PUBLISHER]

In this paper and in its companion, a novel cut-based decomposition for transfer functions of linear time-invariant circuits is introduced and an invariance property, with respect to the cut, is proven for the set of quantities introduced by this cut-based decomposition. These results naturally lead to a novel feedback theory of electric circuits which, unlike Bode's feedback theory, is based on the unambiguous decomposition of transfer functions. Such feedback theory provides a natural extension to the elementary model of feedback amplifiers based on block diagrams, from system theory to circuit theory, and a natural extension to Blackman's formula. [ABSTRACT FROM PUBLISHER]

Aiming for the simultaneous realization of constant gain, accurate input impedance match, and minimum noise figure over a wide frequency range, the circuit topologies and detailed design of two broadband dual-loop negative feedback power-to-current low noise amplifiers (LNAs) are presented in this paper: 1) a resistive indirect-feedback power-to-current LNA, which requires an active part with two output terminal pairs, and 2) a transformer feedback power-to-current LNA, which requires a transformer in its current feedback path having a high turn ratio with high magnetic coupling. For both LNAs the feedback networks and active part implementations are discussed in detail. It is shown that for this purpose a novel stacked transformer can be realized using only two metal layers. The two LNAs are designed to be implemented in a 0.2 m GaAs p-HEMT technology process to verify the theory presented. Counter measures are applied to deal with the effects of bond wires and the effects of transformer parasitics on the circuit performance are analyzed. Simulation results show that the resistive indirect-feedback power-to-current LNA exhibits a 0.6-0.8 dB noise figure, an input return loss well below dB, a 200 mS voltage-to-current gain (which corresponds to 23 dB power gain for a 50 load) from 0.3 GHz to 4 GHz, a dBm third-order input intercept point (IIP3) and a 23 dBm second-order input intercept point (IIP2) at 2 GHz. It consumes 73 mA current from a 4 V power supply. The transformer-feedback power-to-current LNA achieves a 0.5-0.8 dB noise figure, an input return loss of less than dB, a 22 dB power gain from 0.8 GHz to 4 GHz, and a 0 dBm IIP3 and 22 dBm IIP2 at 2 GHz while drawing 53 mA current from the 4 V power supply. [ABSTRACT FROM PUBLISHER]

This paper presents three pulsewidth modulation modulators using CMOS operational transconductance amplifiers. They consist of a ramp integrator and current-tunable Schmitt triggers. Prototype circuits built using discrete components exhibited that their duty cycles are linearly controllable. Because of their simple structure, the proposed modulators can be easily fabricated in a monolithic integrated circuit. [ABSTRACT FROM AUTHOR]

This paper describes high-precision switched-capacitor (SC) track-and-hold amplifier (THA) stages. They use a novel continuous-time correlated double sampling (CDS) scheme to desensitize the operation to amplifier imperfections. Unlike earlier predictive-CDS amplifiers, the circuits do not need a sampled-and-held input signal for their operation. During the tracking period, an auxiliary continuous-time signal path is established, which predicts the output voltage during the holding period. This allows accurate operation even for low amplifier gains and large offsets over a wide input frequency range. Extensive simulations were performed to compare the performance of the proposed THAs with earlier circuits utilizing CDS. The results verify that their operation is far more robust than that of any previously described SC amplifiers. [ABSTRACT FROM AUTHOR]

Online adaptive equalization is proposed to calibrate channel mismatch errors in time-interleaved (TI) analog-to-digital converter (ADC) arrays with a linear reference path. Code-domain filters are shown to be effective in removing interchannel as well as intrachannel nonlinearity and mismatch errors, including offset, gain, and differential nonlinearity (DNL) and integral nonlinearity (INL) mismatches. An 8-bit, 600-MS/s, 0.13- μm CMOS prototype measured a signal-to-noise plus distortion ratio (SNDR) of 31.0/47.4 dB, a spurious-free dynamic range (SFDR) of 32.8/63.6 dB, a DNL of 1.30/0.30 LSBs, and an INL of 1.70/0.23 LSBs in lab testing without/with equalization, respectively. [ABSTRACT FROM PUBLISHER]

We propose novel direct and indirect learning predistorters (PDs) that employ a new baseband simplicial canonical piecewise linear (SCPWL) function. The performance of the proposed PDs is easily controlled by varying the number of segments of the SCPWL function. When comparing to polynomial-based PDs, our SCPWL-based PDs are more robust for modeling strong nonlinearities and are less sensitive to input noise. In particular, we show that noise appearing in the feedback path of an indirect learning SCPWL-PD has negligible effect on the performance while the polynomial counterpart suffers from a noise-induced coefficient bias. We consider adaptive implementations of both Hammerstein-based and memory-based SCPWL PDs; the former featuring less parameters to be identified while the latter renders more straightforward parameter identification. When deriving the PD algorithms, we avoid a separate PA identification step which allows for a true real-time, or sample-by-sample, implementation without an alternating PA and PD identification procedure. However, to arrive at efficient sample-by-sample algorithms for Hammerstein PDs we need to bypass the problem of the associated nonconvex cost function. This is done by employing a modified, linear-in-the-parameter, Wiener model whose parameters can be explicitly or implicitly used for both indirect and direct learning. Extensive simulations confirm that the proposed SCPWL PDs outperform their polynomial counterparts, especially when noise is present in the feedback path of the indirect learning structure. The same is also verified by circuit level simulations on the Freescale MRF6S23100H class-AB PA in an 802.16d WiMAX system. [ABSTRACT FROM PUBLISHER]

A two-stage fully differential CMOS amplifier comprising inverters as input structures and employing self-biasing techniques is presented. The proposed amplifier benefits from an optimum compensation through time-domain optimization which permits achieving high energy efficiency. Moreover, it achieves the highest efficiency of its class and although it relies on a quasi-class-A topology, it is comparable to class-AB amplifiers. Detailed circuit analyses such as differential-mode, common-mode feedback, noise, slew rate, and input/output range are carried out. Based on these analyses, a manual design methodology and a genetic algorithm based optimization are presented. Finally, the most relevant experimental results for an integrated circuit prototype designed in a 0.13 \mu \m 1.2 V standard CMOS technology are shown. [ABSTRACT FROM PUBLISHER]

None of the previously reported third-order and fourth-order operational transconductance amplifier and capacitor (OTA-C) elliptic filter structures use the minimum number of active and passive components. After an innovative algebraic decomposition for a complicated transfer function, i.e., a new analytical synthesis method, a current-mode odd-nth-order and a current-mode even-nth-order OTA-C elliptic filter structure having the following advantages are presented: 1) all the OTAs have single-ended inputs; 2) all the capacitors are grounded; 3) the minimum active and passive components are used. An equal-capacitance-type structure is designed taking into account the difficulty of precisely fabricating capacitances in integrated circuits. Although the above three advantages lead to the lowest total parasitics and to the most precise output response, the small deviations (such as the 3.5159% error in fp) of the four parameters of the new third-order OTA-C elliptic filter can be drastically reduced (for example, to 0.1553% error in fp) by only slightly tuning the four transconductances, but fixing the ratio of the given three capacitances, and without adding any other active and passive components. H-spice high-pass and low-pass simulations with 0.35-μm process are provided to demonstrate the theoretical results. [ABSTRACT FROM AUTHOR]

An integrated receiver channel for a pulsed time-of-flight laser range finder is presented. The receiver operates in a wide dynamic range without gain control. This is achieved by converting the received unipolar pulse to a bipolar waveform already after the optical detector before the signal is fed to amplifier blocks. Thus the nonlinearities of the amplifiers have the minimum effect on the timing point, which is located in the zero crossing of the bipolar pulse. A parallel resonant circuit is used to shape the pulse in the input of the channel, which consists of a cascade of limiting voltage amplifiers followed by a comparator. The measurements show that the receiver has a walk error of 74 ps in the dynamic range of 1:1280. This corresponds to 11 mm in distance. The minimum usable input signal is limited by the noise of the receiver and equals 1.9 μA. [ABSTRACT FROM AUTHOR]

A gain stabilization technique for tuned integrated low-noise amplifiers (LNAs) is presented. The proposed method regulates the LC-tuned load impedance of the amplifier at the operation frequency against variations of passive devices in integrated circuit (IC) process. The impedance stabilization technique is based on the excellent relative accuracy of integrated resistors. Although the absolute deviation of the integrated resistors can be as large as ±20%, the relative deviation can be made smaller than ± 1% provided that resistors are placed close to each other. By applying the proposed method, the voltage-gain variation of the inductively degenerated common-source LNA, which is the most popular LNA architecture, can be reduced several decibels. As a consequence, the entire radio receiver can more easily meet its specifications in the presence of IC process variations and the product yield is improved. Finally, besides the LNAs, the presented stabilization technique can also be utilized in other tuned amplifiers, filters or oscillators employing damped LC-tuned loads. [ABSTRACT FROM AUTHOR]