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This paper presents a thermal/RF hybrid energy harvester. The energy harvesting system can scavenge energy from a thermoelectric generator (TEG) and a radio-frequency (RF) energy source simultaneously, and deliver the combined power to a single load. Two techniques are employed in the system to increase the end-to-end efficiency; the rectifying-combination technique is proposed to eliminate the power loss associated with a dedicated AC-DC converter before the combiner and an improved fractional open-circuit voltage (FOCV) maximum power tracking (MPPT) is considered for a high average efficiency. A dynamic power path control extracts the maximum RF power from a cross-coupled differential rectifier, and also behaves as an AC/DC energy combiner. The thermal/RF harvester system achieves a measured peak end-to-end power conversion efficiency (PCE) of 63.4%. The shorter sampling time of 26ms every 16s for the proposed FOCV MPPT method reduces the long charging tail required to refresh the sampling capacitor, resulting in a an improved average efficiency of 82.2% for the thermal harvester. Fabricated in 0.18 $\mu \text{m}$ CMOS technology, the prototype operates at a thermal input voltage ranging from 40 mV to 400 mV and an RF power from −18 dBm to −3 dBm and delivers an output voltage of 1.8 V. The total area of the fabricated circuit prototype is 1.22 mm2. [ABSTRACT FROM AUTHOR]

A high efficiency, maximum power point tracking (MPPT) power management unit (PMU), with 3.6 \mmb\mu\bf W quiescent power, aimed at a thermoelectric generator (TEG) array is presented. The proposed energy harvesting PMU is made up of a boost converter with a cascaded capacitor-less low drop-out (CL-LDO) voltage regulator. The segmented approach allows the PMU to match the TEG array's changing dynamic series resistance via the boost converter and simultaneously provide voltage regulation with adaptive, high switching noise rejection via the CL-LDO. The boost converter's switching frequency (f{sw}) is tracked via a Sense-and-Control loop which modifies the CL-LDO's power supply rejection (PSR) characteristics to place a notch in the PSR transfer function around the average f{sw}. Experimental results show an overall system efficiency better than 57% @ 1.6 V output voltage, PSR of 40 dB at f{sw}, and a notch-tuning range of 15–65 kHz. The total active area is 0.93 mm^2 in 0.5 \mum CMOS. [ABSTRACT FROM PUBLISHER]