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Due to different solar radiation, temperature, and other reasons of modules in the three-phase cascaded H-bridge (CHB) photovoltaic (PV) inverter, the output power among PV modules will be unequal and lead to unbalanced grid currents, which cannot meet the requirements of grid codes. On the other hand, the second-order voltage ripple is aroused in the dc-link capacitor since each phase-leg of the CHB inverter is made up of a single-phase inverter. Concerning these two issues, this paper proposes an optimized third harmonic injection method based on fundamental frequency zero sequence injection (FFZSI), which is a conventional method to handle the slight power imbalance problem. In this paper, the FFZSI is adopted to redistribute the power among three phases, and then the third harmonic is injected into the three-phase combined reference waveforms according to the two requirements: all modules are free from overmodulation and the dc-link voltage fluctuation is mostly reduced. Therefore, the proposed method can reduce the dc-link voltage fluctuation and extend the power balance range of FFZSI at the same time. The validity and effectiveness of the proposed method are verified by simulation and experimental results. [ABSTRACT FROM AUTHOR]

This paper proposes a novel polygonal voltage space vector structure (SVS) having 30 sides, for a star-connected induction motor drive. The SVS eliminates the presence of harmonics up to 25th order from motor phase voltage throughout the entire modulation range, providing a torque profile devoid of lower order pulsations. Linear modulation is extended till 99.63% of base speed without exceeding the motor phase voltage rating. Topology consists of a dc-link fed primary inverter and two equal low voltage modular capacitor fed secondary inverters. Here the harmonics generated by the primary inverter is canceled by the secondary inverter which acts as a switched capacitive filter. Detailed description of the SVS generation and timing calculations are provided in this paper. Effectiveness of the proposed scheme is validated using experimental results, inverter loss calculations, and harmonic analysis. [ABSTRACT FROM AUTHOR]

In this paper, many impedance-source inverters with coupled inductors have been investigated to obtain a high step-up boost ratio. However, the leakage inductors in these topologies induce great voltage spikes at the dc link, which will increase the voltage stress of switches. Thus, the power level of inverters is limited. Furthermore, the efficiency of the inverters can be degraded by the losses associated with leakage inductors. To address abovementioned issues, this paper proposes a family of low-spike high-efficiency Y-source inverters. The proposed inverters have the ability of eliminating voltage spikes at the dc link and recycling the leakage energy via the additional diode and capacitor. In order to show the excellent characteristics of the proposed topologies, this paper compares the performances of the proposed inverters and the improved-Y-source inverter in many aspects. Simulation and experimental results have verified the abilities of the proposed inverters. [ABSTRACT FROM AUTHOR]

A space vector modulation (SVM) technique of a dual-inverter system for an open-end winding motor drive is described in this paper, where one inverter has a battery power source and the other has an only capacitor across the dc bus. The SVM must be achieved to operate the motor with field-oriented control and simultaneously to control the capacitor voltage at a constant value by using redundant switching states of the dual-inverter system. The control of the capacitor voltage is carried out by selecting a charging or a discharging mode in each redundant switching state, taking the instantaneous motor power factor into account. In addition, it is also required to reduce the error voltage pulses, which are generated in output multilevel voltage waveforms during the dead time. The compensation method of the existing dead-time scheme and the improved SVM sequence to reduce the error voltage vectors are proposed in this paper. The proposed methods are examined through several experimental tests and are confirmed to generate superior output voltage waveforms from the viewpoint of the measured total harmonic distortion and dv/dt. [ABSTRACT FROM AUTHOR]

In this paper, a new family of impedance source inverters is presented. It employs high-frequency electrical isolation between the inverter bridge switches and the load along with voltage clamping across the dc-link voltage. Conventional Z-source inverters (ZSIs) employs an impedance network that consists of inductors and capacitors. It has unique features that realize both step-up/step-down functions and eliminates the need of dead/overlap times. This paper extends this novel concept by using electrical isolation in impedance source inverters. High-frequency isolation has many advantages in terms of immunity and reliability; when applied with impedance source inverters this makes ZSIs a preferable choice for industrial applications. In photo-voltaic systems, the addition of the high-frequency transformer provides safety by avoiding the injection of dc circulating current into the grid, without the need of an external bulky line frequency transformer. The gain of the proposed inverter design can be accurately selected by choosing the turns ratio of the high frequency transformer (HFT) or by adjusting the shoot-through duty cycle (STDC) to the inverter. This allows for greater freedom especially when utilizing a higher modulation index, with the STDC allowing dynamic gain adjusts to be done speedily during operation of the inverter. Additionally, a dc-rail voltage clamping technique for the proposed class of isolated ZSIs is also discussed. This technique provides benefits not only in improving the output voltage quality, but also in reducing voltage stress of the active and passive components by minimizing the voltage spikes across the switching devices. In this paper, several high-frequency isolated ZSIs are presented, and an example isolated improved ΓZSI design is shown and discussed in detail. Simulations are provided for the proposed class of isolated inverters to verify their working. Further experimental investigation has been done for which results for the isolated improved ΓZSI are reported. These empirical results have largely confirmed the expected benefits that were determined through simulation and accurate model-based testing. [ABSTRACT FROM AUTHOR]

This paper presents a novel seven-level inverter topology for medium-voltage high-power applications. It consists of eight active switches and two inner flying capacitor (FC) units forming a similar structure as in a conventional active neutral-point-clamped (ANPC) inverter. This unique arrangement reduces the number of active and passive components. A simple modulation technique reduces cost and complexity in the control system design without compromising reactive power capability. In addition, compared to major conventional seven-level inverter topologies, such as the neutral point clamped, FC, cascaded H-bridge, and ANPC topologies, the new topology reduces the dc-link voltage requirement by 50%. This recued dc-link voltage makes the new topology appealing for various industrial applications. Experimental results from a 2.2-kVA prototype are presented to support the theoretical analysis presented in this paper. The prototype demonstrates a conversion efficiency of around 97.2% ± 1% for a wide load range. [ABSTRACT FROM AUTHOR]

This paper proposes an “isolated soft switching current fed LCC-T resonant dc–dc converter for PV/fuel cell applications.” This converter is able to achieve zero voltage switching for front-end inverter switches and zero-current switching for voltage doubler diodes. The majority of dc–dc converters have compact capacitive (C) filter in output, but high harmonic currents through transformer makes them bulky. The proposed converter attempts to improve harmonic content through a transformer under wide load and input variations as well as it can significantly reduce required turns ratio of transformer to achieve required output voltage. For the above reasons, the proposed converter can offer better footprints and therefore it can be a potential candidate for PV/fuel cell applications. This paper presents basic operating principal, detailed analysis, control, and design of the proposed converter with the help of an example. This converter operates in two modes, i.e., constant duty cycle mode and constant frequency mode, depending on load demand, and is explained through operating curves. Finally, experimental results are included for justifying the proposed theory. [ABSTRACT FROM AUTHOR]

In low-power applications of photovoltaic (PV) systems, the transformerless grid-connected inverters have been preferred to increase the efficiency and reduce the cost, size, and power losses when they are compared to the ones with the transformer. A transformerless single-phase inverter topology with a single dc-link capacitor for the grid-connected PV systems is proposed in this paper. The proposed inverter has been simulated by using a cooperation process of the MATLAB and SPICE package programs and it has been implemented for experimental verification. The proposed inverter reduces the high-frequency common-mode leakage current caused by parasitic capacitances of PV panels, whereas it is controlled with the unipolar sinusoidal pulsewidth modulation. Also, the results show that the common-mode voltage remains constant. The efficiency of the proposed inverter has been compared to that of the most common topologies having the dc-link decoupling during the zero voltage states. This paper is accompanied by a video file demonstrating the power loss distribution in the inverter. [ABSTRACT FROM AUTHOR]

This paper describes a dc-link voltage control method of a single-phase back-to-back cascaded H-bridge inverter (SBCI) for a medium-voltage motor drive system. The main advantage of the SBCI topology over the conventional regenerative cascaded H-bridge topology with a three-phase active front-end (AFE) is a simple system structure, which is composed of an input transformer, a power cell, a current sensor, etc. However, the challenging points of the SBCI are larger voltage ripple in the dc-link capacitor and imbalance of dc-link voltages of each phase. The asymmetric dc-link voltage of each power cells could cause unstable operation such as over-modulation due to the lack of the dc-link voltage of a particular phase and result in over-voltage or under-voltage faults. In this paper, the control strategy of the dc-link voltage for the SBCI that uses the negative-sequence voltage of the converter is described. The proposed control method is verified with a computer simulation whose target is a 6.6-kV–1.25-MW medium-voltage drive system. Also, through the experimental setup with the prototype SBCI whose power rating is 16.2 kVA, the dc-link voltage of each AFE has been controlled within a 0.5% error of its reference value at the full load. [ABSTRACT FROM AUTHOR]

The switching speeds of next-generation power semiconductor devices, such as those made of silicon carbide and gallium nitride are roughly ten times those of conventional devices (e.g., silicon insulated-gate bipolar transistors). This increases the frequency range of the electromagnetic noise accompanying the switching operations of pulsewidth modulated (PWM) converters and worsens the influence of radiated noise. The authors have previously proposed an active common-mode filter (ACF) that reduces the radiated noise from the power cables connected to a PWM converter and evaluated its effect in reducing radiated noise by using a function generator as a common-mode (CM) noise source. In this paper, the ACF is applied to a motor drive system fed by a three-phase PWM inverter, and the attenuation characteristics of the CM voltage are evaluated. To avoid saturating the ACF, the combination of an active common-noise canceller and the ACF is discussed. The experimental results show that the system constructed in this paper can suppress the CM voltage produced by the PWM inverter over a wide frequency range from 100 to 100 MHz. [ABSTRACT FROM AUTHOR]

This paper proposes a novel method for instantaneous balancing of neutral-point (NP) voltages with stacked multilevel inverters (MLIs) for variable-speed drives. The stacked MLI uses series-connected dc sources and NPs (connecting points of dc sources) to obtain the desired levels. The balancing of NP voltages are obtained by using a low-voltage-capacitor-fed cascaded H-bridge (CHB) per phase of a symmetrical six-phase induction machine (IM), which ensures zero current drawn from NPs (at any given instant). Since no current is drawn from NPs, the single dc-link operation with stacked capacitors is also possible. The scheme is suitable for applications, where low-voltage dc sources and batteries are stacked to form a dc link. A variable-speed operation is done using a seven-level inverter scheme for a symmetrical six-phase IM, which is formed by three dc-link stacked capacitors cascaded with two low-voltage-capacitor-fed CHBs per phase. Furthermore, the method is extended for an open-end IM to obtain a seven-level common-mode eliminated space vector structure using a single dc link. The generalization of this method for any stacked $n$ -level inverter without NP voltage deviation is also presented in this paper. The experimental results and analysis are included to validate the proposed method. [ABSTRACT FROM AUTHOR]

This paper presents a new topology based on a modified class-E resonant inverter used as an LED series current regulator. The proposed topology behaves as a controllable nondissipative impedance that adjusts the current flowing through the lamp. In this circuit, the LED is placed at the dc side of the class-E inverter, in series with the input filter inductance. The power handled by the ac side is sent back to the input by means of two diodes. Despite the addition of these two diodes, the converter maintains all the advantages of the class-E inverter: low component count, simple control, and extremely low switching losses. The LED current can be controlled with a small variation of the operating frequency. This way, the low-frequency current ripple of the lamp can be strongly reduced even when there is a considerably high input voltage excursion, such as the one expected in electrolyticless high-power-factor LED ballast. This paper proposes a simplified methodology based on the fundamental approach aiming to design and build a laboratory prototype. The prototype is designed in order to minimize the effect of LED voltage in the output current. This way, the input voltage ripple can be canceled using a simple feedforward control. [ABSTRACT FROM AUTHOR]

This paper proposes a split-capacitor four-wire current source inverter, which is the dual of the split-capacitor four-wire voltage source inverter. Since the midpoint of the dc link is tied to the neutral point of ac filter capacitors, the common-mode voltage (CMV) is reduced significantly. Consequently, the leakage current issue is effectively addressed. The proposed circuit is cost-effective as no extra switch is added. This paper, first, establishes the equivalent common-mode circuit of the proposed inverter. The impact of the neutral line inductance on CMV is also analyzed. Then, a specific modulation is introduced to balance the dc-link voltages/currents. To achieve good input/output performance, a nonlinear control method is developed based on time-domain models. Finally, all the proposed methods and related theoretical analysis are verified by simulations and experimental results. [ABSTRACT FROM AUTHOR]

This paper presents theoretical and experimental discussions on low-voltage-ride-through operation of a modular multilevel single-delta bridge-cell (SDBC) inverter intended for utility-scale photovoltaic (PV) systems. Modern grid codes require grid-tied inverters to provide dynamic grid support during grid-fault events by injecting reactive current. This paper discusses decoupled positive- and negative-sequence reactive-current control, focusing on asymmetric voltage sags with imbalanced magnitude and phase relationships. The main objective is to present a feedforward control method based on calculation of the zero-sequence current required for achieving power balance during normal and grid-fault conditions. Moreover, this paper demonstrates a practical method that minimizes overcurrent stress in the three inverter clusters by adjusting active power drawn from PV arrays. Experimental results on a three-phase 12.6-kVA system prove that the SDBC inverter is capable of seamlessly operating through asymmetric voltage sags. [ABSTRACT FROM AUTHOR]

This paper proposes a new single-phase single-stage switched-boost inverter with four switches. Like the quasi-Z-source inverter and quasi-switched boost inverter (qSBI), the proposed inverter has the main features as continuous input current, buck/boost voltage with single-stage conversion, and shoot-through immunity. Compared to the qSBI, the proposed inverter uses one more capacitor and one less switch. This paper presents the operating principles, pulse-width modulation control strategy, parameter design guidelines, and simulation results for the proposed inverter. To verify the performance of the proposed inverter, an 800-W prototype was built with an 110 V/50 Hz output voltage in stand-alone and grid-connected modes. The simulation and experimental results matched those of the theoretical analysis. [ABSTRACT FROM AUTHOR]

In this paper, two structures are proposed for the switched-inductor quasi-Z-source inverter. In the proposed structures to extend the voltage gain of inverter, two new switched-inductor structures are used. In the proposed structures, voltage across the capacitors in the Z-source network and in the switched-inductor is symmetric and small. The other advantage of proposed inverters is known as achieving higher voltage gain per smaller duty cycle ratio (of shoot-through). Compared with a conventional continuous input current switched-inductor quasi-Z-source inverter at the same gain voltage, there is less of a ripple of input current in the proposed inverters. In this paper, at first the both the conventional and the proposed switched-inductor Z-source inventers are thoroughly investigated to find out their governing relations. Then, the proposed Z-source inverters are compared with the conventional ones by simulating them to assess their performance efficiency. Next, applying the simple boost pulse width modulation the simulation is carried out with PSCAD/EMTDC software. After that, to evaluate the obtained results, the prototypes of the proposed inverters with 48 Vdc input voltage are used. [ABSTRACT FROM PUBLISHER]

Microinverters require high voltage gain capability for interfacing the low dc voltage output of photovoltaic (PV) module to single-phase ac grid. A two-stage nonisolated inverter is proposed in this paper, with a first boost stage and a second traditional pulse width modulated grid-tied inverter stage. The proposed boost stage consists of a coupled inductor added with a voltage multiplier to achieve the required high voltage gain at high efficiency and to operate over a wide input voltage range. Among the coupled inductor topologies, adding a clamp circuit is a common solution to limit the voltage spike caused by leakage inductance. In the proposed converter, the resonance between the coupled inductor and voltage multiplier is used to address the issue of voltage spike, thereby reducing both component count and device voltage stress. Detailed analysis and design procedure of the proposed converter is presented in this paper. Experimental results of a 250-W microinverter are presented to validate the proposed converter. [ABSTRACT FROM PUBLISHER]

In this paper, new half-bridge and full-bridge topologies for a switched-boost inverter are proposed. These topologies have a high boost factor in comparison with conventional types. In addition, the proposed topologies have continuous input current and can generate zero-voltage level in output. In this paper, the operation of the proposed inverters in different operating modes is analyzed. Then, the values of inductors and capacitors are designed. Moreover, the used switching pattern and its logical diagram are introduced. A comprehensive comparison between the proposed and conventional topologies in terms of the boost factor, the number of elements, and the efficiency shows the good features of the proposed inverters. Finally, to verify correct operation of the proposed topologies and derived equations, simulation and experimental results are presented. [ABSTRACT FROM AUTHOR]

In this paper, two topologies are presented for the enhanced-boost quasi-Z-source inverters (qZSI), namely continuous input current configuration and discontinuous input current configuration of enhanced-boost qZSI with two-switched impedance networks. Similar to enhanced-boost impedance-source inverters (ZSIs), these proposed inverter topologies possess very high boost voltage inversion at low shoot-through duty ratio and high modulation index to provide an improved quality output voltage. Compared to enhanced-boost ZSIs with two-switched Z-source impedance networks, these proposed inverter topologies share common ground with source and bridge inverter, overcome the starting inrush problem, and draw continuous input current and the lower voltage across the capacitors. Moreover, the input ripple current is negligible. This paper presents the operating principles and analysis of continuous input current configuration enhanced-boost qZSI with two-switched impedance networks and compares with ZSI, switched inductor ZSI, DA/CA-qZSI, and enhanced-boost ZSIs. The theoretical analysis is done and is validated through simulation and experimental results. [ABSTRACT FROM PUBLISHER]

Squirrel-cage induction motor (SQIM) fed by a pulsewidth modulated voltage source inverter (VSI) is subjected to voltage and current surges. It may cause additional losses in the motor, insulation failure, high bearing current, and electromagnetic interference. To mitigate these problems, sinusoidal LC filter is placed at the ac-side of the VSI. This paper proposes a new methodology to design the filter. In this method, the filter inductance is chosen based on the maximum ripple in the inverter ac-side current and the voltage drop across the filter inductor, and the filter capacitor is chosen based on the steady-state reactive power demand of the SQIM. The effects of the designed filter on the switch current, losses in the drive, temperature of the dc-link capacitor, dv/dt at the motor terminal, stator flux, and air-gap torque of the SQIM are discussed. The performance of the drive with the filters, designed by the proposed method and the standard method, are experimentally tested on a two-level silicon carbide VSI-fed SQIM and comparative analysis is carried out. The impact of the designed filter on the drive is also shown when the neutral point of the filter capacitors is connected with the mid-point of the dc link. The stability of the closed-loop controlled SQIM drive with the proposed filter, and simulation results are presented to verify its performance. [ABSTRACT FROM AUTHOR]

This paper presents the analysis and design procedure of a voltage equalizer, which consists of a boost full-bridge input cell and a symmetrical voltage multiplier (SVM). The batteries under different initial voltage conditions can be charged to a desired uniform voltage level by the proposed voltage equalizer. The fundamental operation principle of the voltage equalizer is described, and a dc equivalent resistance model is derived to analyze the charging and equalization behaviors. The design procedure based on analytical models is presented to give the optimal parameter configuration for the voltage equalizer to reduce voltage imbalance among the batteries and improve the power conversion efficiency. The model of the equivalent resistance is verified by simulation study of an equivalent circuit. A 10-W prototype for 3 series-connected energy storage modules was built and tested with voltage imbalance. Experimental results confirm the validity of the design method, and demonstrate that the proposed voltage equalizer can achieve a good voltage equalization with a standard deviation reduced to a few millivolts. [ABSTRACT FROM AUTHOR]

This paper presents a modification of the Vienna rectifier (VR) to obtain more than three voltage levels at the DC line connection, while preserving the unity power factor at the AC grid side. The proposed unidirectional multilevel there-phase rectifier, called the “Negev rectifier”, has a reduced device count and utilizes a unique novel Time Division Multiplexed based control scheme, which makes the challenging N-level VR expansion possible. The Negev rectifier can serve as a grid interface for supplying dc voltage to multilevel inverters with 4 up to 7 voltage levels, eliminating the burden of inverter-side voltage balancing control. The Negev hardware can be constructed by two complementary topologies, making it suitable for either high current or high voltage applications. [ABSTRACT FROM AUTHOR]

This paper proposes a dc-link voltage shaping method for a cascaded H-bridge (CHB) static synchronous compensator (STATCOM). A recently proposed low capacitance-STATCOM system, which intentionally operates with large voltage ripples on the dc-link capacitors, offers the advantage of superior harmonic performance. However, the capacitor voltage ripples decrease when operating at below-rated reactive current, which removes the aforementioned harmonic performance benefit of this system. In addition, such harmonic performance benefit is only achieved in capacitive operation mode. In order to expand the operating region where advantageous voltage ripples are present, a new voltage shaping method is proposed. The proposed method uses a CHB multilevel converter coupled with simple dc–dc converters to shape voltage ripples on the dc-link capacitor regardless of its operating point. This is achieved by controlling the average current of the dc–dc converter using model predictive control. The concept is best applied to an enhanced STATCOM, or E-STATCOM, application in which the STATCOM is integrated with either a renewable energy source or energy storage system. The operational principle of the proposed approach is validated via simulation and experimental results on a five-level single-phase CHB STATCOM. [ABSTRACT FROM AUTHOR]

A multilevel dodecagonal voltage space vector generation scheme for variable-speed drive applications with single-dc-link operation requires a large value of capacitance for cascaded H-bridge (CHB) filters, when operated at lower speeds. In existing schemes, the multilevel dodecagonal structure is obtained by cascading a flying capacitor inverter with a CHB. In this paper, a new scheme has been proposed to minimize the capacitance requirement for full speed operation by creating vector redundancies using modular and equal voltage CHBs. Also, an algorithm has been developed to optimize the selection of vector redundancies among the CHBs in order to minimize the voltage ripple of the floating capacitors. The proposed algorithm considers instantaneous capacitor voltages and phase currents for optimal selection of vector redundancies. A mathematical model for capacitor voltage deviation is presented, and the effectiveness of the proposed algorithm is verified in both the simulation and the experiment. [ABSTRACT FROM AUTHOR]

This paper deals with the analysis of the input dc-link voltage ripple in multilevel inverter based on H-bridge and level doubling network (LDN). The LDN is basically a half-bridge fed by a floating capacitor, with voltage self-balancing capability, recalling the concept of a flying capacitor configuration. The amplitude of the LDN voltage ripple is analytically determined considering both the low-order and the switching harmonic components. In particular, peak-to-peak distributions of voltage ripples over the fundamental period are analytically determined, making possible the design of dc-link capacitor relying only on the dc-voltage ripple requirements. The case study makes reference to negligible switching ripple in the output current. It well represents either grid connection or passive load having almost sinusoidal currents. Numerical simulations carried out by MATLAB/Simulink and a complete set of experimental verifications are given to confirm the theoretical developments. [ABSTRACT FROM AUTHOR]

In this paper, instantaneous pulse power compensator (IPPC) method is proposed to achieve power pulsation decoupling function for single-phase inverter applications. A smaller capacitor is placed in series with the traditional dc-link capacitor, and this smaller capacitor voltage is controlled using pulse currents to cancel out the dc-link voltage ripple. Unlike twice-line-frequency power decoupling method, the proposed IPPC method can compensate the pulsating power with all the orders harmonics on the dc-link line, not only the second-order component. Both modeling and simulation results show that IPPC method can achieve nearly zero voltage ripple for the dc-link capacitor since the pulse current is fully compensated. Whereas twice-line-frequency power decoupling method has limit in voltage ripple reduction, especially in small dc-link capacitance conditions. The experimental results based on a full-bridge topology decoupling circuit and a single-phase inverter application show consistent results with simulation results. A 16% reduction of the prototype size, i.e., 16% higher power density with only ∼1% efficiency penalty can be achieved by the proposed IPPC method when compared to the second-order power decoupling method. [ABSTRACT FROM AUTHOR]

Generating dense multilevel voltage space structure using polygons of higher sides is one of the novel and elegant method to suppress low-order harmonics and to obtain refined sinusoidal voltages using voltage source inverters for variable frequency drive application without passive filters. Apart from the advantages of conventional multilevel inverter topologies, schemes generating polygonal voltage space vector structure can equip full dc-bus utilization, low switching frequency strategies to eliminate low-order harmonics, and increased linear modulation range. In this paper, an induction motor drive scheme generating a highly dense multilevel 24-sided polygonal voltage space vector structure using a single dc source, which can eliminate harmonics till 23rd order from phase voltages, is presented. Cascaded power circuit topology with a flying capacitor inverter fed with a dc source and two low voltage floating capacitor fed H-bridge inverters is used. Detailed experimentally validated results, under scalar as well as indirect rotor field oriented control of induction motor are provided. Studies on voltage ripple and reactive energy in various floating capacitors, harmonic performance of output voltage for wide range of speed operation, are also included. [ABSTRACT FROM AUTHOR]

This paper presents a novel grid synchronization method with bumpless start that requires minimal computational load and can selectively track the positive sequence of the grid voltage in an unbalanced and distorted three-phase weak grid. Only 12 floating-point operations are required to obtain the in-phase and quadrature components that define a synchronous frame which tracks the positive sequence of the grid voltage. Contrary to a phase-locked loop (PLL), the presented scheme does not require to measure any ac voltages. Therefore, this sensorless method is particularly suited for weak-grid conditions, in which the voltage at the point of common coupling may contain significant noise and can experience larger deviations from the grid voltage (compared to a strong grid) due to the voltage drop in the weak grid impedance. The error in the estimated phase depends on the accuracy of the plant model. If the LCL filter parameters are known, then both the proposal and a PLL-based scheme result in the same steady-state error. Experimental results show the advantages of the proposal compared to a moving average filter PLL. [ABSTRACT FROM AUTHOR]

Aluminum electrolytic capacitors (AECs) are connected in a bank to meet the requirement of capacitance, voltage, and current rating for dc-link of power electronic converters. The performance of capacitor bank deteriorates with time due to the degradation of AECs in the bank. Further, each AEC in the bank degrades differently based on its core temperature, which in turn depends on the current and its equivalent series resistance (ESR). Therefore, health monitoring of a bank would require monitoring of individual AECs in the bank. However, extending the available literature on health monitoring of an AEC to the capacitor bank would require voltage/current sensors for individual AECs. To address the aforementioned issue, this paper suggests a method to assess the health of individual AECs online in the bank without using sensors for each AECs. The proposed method involves estimation of current through each capacitor, which is used to determine the core temperature by using a thermal model of AEC. The core temperature is used for estimation of ESR and capacitance of each capacitor using physics-of-failure based degradation model. For the consistent matching of the degradation model to the actual degradation of the capacitor, the coefficients of the model are sequentially updated. For updating, an algorithm based on extended Kalman filter is used. The proposed scheme is experimentally validated on laboratory prototype of single-phase, grid-connected solar PV inverter under variable load conditions. [ABSTRACT FROM AUTHOR]

The nine-arm modular multilevel converter (9A-MMC) has been recently proposed as a reduced MMC topology variation for six-phase drive applications, with 25% reduction in the number of employed arms and associated components, compared to a standard dual three-phase MMC, however with a limited output voltage amplitude. This paper proposes a hybrid 9A-MMC comprised of half-bridge submodules (SMs) in both the upper and lower arms, and full-bridge SMs in the middle arms. By employing the negative-voltage state of the full-bridge SMs, the hybrid 9A-MMC avoids the limitations imposed on the dc-link voltage utilization, while achieving further reduction in the component count, compared to a standard 9A-MMC with identical half-bridge SMs. The operating principles of the proposed hybrid 9A-MMC are illustrated with mathematical analysis, whereas its characteristics are verified through both simulation and experimentation. An assessment of the proposed topology quantifying its employed components is also provided, in comparison to other MMC-based six-phase machine drives. [ABSTRACT FROM AUTHOR]

Photovoltaic (PV) inverters form the backbone of PV generation. This paper proposes an all-film-capacitor, transformerless single-phase inverter for PV application. The topology is a combination of a front-end boost stage, a half-bridge (HB) inverter stage, and a buck–boost power decoupling stage. The grid ripple power is decoupled by a large swing of the HB capacitors along with a limited ripple on the dc link, thus reducing the capacitance requirement and converter volume. Being an HB-derived inverter, the high-frequency common mode leakage current through the PV parasitic capacitance is mitigated. Furthermore, the dc-link average is optimally controlled to ensure a higher efficiency over wide operating load and power factor range. To validate its operation, a Silicon Carbide based 1-kVA laboratory prototype is built and closed-loop experimental results are provided at 100/75 kHz switching frequency over wide operating conditions. [ABSTRACT FROM AUTHOR]

This paper analyzes the possibility of controlling the output voltage of a standalone single-phase inverter by directly controlling the output filter capacitor current without using a dedicated output voltage sensor. The plant modeling and controller design are presented. The proposed method depends on having the value of the output filter capacitance. A method to estimate the output filter capacitance is also presented. Rigorous analysis is done to show that the proposed sensorless scheme is largely insensitive to parameter variations and ensure that the output voltage is within specified regulations at utility level. It is also demonstrated in this paper that compared to the conventional voltage control scheme the proposed control scheme ensures an improved total harmonic distortion of the output voltage waveform. Experimental results presented validate the proposed scheme. [ABSTRACT FROM AUTHOR]

This paper studies pulse width modulation (PWM) techniques suitable for a four-level five-phase open-end winding (OeW) drive. The drive comprises a five-phase induction machine, supplied using two two-level voltage source inverters with isolated and unequal dc-link voltages, in the ratio 2:1. A decoupled carrier-based (CB) PWM modulation strategy, based on unequal voltage reference sharing between the two converters, is introduced in this paper. The stability of dc-link voltages in OeW drives is investigated next, using a novel analysis technique. Several modulation methods are analyzed and the results show that application of the coupled PWM technique, with carriers having in-phase disposition, leads to overcharging of the capacitor in the dc-link of the inverter intended to operate with the lower dc-link voltage. On the other hand, the proposed decoupled CB PWM scheme naturally eliminates the dc-link capacitor overcharging problem. These findings are verified experimentally, using open-loop V/f control. Two different decoupled CB modulation methods are compared and the best performing modulation method is selected and incorporated further into an OeW drive with field-oriented control. The presented steady state and transient experimental results demonstrate that the decoupled CB PWM technique is suitable for high-performance variable speed drive applications. [ABSTRACT FROM AUTHOR]

A quasi-Z-source modular cascaded converter (qZS-MCC) is proposed for dc integration of high-power photovoltaic (PV) systems. The qZS-MCC comprises series-connected front-end isolated qZS half-bridge (HB) dc–dc converter submodules (SMs). With the front-end isolation, the qZS-MCC achieves high-voltage dc capability, while maintaining modularity and PV panel grounded. The post-stage qZS-HB handles the PV voltage and power flows, dc-link voltage balance, and output-series power integration. Whereas, the front-end isolation converters of all SMs perform a constant duty cycle, lowing the control complexity. There is no double-line-frequency power flowing through the dc-side PV panels, qZS inductors, and qZS capacitors in the qZS-MCC, so small qZS impedance is possible compared to the existing qZS cascaded multilevel inverter. The configuration, operating principle, power loss evaluation, and passive components design of the proposed system are investigated in this part of the paper. The system control, modeling, and corresponding verifications are stated in Part II of this paper. [ABSTRACT FROM PUBLISHER]

A modified-virtual-space-vector-based dc-link voltage balancing strategy is proposed in this paper for a three-level inverter. In the proposed strategy, the summation of the three-phase currents for virtual vector needs not to be zero and it also keeps the two capacitor voltages balanced with wider range of load variations. The duty cycles for all the power switches are also derived in this paper using a nearest three-voltage vector scheme. Due to the reduced use of the medium voltage vectors, the proposed control strategy can considerably decrease the neutral-point voltage fluctuation for lower power-factor-based loads as well. Detailed simulation and experimental studies are also carried out to show the effectiveness of the proposed system with a dc-link voltage balancing strategy with permanent magnet synchronous machine. Voltage and current harmonic distortions are also presented with change in modulation index. A Dspace-based real-time operating system is used for real-time implementation with a 6.0-kW surface permanent magnet synchronous motor. [ABSTRACT FROM PUBLISHER]

This paper presents a model predictive control technique applied to a dual-active bridge inverter where one of the bridges is floating. The proposed floating bridge topology eliminates the need for isolation transformer in a dual inverter system and therefore reduces the size, weight, and losses in the system. To achieve multilevel output voltage waveforms, the floating inverter dc-link capacitor is charged to the half of the main dc-link voltage. A finite-set model predictive control technique is used to control the load current of the converter as well as the floating capacitor voltage. Model predictive control does not require any switching sequence design or complex switching time calculations as used for space vector modulation; thus, the technique has some advantages in this application. A detailed analysis of the converter as well as the predictive control strategy is given in this paper. Simulation and experimental results to validate the approach are also presented. [ABSTRACT FROM PUBLISHER]

This paper presents a new reconfiguration module for asymmetrical multilevel inverters in which the capacitors are used as the dc links to create the levels for staircase waveforms. This configuration of the multilevel converter makes a reduction in dc sources. On the other hand, it is possible to generate 13 levels with lower dc sources. The proposed module of the multilevel inverter generates 13 levels with two unequal dc sources (2VDC and 1VDC). It also involves two chargeable capacitors and 14 semiconductor switches. The capacitors are self-charging without any extra circuit. The lower number of components makes it desirable to be used in wide range of applications. The module is schematized as two back-to-back T-type inverters and some other switches around it. Also, it can be connected as a cascade modular which leads to a modular topology with more voltage levels at higher voltages. The proposed module makes the inherent creation of the negative voltage levels without any additional circuit (such as H-bridge circuit). Nearest level control switching modulation scheme is applied to achieve high-quality sinusoidal output voltage. Simulations are executed in MATLAB/Simulink and a prototype is implemented in the power electronics laboratory in which the simulation and experimental results show a good performance. [ABSTRACT FROM AUTHOR]

Impedance-source inverters using coupled inductors have been investigated as alternatives for providing high step-up voltages. However, leakage inductances of the coupled inductors have commonly led to lower overall effectiveness, in addition to generating high dc-link voltage spikes. The latter raises voltage stresses of switches, which in turn, may reduce the power levels of the inverters. A high step-up Y-source inverter has therefore been proposed in this paper to provide a high boost with a smooth dc-link voltage ensured by proper recycling of the leakage energy. These features have been verified by comparing simulation and experimental results of an existing Y-source and the proposed inverters. Factors compared are their respective boost ratios, voltage stresses, current stresses, and dc-link voltage spikes. [ABSTRACT FROM AUTHOR]

Modular multilevel converters are increasingly being considered or used for various medium voltage applications. Multiple control methods have been proposed for the control of the direct to three-phase modular multilevel converter. They differ one from another in the way the capacitor voltage ripples are handled, i.e., either neglected, estimated, reconstructed by filtering or measured. This has implications on the performance level that can be obtained. This paper provides insights on the advantages and drawbacks of each control method, in inverter and rectifier mode, with a fair and thorough assessment supported by extensive simulations, with converter ratings that are realistic for medium voltage applications. Finally, this works highlights the impact of the higher dynamics for medium voltage direct current (dc) applications compared to high voltage dc ones on the choice of the control method. [ABSTRACT FROM AUTHOR]

A 1-φ hybrid nine-level inverter (H9LI) topology has been proposed in this paper. The proposed H9LI topology uses a simple phase disposition pulsewidth modulation strategy to generate nine-voltage levels in the output. The main advantage of this topology is that it has a low switch count (ten switches) compared to the existing nine-level inverter topologies. To regulate the voltage across auxiliary capacitor, two innovative control techniques are proposed, which are integrated with the inverter modulation technique itself. Hence, it does not require any extra voltage balancing circuits to maintain the voltage across the auxiliary capacitor and input dc capacitors. A major advantage of these control techniques is that they eliminate the sensing of the coupled inductor current. Another significant advantage of H9LI is that loss distribution among all the power switches is more uniform compared to existing nine-level inverters. Due to low part count and absence of extra voltage balancing circuits, the H9LI achieves higher efficiency (η ≍ 94.5%) and lower cost. Furthermore, the requirement of filter size reduces due to the presence of coupled inductor in H9LI. The proposed 1-φ grid connected H9LI is verified through MATLAB/Simulink simulations and validated through experiments on a laboratory prototype of 400-VA rating. [ABSTRACT FROM AUTHOR]

Electromagnetic interference (EMI) has drawn great attention in recent years. In this particular case, it is generated by the three-phase inverters in power electronics applications due to the power devices turningonandoffat high frequency. In this paper, in order to alleviate such EMI noise, a high-frequency common-mode (CM) equivalent model is developed, which leverages the effect of parasitic parameters. Meanwhile, in order to eliminate the effect of the parasitic capacitance between the phase node and ground, which is the cause of main CM noise propagation, a coupled inductor connected with a capacitor circuit, which is equivalent to a negative capacitance is proposed. The parameter calculation for the passive negative capacitance circuit is given in detail. The experimental results demonstrated the effectiveness of the circuitry structure and its ability to reduce CM noise. [ABSTRACT FROM AUTHOR]

In this paper, a novel space-vector pulsewidth modulation technique for a five-level active neutral-point clamped (5L-ANPC) inverter is proposed to eliminate the common-mode voltage (CMV). For the 5L-ANPC inverter, which produces a good output voltage performance and lowdv/dt, the total 125 voltage vectors can be generated, among which the proposed scheme employs only 19 voltage vectors producing a zero CMV. Due to the limitation of voltage vectors selected, the dc-link capacitor voltages of the 5L-ANPC inverter cannot be balanced by themselves. Therefore, the capacitor voltages of the inverter should be controlled by choosing the redundant switching states appropriately. The validity of the proposed modulation scheme has been verified by simulation and experimental results. [ABSTRACT FROM AUTHOR]

The three-phase four-wire inverter with split dc-link capacitors can supply unbalanced loads. For the purpose of reducing the filter inductors, a neutral inductor could be introduced into the neutral line. This paper analyzes the operation principle of the three-phase four-wire inverter with split dc-link capacitors when a neutral inductor is introduced. It is illustrated that the neutral inductor can reduce the zero-sequence switching harmonics in the voltages between the phase-leg midpoints and the output neutral point, thus the filter inductors can be reduced. The optimized design of the neutral inductor and filter inductors is proposed with the considerations of the inductor current ripple, the ability of supplying unbalanced loads, and the total energy stored in the inductors. The equivalent circuits of the three-phase four-wire inverter with split dc-link capacitors and neutral inductor is derived in the α–β–0 frame, and the zero-axis voltage regulator is modified to suppress the third-order harmonic in the zero-sequence current caused by the deadtime of the drive signals for the power switches. Finally, the experimental results from a 9-kW prototype are provided to prove the effectiveness of the proposed optimized design of the neutral inductor and filter inductors and the control strategy of the inverter. [ABSTRACT FROM AUTHOR]

This paper proposes a new diode-clamped multilevel inverter that can effectively balance the voltages of dc capacitors. For the proposed inverter, the inductors are inserted between the diodes and the main switches. Also, the voltage balance of the dc capacitors can be guaranteed by controlling the opening time of the corresponding main switches in particular modes. Thus, the parallel circuits on the dc side in the conventional inverters are canceled. Consequently, the proposed topology requires fewer switches, diodes, and capacitors, although it adds the compensation currents to the corresponding main switches. Both the simulation and experimental results demonstrate the suitability and applicability of the proposed topology. [ABSTRACT FROM AUTHOR]

This paper proposes a control method for a five-level hybrid flying-capacitor (5L-HFC) inverter, of which structure stems from the conventional five-level active neutral-point-clamped (5L-ANPC) topology by dividing the dc-link stage into three series-connected capacitors. In this inverter, the voltage stress on the power switches connected to the dc link is reduced by a half compared with that of the 5L-ANPC topology, thus the lower number of equally voltage-rated power devices can be employed. Also, the power losses in the 5L-HFC inverter are more evenly distributed than in the 5L-ANPC. In order to balance the dc-link capacitor voltages, a third-order harmonic offset injection is applied. When a diode rectifier is used to supply the dc bus voltage, the balancing method is not effective if the modulation index is higher than 0.64. Thus, an auxiliary circuit is needed to support the balancing of the dc-link capacitor voltages. However, the unbalancing problem can be overcome in a full-range operation without the auxiliary circuit if the back-to-back configuration is utilized. Finally, simulation and experiment results have verified the performance of the 5L-HFC inverter with the proposed control method. [ABSTRACT FROM AUTHOR]

LCL-filter-based grid-tie inverters require damping for the current-loop stability. There are only software modifications in active damping, whereas resistors are added in passive damping. Although passive damping incurs in additional losses, it is widely used because of its simplicity. This paper considers the active damping in medium-voltage parallel inverters for wind turbines. Due to cost reasons, only minimal software changes are allowed and no extra sensors can be used. The procedure must be robust against line-inductance variations in weak grids. Double-update mode is needed so the resonance frequency is under the Nyquist limit. The bandwidth reduction when using active damping is also required to be known beforehand. Moreover, the design procedure should be simple without requiring numerous trial-and-error iterations. In spite of the abundant literature, the options are limited under these circumstances. Filter-based solutions are appropriate and a new procedure for tuning the notch filter is proposed. However, this procedure requires that the resistance of the inductors is known and a novel filter-based solution is proposed that uses lag filters. The lag filters displace the phase angle at the resonance frequency so that the Nyquist stability criterion is fulfilled. Simulations and experiments with a 100-kVA prototype validate the analysis. [ABSTRACT FROM AUTHOR]

Due to current sensor errors, tolerance of power switching devices, and asymmetry of PWM gating driving pulses, grid-connected inverters without isolation transformer usually have certain amount of dc components injected to the ac grid. Many efforts, such as using a blocking capacitor, a current dc component feedback control, and a voltage dc component feedback control have been introduced to try to suppress the dc injection to the grid. This paper proposes a novel control strategy of suppressing dc current injection to the grid for a three-phase inverter by accurately sensing the dc component of line voltages of three-phase inverter and adding a dc component control loop. A dc suppression control scheme is presented, and the suppression performance of the proposed dc rejection method is evaluated and compared with the traditional method. Finally, the control scheme is verified on a 20-kW three-phase grid-connected inverter. [ABSTRACT FROM AUTHOR]

Inductive power transfer (IPT) for battery charging applications has significant advantages over the traditional plug-in system. Since misalignment between the primary and secondary windings is inevitable, it is of significance to improve the misalignment tolerance of IPT systems with constant-current (CC) and constant-voltage (CV) outputs for battery charging. In this paper, the load-independent output characteristic of the hybrid topology and the function switching between CC and CV of the reconfigurable topology are analyzed. Besides, a hybrid and reconfigurable IPT system with 3-D misalignment tolerance for CC and CV outputs is proposed, simplifying or even canceling control schemes. Moreover, a novel parametric design method is given for the IPT system, which can suppress the fluctuation of the output voltage/current within a certain range of misalignment. In order to validate the performance of the proposed topology, a 1-kW prototype is built, and the corresponding experiments are carried out. In the CC/CV mode, the system can operate with the longitudinal misalignment to 50% when the load varies from 36 to 480 Ω, and the fluctuation of the output current/voltage is within 5%. Similarly, the misalignment in Y- and Z-axis is 12.5% and 33.3%, respectively. [ABSTRACT FROM AUTHOR]

Owing to low cost, small size, and low weight, transformerless inverters became prominent in single-phase grid connected photovoltaic (PV) systems. Key issues pertaining to these inverters include suppression of common mode (CM) leakage current and improvement of conversion efficiency. Achieving higher efficiency in single-phase grid-connected photovoltaic systems depends on the number of stages involved in feeding power to the grid, predominantly, if the PV array voltage is less than the peak value of the grid voltage. In this paper, an integrated dc–dc converter based grid-connected transformerless PV inverter is proposed which is aimed at maintaining high efficiency, even if the PV array voltage falls below the peak value of grid voltage (efficient operation at an extended input voltage range). A modulation strategy is discussed in order to minimize the flow of CM leakage current. Further, the efficiencies of certain transformerless inverter topologies are analyzed and compared with that of the proposed topology. Detailed simulation studies are carried out in MATLAB/Simulink environment to verify the analysis. Experimental results for a scaled down laboratory prototype are included as a proof-of-concept to validate the claims. [ABSTRACT FROM AUTHOR]

In this paper, a modular control approach has been proposed for a single- and three-phase differential-mode Ćuk inverter (DMCI) operating with a recently proposed discontinuous-modulation scheme that offers tangible performance benefits over conventional continuous modulation scheme. The modular control scheme uses a combination of a transformation and adaptive control law to meet tracking requirements in the presence of converter nonlinearity. Experimental results for the single- and three-phase DMCI are provided for startup, steady state, load transition, and total harmonic distortion using different types of loads, which validate the efficacy of the implemented modular tracking controller. Further, detailed stability of the closed-loop DMCI module is provided. [ABSTRACT FROM AUTHOR]