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1. A Light-Weight Neural Network for Wafer Map Classification Based on Data Augmentation.

Author

Tsai, Tsung-Han and Lee, Yu-Chen

Subjects
*BIOLOGICAL neural networks, *SEMICONDUCTOR industry, *ARTIFICIAL neural networks, *DATA augmentation
Abstract

In the semiconductor industry, the testing section has always played an important role. The testing section often requires engineers to judge the defect, which wastes a lot of time and cost. The accurate classification can provide useful information for engineers through neural networks. In this paper, we present a method for wafer map data augmentation and defect classification. Data augmentation is based on CNN encoder-decoder and the classification is based on depthwise separable convolutions. There are two datasets used, one is open dataset WM-811K and the other is built with a Taiwan company. We train two models with mobilenetV1 and V2 for the different datasets. The light-weight deep convolution can reduce model parameters and calculations, which is very efficient for the testing house with large production volumes. On two different data sets, our proposed method can reduce the number of parameters by 30% and 95%, and reduce the amount of calculation by 75% and 25%, respectively. The test accuracy of the first dataset is 93.95%. The second dataset test accuracy is 87.04%. After the data augmentation, accuracy is increased to 97.01% and 95.09%, respectively. [ABSTRACT FROM AUTHOR]

Published
2020
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2. Low-Voltage Low-Power Integrable CMOS Circuit Implementation of Integer- and Fractional–Order FitzHugh–Nagumo Neuron Model.

Author

Khanday, Farooq Ahmad, Kant, Nasir Ali, Dar, Mohammad Rafiq, Zulkifli, Tun Zainal Azni, and Psychalinos, Costas

Subjects
*FIELD programmable analog arrays, *SEMICONDUCTOR manufacturing, *NEURONS, *ANALOG integrated circuits
Abstract

The low-voltage low-power sinh-domain (SD) implementations of integer- and fractional-order FitzHugh–Nagumo (FHN) neuron model have been introduced in this paper. Besides, the effect of fractional-orders on the external excitation current and dynamics of the neuron has been examined in this paper. The proposed SD designs of FHN neuron model have the benefits of: 1) low-voltage operation; 2) integrability, due to resistor-less design and the employment of only grounded components; 3) electronic tunability of performance parameters; and 4) low-power implementation due to the inherent properties of SD technique. HSPICE simulator tool and Taiwan Semiconductor Manufacturing Company, Hsinchu, Taiwan 130-nm CMOS process was used to evaluate and verify the correct functioning of the model. In addition, to experimentally verify the operation of the proposed fractional-order FHN neuron model, field-programmable analog array (FPAA) implementation of the model has been presented, and the proper functioning of the model has been verified. To the best of the authors’ knowledge, this is the first paper that describes the electronic realization of the fractional-order FHN neuron model. In addition, it is the first time that the FPAA implementation of any fractional-order neuron model has been presented. [ABSTRACT FROM AUTHOR]

Published
2019
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