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This paper describes a flow control of the dye in the paper mill with the quasi-Z-source indirect matrix converter (QZSIMC) fed induction motor drive. More than a decade the voltage-source inverter (VSI) and current-source inverter (CSI) have been used to control the speed of the induction motor, which in turns controls the flow of dye. Recently, the matrix converter (MC) has been an excellent competitor for the VSI or CSI for its compactness. The voltage transfer ratio of the VSI, CSI, and MC has been limited to 0.866. Thus, the efficiency of these converters is less. To improve the voltage transfer ratio the quasi-Z-source network (QZSN) is to be used between voltage source and indirect MC (IMC). The modification in the shoot-through duty ratio of the QZSN varies the voltage transfer ratio greater than 0.866. Different voltage transfer ratios are needed for different voltage sag conditions. For a variation of the duty ratio of the QZSN, the fuzzy logic controller has been presented. To control the IMC vector control with space vector modulation has been presented. This paper proposes the implementation of QZSIMC adjustable speed drive for the flow control of dye in paper mill during different voltage sag conditions. A 4-kW prototype has been built and the effectiveness of the proposed system is verified with simulation results and experimental setup. Simulation is done in MATLAB, Simulink platform. Experimental setup is done with the aid of a TMS320F2812 (Texas Instrument) processor. The experimental results validate the maintenance of the speed of an induction motor at the set condition, thus controlling the perfect flow of dye in paper manufacturing technology. [ABSTRACT FROM AUTHOR]

Conventional half bridge modular multilevel converter (MMC) system will suffer great over-current when there is a dc side fault. Therefore, topology study in sub-modules with dc side fault blocking capability have become one of the hotspots in MMC field. However, fault blocking topologies using conventional IGBT devices must employ more semiconductors than half bridge topology. The extra semiconductor devices employed in the topology will lead to the increase of cost and conduction loss. To reduce the conduction loss of the fault blocking topology, a novel sub-module topology is proposed in this paper. The proposed topology employs reverse blocking devices to form the low conduction loss path. Conduction loss analysis is conducted in this paper to show the priority of the proposed topology. Simulation and experiment results verified the dc fault blocking capability of the proposed topology. [ABSTRACT FROM AUTHOR]

In renewable energy micro-source applications, a wide range of voltage conversion of the step-up converter is an essential part to equalize the typical low voltage of micro-source with DC-bus voltage of Inverter or motor drives. In order to meet this purpose, an ultra-voltage gain step-up DC-DC converter is proposed in this paper. The proposed converter has made an arrangement of the regenerative-boost fed switched inductor and capacitor configurations. Thereby, due to such an organization of structure, the proposed converter can develop an extremely high voltage-gain even at lower duty ratios. In addition, it has the advantage of lower switching stress across all power semi-conductive diodes. Furthermore, this paper describes the steady-state analysis and comparative features of the converter with existing recent literature. Finally, to validate theoretical analysis and test the feasibility and suitability of the proposed ultra-gain converter, the experimental results were observed by a 500 W fabricated prototype. [ABSTRACT FROM AUTHOR]

A novel single-stage doubly grounded transformerless inverter configuration which can buck-boost the output voltage is proposed in this paper. In this transformerless inverter configuration grid neutral is directly connected to PV panel negative rail which suppresses/eliminates the PV leakage currents. In addition, the tracking of maximum power point is possible for wide variation of weather conditions due to buck-boost voltage capability of inverter. Moreover, the proposed inverter topology has symmetrical operation in both half cycles hence injects negligible DC offset current in to the grid. Here the symmetrical operation of inverter is achieved due to one inductor is used for both half cycles of the grid. The proposed topology is realized using five switches, two of which work at 50 Hz and remaining three switches at high frequency which reduces overall semiconductor losses. Further, the proposed inverter topology is controlled through a newly developed modulation technique and possible working modes are analyzed and described thoroughly. For performance validation, the experimental analysis of grid connected proposed inverter is performed on a 1 kVA system and results show that proposed inverter feeds power in to the grid with lesser THD while achieving greater efficiency. [ABSTRACT FROM AUTHOR]

The use of power converters as solid state transformers is an attractive solution to modernize the power network, but this solution has not been fully addressed for MV and HV substations. This paper presents a customized and simple control for the Modular Multilevel Matrix Converter (M3C), specially conceived for its operation on synchronous ports, which is the case of AC substations. The control allows bidirectional power transfer, generation/absorption of reactive power and provisions of ancillary services. The converter is compared to the back-to-back Modular Multilevel Converter (B2B-MMC) where the key performance indicators to carry out the comparison are power efficiency, number of semiconductor devices, passive components required, footprint, voltage cell balance, fault blocking capability and stress of components. The simulation results show the features, performance and attractiveness of the M3C topology in a 33/11 kV, 16 MW substation under different operating conditions, including grid faults and dynamic operation. The M3C presents similar efficiency and performance than the B2B-MMC, but it uses fewer semiconductor devices, passive components and total cell capacitor energy than the B2B-MMC, reducing cost and footprint. The experimental results show the performance of the M3C under less ideal conditions including a substation transformer saturation and power step response. [ABSTRACT FROM AUTHOR]

The dc-dc converters with high step-up DC-voltage gain play a vital role in integrating low voltage DC sources. Though several converter topologies are reported in the recent past, attempts have been made to reduce the components, especially the switching devices, passive elements, converter losses, etc., of the converter. A novel DC-DC converter topology, viz., single switched impedance network (SSIN)-based converter with n-stage is proposed in this paper. The operation of the SSIN based converter in continuous and discontinuous conduction modes are discussed. The effect of parasitic elements on DC-voltage gain and efficiency of the SSIN is carried out. The small-signal model of the SSIN converter is derived. The performance of the SSIN converter is compared with the similar converter topologies. The 500 W prototypes of the SSIN with n = 1 and n = 2 are fabricated, and the experimental results are presented in this paper. To improve the converter performance, SiC-based semiconductor devices are used. The SSIN converter with two-stage has low switch loss at 500 W load, improved efficiency during high power and high output voltage operation, the switch stress of Vo/2, etc. [ABSTRACT FROM AUTHOR]

When a fault occurs on the dc side of the voltage source converter based high voltage direct current (VSC-HVDC) transmission system, the fault current rises quickly due to the low damping of the dc system. Using a dc fault current limiter (DC-FCL) to limit the rise of the fault current can significantly reduce the breaking requirements of the DCCB. A topology of a bidirectional active dc fault current limiter (BA-FCL) based on coupled inductor is proposed in this paper. No expensive full-controlled power electronic devices are used in this topology. Only a few half-controlled power electronic devices are used to achieve active control of the current limiting unit. Compared with many topologies of current limiter at present, the fault current limiting effect of BA-FCL is improved significantly while the cost, volume, topology complexity, and control complexity are reduced. The stress analysis and parameter design of the proposed current limiter are carried out. Finally, the simulation case study and hardware experiment are implemented to verify the good economy and current limiting performance of the proposed topology. [ABSTRACT FROM AUTHOR]

The modular multilevel converter (MMC), owing to the presence of a large number of submodules (SMs) and energy storing elements, requires a large footprint and initial investment. To address these issues, this paper proposes the switched modular multilevel converter (SMMC). It consists of two major elements; the chain-links (CLs), consisting of cascade connection of SMs as in MMC, and the single-pole-triple-throw (SPTT) switches, which can be realized using either the T-type or NPC-type switch strings. The SMMC works on the principle of connecting all the phase-legs in series and their respective positions are mutually interchanged. It offers a compact structure as the SMs count is reduced to 33% of MMC, which results in a much lower energy storage requirement. Furthermore, it does not have inter-phase circulating current problem and hence the CL inductors can also be avoided. The SMMC structure, operating principles, control, and modulation schemes are explained in detail. A detailed comparison of SMMC with the other major existing converters is carried out to highlight the important features of SMMC. The efficacy of SMMC is validated using PSCAD simulation studies with a 19-level grid-connected SMMC model. A 3-phase 19-level SMMC laboratory prototype is developed to further validate its feasibility. [ABSTRACT FROM AUTHOR]

As high-speed railways develop rapidly worldwide, the problems of neutral section and power quality are becoming increasingly prominent. These problems affect the normal operation of the power grid and the electric locomotives. The co-phase power supply schemes were proposed by researchers, which can solve these problems well. Among them, the MMC-based scheme (MMC-5 L) is a representative one. The existing scheme, when applied to the auto-transformer (AT)-fed system which is usually adopted by high-speed railways, needs to install an auto-transformer on the output side. To eliminate the auto-transformer and to obtain the more suitable and superior co-phase power supply schemes to AT-fed system, two improved schemes are proposed in this paper based on the novel MMC-based scheme (MMC-6 L) we proposed before. While establishing the mathematical model, creating the control system, and carrying out simulation verification of the proposed schemes, the proposed schemes are compared with MMC-6 L and MMC-5 L in terms of topological characteristics, control system complexity, power loss, and functionality. The results show that while the proposed schemes can fulfill the functions of the co-phase power supply scheme well like the MMC-5 L and MMC-6 L, they are more suitable and superior for the AT-fed system in terms of control system complexity and power loss. Among them, MMC-5L1CB performs best in power loss, and MMC-4L2CB performs best in control system complexity. [ABSTRACT FROM AUTHOR]

Differential power processing (DPP) converters have been developed for photovoltaic (PV) panels to preclude energy yield reduction due to partial shading. In large-scale PV systems comprising numerous series-connected panels, DPP converters with good modularity are preferable because the number of series-connected panels varies depending on applications. This paper proposes a switched capacitor converter (SCC)-based modular DPP architecture for large-scale PV systems. Four panels are grouped as a module, each having a panel-level DPP converter, and modules are connected in series to form a string. The design of the panel-level DPP converter is fixed while the system can be arbitrarily extended by stacking modules, achieving good modularity. Adjacent panel-level DPP converters are dc-coupled, by which modules can be connected using long cables, mitigating installation limitations. The experimental results of the laboratory and field testing demonstrated the energy yield enhancement by 10%–20%, depending on shading conditions. [ABSTRACT FROM AUTHOR]

The paper develops two computationally efficient models, namely a detailed equivalent model and an average-value model, with provisions for representation of the critical state of converter blocking, for modular multilevel converters with embedded storage. These models are indispensable in the simulation of dc faults. The developed detailed equivalent model provides accuracy that matches electromagnetic transient (EMT) simulations, with much reduced computational burden; the developed average-value model represents the averaged behavior of the converter by neglecting switching transients. Both models are extensively evaluated in the context of an HVDC system against benchmark results form a detailed switching model developed in PSCAD/EMTDC. The results confirm the validity and accuracy of the models for steady state, transient, and faulted operating conditions including when the converter is blocked in response to a dc fault. [ABSTRACT FROM AUTHOR]

This paper proposes a novel dual input nine-level inverter (DINLI) topology which requires only seven controllable devices. The dual inputs are un-identical DC voltage sources in the ratio 1:3. A simple control scheme is derived by appropriately modifying the phase disposition pulse width modulation technique to generate high-quality 9-level output from the DINLI topology. At any given instant, a maximum of four switches conduct out of which only a maximum of two switches operate at high frequency, bringing down the switching and conduction losses significantly and improving the overall system efficiency. The bidirectional DINLI (BDINLI) topology with reactive power capability can be realized by replacing the unidirectional devices with the controlled switches (i.e., total nine switches). In addition, the proposed DINLI topology does not require extra voltage balancing circuits which further improves the efficiency. The DINLI operation is verified through MATLAB simulations for grid-connected applications and its extension to an n-level, 3-phase application is also investigated. Experiments performed on a 1KVA laboratory prototype to validate the theoretical claims. [ABSTRACT FROM AUTHOR]

The single-phase-to-ground (SPG) fault at the valve side of the converter transformer is one of the most critical faults threatening the operation of bipolar half-bridge modular-multilevel-converter-based multi-terminal direct-current (HB-MMC MTDC) systems. Following a valve-side SPG fault, the upper-arm submodule (SM) capacitors in the faulty converter may suffer a serious overvoltage, and the grid-side fault currents may experience no zero-crossings. The existing protection methods generally rely on tripping the grid-side alternate-current circuit-breaker (ACCB), which cannot fully isolate the fault. The healthy poles and stations may encounter severe disturbance and be all blocked, which will lead to a power outage of the entire MTDC system. This paper proposes an ACCB-independent scheme based on thyristor-pairs and damping SMs to address these problems. Antiparallel thyristor-pairs are connected in series within the upper and lower arms in each phase. Serial damping SMs are connected within the lower arms to help the lower-arm thyristor pairs cut off the fault currents. Although the proposed additional devices inevitably cause conduction losses, they can effectively protect the faulty converter and healthy circuit in the MTDC system. Simulations in PSCAD/EMTDC have been conducted to verify the effectiveness of the proposed strategy. [ABSTRACT FROM AUTHOR]

The HVDC systems have been employing modular multilevel converters (MMC) due to their unique high voltage high power potential. However, the lack of fault ride-through capability imposes restrictions on MMCs that are based on half-bridge (HB) modules. Since it is necessary to limit the fault currents to protect MMCs from serious short circuit faults against pole-to-pole DC fault, several protection schemes have been introduced to deal with the DC short circuit faults. This paper proposes a new hybrid MMC protective topology consisting of a combination of the HB and three-quarter-bridge (TQB) modules. The TQB behaves like an HB under normal operation and has low power losses compared to other protective topologies. Modulation and control of this configuration are like HB-based MMC. In the proposed hybrid protective topology, during a pole to pole DC fault, the fault current can be either blocked or be limited by TQB-SMs. Both simulations and experiments were performed to verify the operation of the suggested hybrid MMC in different modes of operation. [ABSTRACT FROM AUTHOR]

Miniaturization and low cost contribute to the development and popularization of wireless power transfer (WPT). Reducing the number of power conversion stages can reduce the volume and cost of the WPT converter, and even make it possible to improve the efficiency. A single-stage WPT converter with constant current (CC) and constant voltage (CV) output and its asymmetric modulation method are proposed in this paper. A direct AC-AC converter is applied to the primary side of the WPT converter to directly convert line-frequency AC to high-frequency AC. The applied direct AC-AC converter that can replace the commonly used multi-stage primary converter reduces the number of circuit devices, thereby reducing the volume and cost of primary converter. The proposed WPT converter can realize zero voltage switching (ZVS) and power factor correction (PFC). In order to achieve CC and CV output, a switchable hybrid compensation topology is applied to the proposed WPT converter. A 720-W experimental prototype was manufactured to verify the rationality of the proposed WPT converter and the correctness of the theoretical analysis. [ABSTRACT FROM AUTHOR]

The missing capability of DC fault current limitation is an inherent disadvantage in the typical half-bridge modular multilevel converter (MMC), which restricts its application in long-distance high voltage direct current (HVDC) systems. The full-bridge submodule (FBSM) and clamped double submodule (CDSM) topologies allow for fault current self-clearing, but also suffer from additional hardware cost and power losses. In this paper, an improved submodule topology utilizing the new reverse-blocking insulated gate bipolar transistor (RB-IGBT) is proposed to improve system economy without compromising its performance. The operating principles and DC fault characteristics of the proposed topology are analyzed in details, including comparison with various topologies in terms of cost, losses, fault current clearing speed and thermal. Compared with the traditional CDSM topology, the proposed RBSM can clear DC faults faster with reduced cost of switching devices. A DC fault protection strategy for MMC-HVDC system is also presented. Simulation results under normal operating, permanent and transient fault conditions are carried out to verify the effectiveness of the proposed topology. [ABSTRACT FROM AUTHOR]

Modular multilevel converters (MMCs) have been recognized as the most attractive technology for high voltage direct current (HVDC) applications during the last years. Their advantages include the ability to freely control the internally stored energy in the distributed submodules (SMs) and to independently control AC and DC powers. Recent studies showed that an MMC can take advantage of this degree of freedom to supply ancillary services with low energy requirements such as frequency response or power oscillation damping by connecting energy storage systems (ESSs) to its SM capacitors. This paper proposes a modular DC-DC converter as an interface between the energy storage element and the SM capacitor. As it can be built with switches allowing a high switching frequency, it is shown that the volume of the passive components can be reduced in comparison with interface converters known in the literature. The proposed control strategy avoids to transfer the harmonics of a SM to the ESS that prevents to drastically oversize the system. The proposed control method also provides an appropriate energy exchange without affecting the control philosophy of an MMC and it addresses balancing issues. Simulations and a downscaled prototype confirm the relevance of the proposed control. As the proposed interface converter is able to track the power reference with fast dynamics, it provides the same system-level advantages as other interface converters known in the literature but with a reduced volume. [ABSTRACT FROM AUTHOR]

This paper presents a new power electronic topology for a STATCOM allowing the generation of multilevel AC voltages. This topology is characterized by a modular configuration since it uses two well known four-leg two-level voltage source inverters. A Scott transformer with multiple secondary windings connects the two four-leg inverters to the grid. One of the important features of the proposed power topology is the capability to generate AC voltages with high number of levels, in spite of using only two four-leg two-level voltage source inverters. To maximize the number of voltage levels a geometric progression ratio of 3 between the windings of the transformers connected in cascade is proposed. However, to reduce the turns-ratio span, alternatively a fractional geometric ratio of 1.5 is also proposed and analyzed. A control strategy adapted to the proposed power converter topology is also presented. Besides the control of the reactive power the regulation of the four-leg inverter DC voltage will also be considered. To support the theoretical studies and assumptions, simulations and experiments are presented. Experimental results were obtained using a low power laboratory prototype. The results shown give evidence to the characteristics and features of the proposed power converter topology and control system. [ABSTRACT FROM AUTHOR]

A multi-level boost topology based on a flying capacitor is compared in this work with the hybrid, multi-level, partial power processing topology already presented in the literature for use as a highly efficient and compact dc/dc stage in 1500-V, two-stage, grid-connected PV systems. Different variations of the resonant stage of the hybrid topology are analyzed and compared in terms of losses, volume and complexity. Full multivariable optimization is conducted for the multi-level boost topology with different number of levels and for all the analyzed variations of the resonant stage of the hybrid topology. Appropriately rated new classes of 650-V and 900-V WBG devices are included in the optimization algorithm. It is concluded that due to the dominant conduction losses and gap in the voltage rating of the commercially available WBG devices between 650V and 200V, increase of the number of levels over 4 leads to the deteriorated loss and volume performances. All the analysis related to the resonant stage of the hybrid topology is confirmed by detailed and comprehensive measurements of two prototypes of 4kW of nominal and 7kW of maximal power. Additionally, all the loss models applied in the optimization algorithms presented in this paper are confirmed by detailed measurements, thermal calibration and finite element thermal simulations of the wide bandgap devices and inductor designs employed in this work. [ABSTRACT FROM AUTHOR]

The hybrid dc circuit breaker (HDCCB) is one of the most promising solutions for the dc interruption. But the power electronics-based load commutation switch (LCS) in the main current path causes the high on-state loss and cost, which inhibits the application of the HDCCB. In this paper, a novel hybrid dc circuit breaker is proposed, in which the vacuum interrupter with the external transverse magnetic field (ETMF) is designed to improve the arc voltage and thus enhance the current commutation to power electronics. The ETMF-based vacuum interrupter achieves the fast current commutation instead of the LCS, which realizes the low on-state loss and cost while preserving the short commutation and interruption time. The arc voltage characteristic with ETMF is analyzed, and the influence of the different factors on the commutation time and di/dt before current zero are investigated in detail. Based on the calculation results, a 10 kV dc breaker prototype based on the proposed topology is developed with the breaking current of 15.5 kA. Finally, the application of the proposed scheme in HVdc grids is discussed. [ABSTRACT FROM AUTHOR]

This article investigates energy storage requirements in the submodules of a class of converters known as hybrid cascaded modular multilvel converters (HC-MMCs). The complexities arising from the usage of different submodule types and their non-conventional arrangement necessitate detailed analysis of submodule capacitor voltage ripples, which are needed for development of guidelines for sizing submodule capacitors. This paper characterizes electric charge variations in the submodule capacitors to derive expressions for capacitor voltage ripples, and to determine the energy storage requirements of the converter. The paper uses detailed electromagnetic transient (EMT) simulations and experimental results on a laboratory-scale MMC setup to verify and validate its findings. [ABSTRACT FROM AUTHOR]

This paper presents a reduced-stage three-phase isolated AC/DC converter topology used for auxiliary power units (APUs) in avionics and electric vehicle (EV) applications. Traditional two-stage cascaded AC/DC converters are widely used for these applications due to their ease of implementation and simple control schemes. With the objective of improving the power density of the APUs, the proposed converter achieves reduction in the number of active power devices along with a smaller DC link capacitance by implementing an unconventional structure with a bandpass filter, to allow only the required frequency components to transfer the rated power. To accurately characterize the proposed converter, a detailed formulation of the filter design for the circuit along with mathematical derivation of the control scheme is presented. In terms of achieving enhancement in the overall efficiency, a comparative study is presented that focusses on the conduction and switching losses incurred in the proposed topology as compared to the state of the art (SOA) two-stage AC/DC conversion topologies. The analyses portray efficiency improvement of 0.8% for a 6 kW rated load, with significant reduction in active device losses. Additionally, to support the formulations and derivations, simulation studies and experimental verifications are also presented. The results show an input power factor of 0.9918 (lagging) with a conversion efficiency of 97.6%, a tightly regulated output voltage with less than 1% peak-peak ripple and the input current total harmonic distortion (THD) of as low as 1.57%. [ABSTRACT FROM AUTHOR]

Modular multilevel converter (MMC) has been widely used in the multi-terminal overhead line high-voltage direct current (HVDC) system due to its outstanding performance. However, the AC side and the DC side of MMC-HVDC have a strong interaction and will be affected by each other's faults, which brings the risk of system instability. In this paper, a modified MMC named active MMC with embedded energy storage in submodules (SMs) is proposed to isolate the impact of faults as a firewall. Firstly, the topologies of the active MMC and SMs with energy storage are introduced. Then the operation principle of the active MMC under different faults is analyzed in a multi-terminal MMC-HVDC system. Thirdly, the complete control scheme of the active MMC is proposed for bidirectional fault isolation. Finally, two main application scenarios of the active MMC are simulated in a three-terminal MMC-HVDC system and a particularly designed AC/DC hybrid transmission system respectively in PSCAD/EMTDC. The simulation waveforms of the active MMC are compared with the conventional MMC. Simulation results show that the active MMC can effectively protect the AC system and DC system from each other's faults. [ABSTRACT FROM AUTHOR]

This paper discusses the analysis and experimental validation of bidirectional Z-source breaker and bidirectional Z-source breaker using coupled inductor for low-voltage dc microgrid application. The proposed topologies use an SCR as a switch to isolate the fault from the system, and LC network to generate required commutation conditions for the SCR under fault conditions. Thus, both topologies are able to isolate the fault naturally within a few microseconds without any fault detection and sensing circuit. In this paper, the breaker operating principle is discussed during fault condition and breaker design criteria are derived. When the breaker is connected in series with power electronic converter, Z-source components offer filtering characteristic. The filtering characteristic offered by the breaker components is analyzed. Functional prototypes are developed for both configurations to validate the breaker performance and experimental results are presented. [ABSTRACT FROM AUTHOR]

This paper proposes a novel polygonal voltage space vector structure (SVS) having 30 sides, for a star-connected induction motor drive. The SVS eliminates the presence of harmonics up to 25th order from motor phase voltage throughout the entire modulation range, providing a torque profile devoid of lower order pulsations. Linear modulation is extended till 99.63% of base speed without exceeding the motor phase voltage rating. Topology consists of a dc-link fed primary inverter and two equal low voltage modular capacitor fed secondary inverters. Here the harmonics generated by the primary inverter is canceled by the secondary inverter which acts as a switched capacitive filter. Detailed description of the SVS generation and timing calculations are provided in this paper. Effectiveness of the proposed scheme is validated using experimental results, inverter loss calculations, and harmonic analysis. [ABSTRACT FROM AUTHOR]

The series bridge converter (SBC) is a modular multilevel converter (MMC) recently developed to enhance power density in high-voltage high-power applications. The MMC is a well-established solution, widely researched, and exploited in practical HVdc connections, thanks to its high power quality and high efficiency. However, the main limitation of the MMC is the relatively large energy storage, also due to the fact that power ripples in the submodule capacitors include a component at the fundamental ac frequency. As a result, volume becomes critical in applications such as offshore or city center in-feeds, where space is restricted and expensive. The SBC offers a more compact footprint by exploiting a series connection on the dc side and by operating the submodules with rectified waveforms, thus moving the minimum component of the instantaneous power to twice the ac fundamental and reducing capacitors size. The drawback of the converter is a more complex energy control compared to the MMC. This paper proposes the first experimental validation of the SBC, using a 2-kW laboratory-scale prototype. Since the basic converter design has been discussed in previous papers, the focus of this paper is on converter control design and experimental validation. [ABSTRACT FROM AUTHOR]

Four-level hybrid-clamped inverter is a newly proposed topology that can operate under a wide voltage range without switches connected in series. However, when it is applied in medium voltage high power conversions, the flying capacitors in each phase will occupy a huge volume and a high switching frequency is required to restrain the voltage ripples. In order to overcome this drawback, a four-level active neutral-point clamped inverter is discussed in this paper, which consists of only six switches and no diodes or flying capacitors are required. In order to balance the neutral-point voltages under the full power factor and modulation index range, a capacitor voltage balance method based on carrier-overlapped pulsewidth modulation is proposed in this paper. The upper and lower dc-link capacitor voltages are balanced by zero-sequence voltage injection and the central dc-link capacitor voltage is balanced by adjusting the duty cycles of switching signals slightly. Simulation and experimental results are presented to confirm the validity of this method. [ABSTRACT FROM AUTHOR]

This paper presents a 5-level inverter topology for open-end induction motor drives by using a single dc source. The open stator windings of the drive are supplied with a 3-level flying capacitor inverter from one end and capacitor-fed 2-level inverter from another end. The voltage ratio of the dc link to the capacitor in 2-level inverter is maintained at 4:1 ratio to generate five-level voltage output. The capacitor in 2-level inverter is balanced by the switching redundant vector combinations from both the inverters while the floating capacitors in the 3-level inverter are balanced by using redundant switching states. The proposed topology gives 5-level operation with less number of floating capacitors and power semiconductor switches compared to other existing topologies. Also, the balancing of the capacitors is independent of load power factor and modulation index. Further, the generalization of the proposed dual inverter scheme for any n-level inverter is also included in this paper. The experimental results and required analysis are also presented to validate the inverter scheme. [ABSTRACT FROM AUTHOR]

The modular multilevel DC converter (M2DC) exploits the interleaving between the three legs of an MMC to realize a promising uninsulated DC/DC converter to interconnect HVDC grids. This paper details a current and energies decoupled model of the M2DC. The major idea proposed in this paper is focused on the full energy control generating optimal current references to minimize the internal currents magnitude. The energy sum and difference models are fully detailed. Both current and energy control loops are based on the model inversion principle in order to control all the state variables. The proposed control is based a dynamic control developed with the model inversion principle associated with an optimization of the current magnitude deduced from a quasi-static analysis. All dynamics of the system are then explicitly controlled, which guarantee a good dynamic behavior during the transient. Therefore, current and energy controls are presented in detail. Simulation results show the dynamic behavior of the converter for various operating points. [ABSTRACT FROM AUTHOR]

This paper presents a unified second-stage LC filter applied in the three-state switching cell buck–boost converter, which provides current and voltage with low ripple and low noise. The unified second-stage filter promotes a reduction in the number of devices while maintaining the filtering performance of the converter, with second-stage LC filters at the input and at the output. Moreover, the unified filter, when associated with a three-state switching cell buck–boost converter, allows a size reduction of filter devices, especially for designs with duty cycle range around 1/2. Furthermore, the unified filter arrangement provides nondissipative clamping of switching devices and reduce the system order when compared to the converter with second-stage LC filters. In this paper, the static and dynamic characteristics of the proposed converter in continuous conduction mode (CCM) are reported. Experimental data were obtained from a laboratory prototype with an input range of 32 $\sim$ 72 V, constant output of 48 V, a load of 150 W, and switching frequency of 45 kHz. The measured efficiency for the rated load was 97% for maximum input voltage. A comparison of the size and performance of the proposed filter with the topology that uses second-stage LC filters at the input and at the output is also presented. [ABSTRACT FROM AUTHOR]

The main technical challenge of the medium-voltage motor drives with modular multilevel converter (MMC) is the serious low-frequency fluctuation on the capacitor voltages, and the existing suppression methods inevitably inject high-frequency circulating currents in MMC. However, the output currents are evidently distorted by the large injected components, while little research has been done to study and solve this problem. This paper analyzes and proves the essential interactions between the output current distortion and the injected components, and the specific dominant output harmonic groups are derived and summarized, revealing the nature of the problem, and it can be taken as a favorable reference for the controller designing. Based on the derivations, this paper proposes a novel suppression method for the greatly improved harmonic characteristics of the output currents during the low-frequency operation. The output harmonics can be accurately measured by the proposed control and effectively suppressed for much lower current total harmonic distortion, benefiting for the superior output control performances with improved efficiency. The simulation results on PSCAD/EMTDC and experimental verifications on a 2.2 kW MMC-based motor drive prototype prove the validity of the presented harmonic analysis and suppression method. [ABSTRACT FROM AUTHOR]

In order to increase the efficiency of modern microprocessor power supplies used in data centers, 380-V dc power distribution systems have been attracting attention due to their high efficiency and high reliability. This paper presents an innovative single-stage approach for 380-V voltage regulator modules (VRMs) based on a quasi-resonant multilevel topology constant on-time operation. The proposed topology inherently integrates the multiphase approach, providing fast phase shedding and flat high-efficiency curves even at light-load conditions. This is a unique advantage, which is not possible to establish in the two-stage approach, which is very important in server architectures, and where high efficiency is required even at light-load conditions. This paper analyzes the circuit topology and proposes a control architecture for fast transient response, including current-sharing capabilities. The digital controller has been implemented in 0.16- $\mu$ m lithography together with a digital pulsewidth modulation with a 195-ps resolution and a 40-MS/s 7-bit analog-to-digital converter. Experimental results show an efficiency of 93% for a 120-A 380–1.8-V VRM power supply. [ABSTRACT FROM AUTHOR]

In this paper, many impedance-source inverters with coupled inductors have been investigated to obtain a high step-up boost ratio. However, the leakage inductors in these topologies induce great voltage spikes at the dc link, which will increase the voltage stress of switches. Thus, the power level of inverters is limited. Furthermore, the efficiency of the inverters can be degraded by the losses associated with leakage inductors. To address abovementioned issues, this paper proposes a family of low-spike high-efficiency Y-source inverters. The proposed inverters have the ability of eliminating voltage spikes at the dc link and recycling the leakage energy via the additional diode and capacitor. In order to show the excellent characteristics of the proposed topologies, this paper compares the performances of the proposed inverters and the improved-Y-source inverter in many aspects. Simulation and experimental results have verified the abilities of the proposed inverters. [ABSTRACT FROM AUTHOR]

Multilevel inverters (MLIs) are playing a pivotal role in the power sector with potential applications, such as interfacing renewable energy sources with the grid and several industrial drive applications. MLIs with a smaller number of switching devices are more promising due to their compact size, reduced cost, and higher efficiency compared with their traditional counterparts. This paper, therefore, presents a new three-phase seven-level inverter. This topology is a combination of two cascade-connected two-level voltage-source inverters (VSIs) and H-bridge cells with flying capacitors (FCs). This paper presents the operating principle and the balancing technique for the dc-link capacitors and FCs. The generation of various output voltage levels and the limitation of the sinusoidal pulsewidth modulation control for FC voltage balancing is also presented. The number of components in the proposed circuit configuration and their voltage ratings are considerably lower compared with the recently proposed topologies. The behavior of the proposed circuit configuration is first assessed with simulation studies and is then tested with a laboratory prototype. The simulation and experimental results validate the effectiveness of the proposed topology and the voltage balancing technique. [ABSTRACT FROM AUTHOR]

This paper presents a novel seven-level inverter topology for medium-voltage high-power applications. It consists of eight active switches and two inner flying capacitor (FC) units forming a similar structure as in a conventional active neutral-point-clamped (ANPC) inverter. This unique arrangement reduces the number of active and passive components. A simple modulation technique reduces cost and complexity in the control system design without compromising reactive power capability. In addition, compared to major conventional seven-level inverter topologies, such as the neutral point clamped, FC, cascaded H-bridge, and ANPC topologies, the new topology reduces the dc-link voltage requirement by 50%. This recued dc-link voltage makes the new topology appealing for various industrial applications. Experimental results from a 2.2-kVA prototype are presented to support the theoretical analysis presented in this paper. The prototype demonstrates a conversion efficiency of around 97.2% ± 1% for a wide load range. [ABSTRACT FROM AUTHOR]

This paper presents bidirectional grid-connected modular multilevel converters (MMC) with direct digital control and division-summation processes to achieve power-injection and rectification functions. A direct digital control is developed to track current references, regulate dc-bus voltage and cell voltage, and balance the upper and lower dc-bus voltages. It can accommodate wide filter-inductance variation and take care of source voltage harmonics to achieve tight current tracking and low distortion output current. Based on the power-balance principle, the commands of arm currents can be determined directly. In this paper, the MMC configuration is introduced first, and then the control laws for current tracking and voltage regulation are derived in detail. Experimental and simulated results obtained from two 50 kW MMCs operated in power-injection and rectification modes have verified the analysis and discussion. [ABSTRACT FROM AUTHOR]

A single-stage TRIAC (TRIode for alternating current switch) dimmable LED (light emitting diode) driver using a buck converter fed through a capacitor input rectifier provides many advantages such as small-scale implementation, low output current ripple, and stable dimming operation. This circuit topology, however, has a serious issue: A large inrush current to the smoothing capacitor. To solve this issue, this paper focuses on a bleeder circuit in the TRIAC dimmable LED driver. This paper presents the mechanism of the large inrush current issue and its relationship to a conventional bleeder circuit. Moreover, this paper proposes a turn-off delay controlled bleeder circuit. The proposed bleeder circuit is analyzed by using its discrete-time state-space model in order to set proper circuit parameters for inrush current reduction. Experimental results demonstrate the inrush current reduction by the proposed method, which leads to a 37% reduction of maximum input current, as well as proper dimming operation and low output current ripple. The proposed method achieves further small-scale implementation, which enhances the advantages of the intended main circuit topology. [ABSTRACT FROM AUTHOR]

This paper presents an interleaved boost converter with a bifold Dickson voltage multiplier suitable for interfacing low-voltage renewable energy sources to high-voltage distribution buses and other applications that require a high-voltage-gain conversion ratio. The proposed converter was constructed from two stages: an interleaved boost stage, which contains two inductors operated by two low-side active switches, and a voltage multiplier cell (VMC) stage, which mainly consists of diodes and capacitors to increase the overall voltage gain. The proposed converter offers a high-voltage-gain ratio with low voltage stress on the semiconductor switches as well as the passive components. This allows the selection of efficient and compact components. Moreover, the required inductance that ensures operation in the continuous conduction mode (CCM) is lower than the one in the conventional interleaved boost converter. The distinction of the proposed converter is that the inductors’ currents are equal, regardless of the number of VMCs. Equal sharing of interleaved boost-stage currents reduces the conduction loss in the active switches as well as the inductors and thus improves the overall efficiency, as the conduction power loss is a quadratic function. In this paper, the theory of operation and steady-state analysis of the proposed converter are illustrated and verified by simulation results. A $\text{200-W}$ hardware prototype was implemented to convert a $\text{20-V}$ input source to a $\text{400-V}$ dc load and validate both the theory and the simulation. [ABSTRACT FROM AUTHOR]

Multilevel inverters (MLIs) are being used in wide range of power electronic applications. These converters have attracted a lot of attention during recent years and exist in different topologies with similar basic concepts. This paper presents five main submodules (SMs) to be used as the basic structures of MLIs. The paper reviews the common MLI topologies from the structural point of view. The topologies are divided into the different SMs to show conventional MLI configurations and future topologies that can be created from the main SMs. A comparative study between different topologies is performed in detail. The MLIs are categorized and investigated with from different perspectives such as the number of components, the ability to create inherent negative voltage, working in regeneration mode and using single dc source. [ABSTRACT FROM AUTHOR]

Reduced switch active phase converters (APC) are cost-effective solutions for running three-phase loads from single-phase grids. This paper proposes a novel auxiliary-capacitor-based APC (AC-APC) for this application. The combination of the topological location of the auxiliary capacitor and the control of the AC-APC reduces current stress on the semiconductor devices. In this paper, a selection criterion for the optimal auxiliary capacitor value is formulated to reduce the device currents in such a way that the overall efficiency is enhanced. This paper presents a comparative analysis of converter volt-ampere (VA) rating and device power loss for conventional H-bridge active front-end and inverter-based topology, APC, and AC-APC. To evaluate the efficacy of the proposed AC-APC, an experimental study is conducted on the APC and the AC-APC feeding a 3-hp three-phase induction motor. At a full load of $\text{2.5}\,\text{kW}$ and $\text{0.8 } \text{power factor}$ , the measured maximum efficiency of the AC-APC is $2\%$ higher than that of the APC. Analytical evaluation of converter currents and device power loss are in close agreement with experimental observations. [ABSTRACT FROM AUTHOR]

This paper presents a balancing algorithm for the so-called Director Switch, a controlled, reverse conducting, self-powered, high-voltage switch, using series-connected insulated gate bipolar transistors (IGBTs). This is a key component on two new voltage-source, high-voltage direct current (HVDC) converter topologies. These, which promise efficiency, cost, and size reductions, are an alternate arm converter and a series bridge converter. One of the main design challenges of the director switch is how to supply the IGBT gate drivers, and other auxiliary electronics while overcoming the high-voltage insulation barrier to ground level. In this paper, this is achieved by using the energy stored in a capacitive clamp snubber circuit, which also helps with the overvoltage mitigation during rare hard-switching events. However, the clamp capacitor and by proxy the IGBT voltages become highly unbalanced during operation, compromising the integrity of the switch. This paper presents a balancing strategy that consists in applying a controlled delay in the switching of the IGBT levels, in a way that forces a voltage balance on all the switch levels. The paper explains the unbalance. Then, the balancing strategy is explained and validated on simulation and on a high-voltage experimental rig, on switches comprising two and three series-connected IGBTs, respectively. [ABSTRACT FROM AUTHOR]