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Designing high-dimensional chaotic maps with expected dynamic properties is an attractive but challenging task. The dynamic properties of a chaotic system can be reflected by the Lyapunov exponents (LEs). Using the inherent relationship between the parameters of a chaotic map and its LEs, this paper proposes an $n$ -dimensional polynomial chaotic system ($n\text{D}$ -PCS) that can generate $n\text{D}$ chaotic maps with any desired LEs. The $n\text{D}$ -PCS is constructed from $n$ parametric polynomials with arbitrary orders, and its parameter matrix is configured using the preliminaries in linear algebra. Theoretical analysis proves that the $n\text{D}$ -PCS can produce high-dimensional chaotic maps with any desired LEs. To show the effects of the $n\text{D}$ -PCS, two high-dimensional chaotic maps with hyperchaotic behaviors were generated. A microcontroller-based hardware platform was developed to implement the two chaotic maps, and the test results demonstrated the randomness properties of their chaotic signals. Performance evaluations indicate that the high-dimensional chaotic maps generated from $n\text{D}$ -PCS have the desired LEs and more complicated dynamic behaviors compared with other high-dimensional chaotic maps. In addition, to demonstrate the applications of $n\text{D}$ -PCS, we developed a chaos-based secure communication scheme. Simulation results show that $n\text{D}$ -PCS has a stronger ability to resist channel noise than other high-dimensional chaotic maps. [ABSTRACT FROM AUTHOR]

The increasing demand for data-intensive computing applications, such as artificial intelligence (AI) and more specifically machine learning (ML), raises the need for novel computing hardware architectures capable of massive parallelism in performing core algebraic operations. Among the new paradigms, in-memory computing (IMC) with analogue devices is attracting significant interest for its large-scale integration potential, together with unrivaled speed and energy performance. Here, we present a fully-analogue, universal primitive capable of executing linear algebra operations such as regression, generalized least-square minimization and linear system solution with and without preconditioning. We study the impact of the main circuit parameters on accuracy and bandwidth with analytical closed-form expressions and SPICE simulations. Scaling challenges due to parasitic resistance/capacitance and their impact on key parameters such as bandwidth and accuracy are discussed. Finally, a comparison with existing solvers belonging to the same IMC framework is made to assess advantages and disadvantages of the proposed circuit. [ABSTRACT FROM AUTHOR]