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The supply-side current of an inverter-fed induction motor (IM) is easily accessible and less affected by noises than the motor stator current. This paper proposes a novel sensorless speed estimation method for an IM using the spectrum of the supply-side current. However, due to the influence of fundamental supply frequency, it is difficult to carry out the speed detection straight from the supply-side current signal. In this paper, an analytic model for characterizing the supply-side current of an inverter-fed IM using the modulation theory and the switching function concept is developed. Then, the Hilbert transform is applied to extract the speed harmonic component from the supply-side current. Finally, an interpolated Goertzel algorithm is put forward to enhance the estimation precision of IM speed. The performance of the proposed sensorless speed estimation method is proved by the speed estimation results obtained from hardware experiments of an IM fed by an inverter under different load conditions. [ABSTRACT FROM AUTHOR]

Induction motor drives operated with a low ratio of the switching frequency to the fundamental frequency (i.e., pulse number) are prone to have high magnitudes of low-order torque harmonics. This paper proposes a method to analytically evaluate the harmonic torque spectrum based on the pulsewidth-modulated voltage waveforms for low pulse number operation. The predicted torque harmonic spectra for different pulsewidth-modulated waveforms are validated through simulations and experiments. This paper also reports optimal switching angles to minimize the total rms value of torque harmonics of order 6, 12, 18 $,\dots,$ $6(N-1)$ , considering the number of switching angles per quarter ($N$) to be 4 and 5. Compared to sine triangle pulsewidth modulation and selective harmonic elimination pulsewidth modulation with the same pulse number, the proposed optimal switching angles significantly reduce the total rms value of all harmonic torques of order lower than $6N$. Extensive simulation and experimental results on a 3.7-kW induction motor drive are presented to demonstrate the superior performance of the proposed optimal pulsewidth modulation. [ABSTRACT FROM AUTHOR]

This paper proposes a novel discontinuous pulse-width modulation (DPWM) method to reduce the current harmonics and improve the system efficiency for a single-phase three-level neutral-point clamped inverter. In single-phase inverters, the unipolar pulse-width modulation (UP-PWM) method is commonly used. However, this method has the disadvantage of power losses due to numerous switching operations. Conventional DPWM methods reduce the power losses and improve efficiency but increase the current total harmonic distortion (THD). To overcome these weaknesses, this paper proposes a hybrid DPWM switching method combining two PWM methods: the UP-PWM method and the conventional DPWM method called one-pole clamped PWM method. Since the proposed DPWM method offers all the advantages of both PWM methods, the optimal performance—with regard to the power losses and current THD—is obtained. The combination of two PWM methods is investigated by analyzing the power losses and current THD. Based on the analysis, the process determining the optimal operating condition is introduced. The effectiveness of the proposed DPWM method is demonstrated through simulations and experiments. [ABSTRACT FROM AUTHOR]

This paper proposes generation of a 15-level (14 concentric) dodecagonal voltage space vector structure (DVSVS) for a star connected induction motor drive. The proposed multilevel DVSVS is obtained by cascading two inverters, namely a primary and secondary inverter. The primary inverter is a five-level (5L) structure formed by stacking two three-level flying capacitors with individual reduced dc sources and the secondary inverter is also a 5L structure formed by cascading two capacitor-fed cascaded H-bridges (CHB). The active power is supplied by the primary inverter, while the secondary inverter acts as switched capacitor harmonics filter, and capacitors in the secondary inverter are balanced naturally irrespective of load power factor for entire modulation index. The high-voltage dc supply fed primary inverter is operated in quasi-square wave mode, while the high frequency switching is applied to low voltage CHBs, thus, reducing the overall switching loss. The proposed scheme gives the advantages of both DVSVS and multilevel structure, thus, making it one of the solutions for battery or stacked dc-fed applications. The paper also presents the experimental results as well as comparison study with the existing topologies to support the advantages of proposed scheme. [ABSTRACT FROM AUTHOR]

This paper proposes an active switching harmonic current reduction method within the dc-link capacitor of two-level, three-phase, back-to-back converters. This method is based on the derived analytical solution for switching harmonic currents in the dc-link. It is shown that by controlling the pulse width modulation carrier waveform's phase angles, the harmonics in the second carrier band of the rectifier and the inverter can be synchronized such that cancellation occurs in the dc-link capacitor. This synchronization is provided by harmonic phase feedback control. The feasibility of the proposed approach has been verified experimentally and results are presented in this paper. [ABSTRACT FROM PUBLISHER]

The performance of modular multilevel converters (MMCs) in medium-voltage applications, where the number of required submodules is not high, can be improved utilizing low switching frequency modulations such as (2N+1) selective harmonic elimination-pulse width modulation (SHE-PWM), which provides tight control of lower order harmonics and low switching losses. This paper proposes a calculation method, which is based on a novel formulation, to solve the SHE-PWM problem. In particular, MMCs with (2N+1) phase output voltage levels are considered, obtaining a (2N+1) SHE-PWM waveform. This method utilizes a unique system of equations that is valid for any possible waveform. Therefore, it is able to calculate simultaneously, without predefined waveforms, both the switching patterns and the associated firing angles that solve the (2N+1) SHE-PWM problem. Consequently, the search process is simplified and optimized. Furthermore, this paper also proposes a circulating current control technique, which can be applied along with (2N+1) SHE-PWM without disturbing the phase output voltage. Simulation results and experimental tests obtained with a single-phase laboratory prototype prove the validity of the novel (2N+1) SHE-PWM implementation method and the proposed circulating current control technique. [ABSTRACT FROM PUBLISHER]

Switching harmonic attenuation has always been challenging for inverters used in high-power conversion applications, where ratio of switching to fundamental frequency is low. Addition of multiple LC-trap filters is no doubt a feasible cost-effective method, which has increasingly been used, but generally susceptible to filter parameter variations and harmonic resonances. This paper hence presents an alternative active trap filter (ATF), based on a series-LC-filtered inverter, for attenuating switching harmonics in a flexible, while yet not cost burdensome, approach. A direct impedance synthesis method has also been proposed for the ATF to better enforce its active switching harmonic bypassing ability. Compared with conventional schemes for controlling active power filters, the proposed method is more readily implemented, since it requires neither current reference generation nor high-bandwidth current control loop. Moreover, the use of a series LC filter at its ac side helps the ATF to reduce its inverter voltage and power ratings. Compensated frequency range of the ATF can hence be enlarged by using a comparably higher switching frequency and a proper step-by-step design procedure to be presented in this paper. Simulation and experimental results have confirmed the design procedures, and hence expected performance of the ATF. [ABSTRACT FROM PUBLISHER]

This paper presents an improved direct torque control (DTC) method for an asymmetrical six-phase induction motor using a two-level six-phase inverter. As is well known, a simple extension of three-phase DTC technique to an asymmetrical six-phase motor, using large vectors only, introduces significant current harmonics of the order 6 n±1 (n = 1, 3, 5,…), which are mapped into the nonflux/torque producing (xy) plane. These harmonics cause only losses in the motor winding as they do not take part in torque production. Hence, a number of different improved DTC techniques have been developed in the past for multiphase motor drives. The paper takes one such DTC method as the starting point and improves it further by using the concept of virtual voltage vectors. Developed vector selection algorithm, based on two virtual voltage vectors, requires the information on position of the flux in the auxiliary (xy) subspace and provides stator current quality commensurate with the currently available best DTC algorithm for six-phase drives. However, use of two virtual voltage vectors enables a substantial reduction of the torque ripple, which is achieved by means of a five-level torque comparator. Extensive experimentation is performed and it is shown that the reduction of the current harmonics is in essence almost the same as in another recently developed DTC scheme, based on the use of a single virtual voltage vector. However, the achieved torque ripple reduction, which is verified experimentally, makes the scheme superior when compared to the existing approaches. At the same time, developed scheme retains qualities of conventional DTC schemes, such as simple structure and fast response. Its additional beneficial feature is the easiness of implementation. [ABSTRACT FROM PUBLISHER]

Recently multilevel inverters (MLIs) have received wide attention from industry and academia, as they are changing into a viable technology for diverse applications. To produce high-quality output using less switch count, development of novel reduced switch MLI (RS MLI) topologies has been a focus of current research theme. This paper presents design and control of a switched-diode dual source single switch MLI (SDDS MLI). The generalized SDDS MLI is first designed using an asymmetric basic unit. Proposed SDDS MLI requires less switch count and driver circuit count compared with the few recently developed RS MLI topologies. To improve the voltage quality by eliminating targeted low-order harmonics, a modified version of fish swarm optimization algorithm is examined for computing optimum switching angles required to control the SDDS MLI. Moreover, suitability and superiority of the derived algorithm are established by comparing with traditional selective harmonic elimination techniques. The developed topology is investigated through several MATLAB simulations as well as experimental tests in the laboratory applying the modified control approach. [ABSTRACT FROM AUTHOR]

In this paper, a new space vector pulse width modulation method to extend the linear modulation range of a cascaded five level inverter topology with a single dc supply is presented. Using this method, the inverter can be controlled linearly and the peak phase fundamental output voltage of the inverter can be increased from 0.577 to 0.637 V\text{dc} without increasing the dc bus voltage and without exceeding the induction motor voltage rating. This new technique makes use of cascaded inverter pole voltage redundancy and property of the space vector structure for its operation. Using this, the induction motor drive can be operated till the full speed range (0–50 Hz) with the elimination of lower order harmonics in the phase voltage and phase current. The five-level topology presented in this paper is realized by cascading a two-level inverter and two full bridge modules with floating capacitors. The inverter topology and its operation for extending the modulation range is analyzed extensively. Simulation and experimental results for both steady-state and dynamic operating conditions are presented in this paper. [ABSTRACT FROM AUTHOR]

In this paper, the near-state pulsewidth modulation (NSPWM), adapted to be implemented in dual-voltage-source inverter (VSI) fed open-end motor, is proposed with the aim of mitigating low-order harmonics (which lead to current total harmonic distortion (THD) minimization). The following two proposed methods are studied in detail: 1) fixing phase angle displacement (PAD) between two VSIs to 120° while adjusting the modulation index (MI); and 2) fixing MI to the predetermined value (wherein low-order harmonics are highly mitigated) while adjusting PAD. Furthermore, the proposed approaches enhance efficiency by limiting the number of commutations within the switching interval. The paper also presents the mathematical approaches to accurately determine low-order harmonic components and switching losses for dual-VSI structure. The experimental setup, including dual-VSI and open-end induction motor, is assembled in the laboratory to evaluate performance of the proposed method. Finally, the simulation results, carried out in the MATLAB/Simulink environment, are found to be in close agreement with experimental data. [ABSTRACT FROM AUTHOR]

The paper proposes a method of active switching harmonics current reduction in the dc-link capacitor of a two-level, three-phase, back-to-back converter. Based on the derived analytical solution for switching harmonic currents in the dc-link, it is shown that by specific control over the pulsewidth-modulated (PWM) carriers’ phase angles, the targeted harmonics of the rectifier and the inverter can be synchronized in phase such that their cancellation occurs in the dc-link capacitor. This synchronization is provided by harmonic phase feedback control. A three-step procedure to implement the method is detailed in the paper. The effectiveness of the proposed approach is verified experimentally. [ABSTRACT FROM AUTHOR]

When fast voltage control is used in a power factor control, the ripple of the dc link causes current harmonics. This paper proposes a method to reduce the harmonic content of a fast voltage loop in a power factor correction, which can both produce low distortion during steady-state operation and fast recovery from a load transient. The performance is achieved by using a Takagi–Sugeno-type nonlinear controller for dc-link voltage control. The proposed nonlinear control is compared with linear proportional–integral (PI) control, which is tuned to meet the standardized regulations for the harmonic content in a 3-kW single phase power supply. The results show that the presented nonlinear voltage controller can maintain the dynamic performance of the linear control with reduced current harmonics. It is also shown that the used nonlinear control method requires only marginally more complex control algorithm compared to commonly used linear PI control. [ABSTRACT FROM AUTHOR]

Due to the pulsating power at the inverter output terminals, the passive storage elements of the boost stage of the current-fed switched inverter (CFSI) contain a power frequency harmonic component (100 Hz), apart from dc and switching frequency components. In prior designs, the second harmonic component is suppressed by increasing the size of the input filter inductor and capacitor or by using additional circuits. This paper presents a complete characterization of a control-based approach to suppress the power frequency harmonic component in the input inductor current of a CFSI. It also presents a comprehensive characterization of the harmonic power redistribution. Using the proposed approach, it is demonstrated that the inductor value of a CFSI is reduced by 61% for the same peak-to-peak ripple. This leads to an improvement in the conversion ratio, efficiency, and power density of the overall converter. A SiC MOSFET-based CFSI with 75-kHz switching frequency is used to verify the proposed design philosophy. [ABSTRACT FROM AUTHOR]

The leakage current originated from the fluctuations of the common-mode voltage (CMV) is an issue in a transformerless grid-connected photovoltaic system. In this paper, a modified space vector modulation based on the Fourier transform analysis is proposed to reduce the leakage current in a three-phase quasi-Z-source inverter (qZSI). The CMV harmonic content in a qZSI contains low- and high-frequency harmonics that cause safety and electromagnetic interference problems, respectively. By implementing the proposed modulation in a three-phase qZSI, the low-frequency harmonics of the CMV are mainly reduced. The distribution of the high-frequency harmonics is also modified in a way they can be simply filtered. Passive filtering in a qZSI using other modulation techniques is less effective than using this method. Applying the proposed modulation in the presence of a high-frequency inductive-capacitive filter results in the strong suppression of both high- and low-frequency harmonics (more than 90% in the investigated case). A reduced-voltage prototype is designed to evaluate the modulation method. The experimental results from this prototype verify the accuracy of the proposed technique. [ABSTRACT FROM AUTHOR]

This paper presents a five-phase dual random space vector pulsewidth modulation (FPDR-SVPWM) strategy with an optimized probability density function (PDF) for a five-phase voltage-source inverter, and its performance and evaluation are also analyzed. Based on the nearest four vectors modulation method, the FPDR-SVPWM strategy, combined with random switching frequency and random zero vector, is investigated to significantly reduce the amplitude of high-order harmonics near the switching frequency and its integer multiples. For the nonsinusoidal power supply, third harmonic injection is introduced in this modulation strategy as well. Considering the effect of random numbers on the performance, an optimized Beta distribution is studied in detail. In order to analyze harmonic dispersion degree qualitatively and quantitatively, the power spectral density and the harmonic spread factor are both employed to assess the performance of the FPDR-SVPWM strategy. A series of results of simulation in MATLAB and experiments based on field programmable gate array demonstrate that the proposed modulation strategy is correct and valid, and it distributes high-order harmonics into a wide range without affecting the fundamental wave and third harmonic. [ABSTRACT FROM AUTHOR]

Most photovoltaic (PV) systems are composed of series and parallel inverters. The electromagnetic interference (EMI) mainly comes from the off–on of inverter switches with pulsewidth modulation (PWM). The output EMI peaks of PV systems would increase markedly due to the interference superposition effect caused by parallel inverters, whose carrier initial phases are in phase or close to each other. In this paper, an auto-screening carrier phase-shift scheme is proposed to weaken the superposition effect of EMI peaks and to get the result of reverse offset at its best. In a PV system, through voltage detections and spectrum estimations of each inverter with a series of phase-shift carriers, a best carrier phase of each inverter is obtained automatically to minimize EMI peaks of the PV system. In order to avoid the conflict that the screening processes of two or more inverters are underway at the same time, a specific frequency signal is output temporarily as an occupancy mark in one of the inverters. The feasibility and effectiveness of the proposed scheme are verified by experimental results in a PV system composed of four parallel single-phase inverters. [ABSTRACT FROM AUTHOR]

In this paper, a modified selective harmonic mitigation pulse amplitude modulation (SHM-PAM) is presented to be capable of canceling all triplen harmonic orders and suitable for single-phase application of five-level type of voltage source inverters. To this end, a new constraint is established for the two switching angles (α1, α2) to derive the new formula for the harmonics’ amplitude, which results in self-elimination of all triplen harmonics (e.g., 3rd, 9th, 15th, …). The fifth and seventh harmonic orders are mitigated through normal operation of the proposed SHM-PAM technique. It is also shown that the proposed technique is extendable to other multilevel voltage waveforms and a flowchart of self-elimination of all triplen harmonics has been presented. Mathematical analysis supported by experimental investigations show the desired performance of the proposed SHM-PAM algorithm on a two-cell single-phase cascaded H-bridge inverter as a typical five-level configuration in dealing with linear and nonlinear loads. Then, it is demonstrated that the maximum number of harmonic orders would be controlled with the minimum number of available angles in a low switching frequency voltage waveform. [ABSTRACT FROM AUTHOR]

This paper presents a new least-mean-square (LMS) algorithm based deadtime compensation method to suppress the current distortion in permanent-magnet synchronous motor (PMSM) field-oriented control (FOC) drives. Compared to conventional average value compensations, the proposed method is robust to switching device parameter variations thanks to the online adaptation capability of the LMS algorithm. Similarly, the disturbance observer compensators are also immune to switching device parameter variations; however, varying motor parameters degrade their compensation performance. Without prior knowledge of switching device or motor parameters, the proposed method can directly reduce the deadtime current harmonics by generating compensation voltage references. In addition, the proposed method is easy to implement since it does not require voltage errors estimation or current harmonics extraction, which are necessary for disturbance observer and adaptive filter based methods. The proposed method is tested on a 2.5-kW voltage-source inverter PMSM drive controlled by an FOC algorithm. Its effectiveness is validated by both experimental results and spectrum analysis. [ABSTRACT FROM AUTHOR]

This paper proposes new angles constraint for selective harmonic elimination-pulsewidth modulation (SHE)-PWM utilized in single-phase inverter applications. The proposed angles constraint naturally eliminates all triplen harmonics, whereas they conventionally appeared in all single-phase output voltages. The harmonic amplitude formula is developed based on the obtained angles constraint, and then modified single-phase SHE equations are defined to eliminate only specified low nontriplen harmonics. Therefore, more harmonics would be eliminated with the same switching frequency in modified SHE-PWM. Five-level voltage waveform has been opted to implement the introduced method, but it can be applied on all multilevel voltage waveforms such as seven-level with even number of angles. Unlike the conventional SHE technique, THD is analyzable in modified SHE to find optimum values for switching angles in order to control noneliminated harmonic amplitudes and minimize THD. Moreover, the cancellation of triplen harmonics empowers a single-phase inverter to supply nonlinear loads beside linear ones. Some experimental tests are accomplished using a single-phase five-level modified packed U-cell (MPUC) inverter. Results are discussed to prove the excellent performance of a single-phase MPUC inverter under both normal and harmonic loads and accurate elimination of determined triplen and nontriplen harmonics by applying the presented angles constraint. [ABSTRACT FROM AUTHOR]

Microinverters operating into the single-phase grid from new energy source with low-voltage output face the challenges of efficiency bottleneck and twice-line-frequency variation. This paper proposed a multilevel inverter based on bridge modular switched-capacitor (BMSC) circuits with its superiority in conversion efficiency and power density. The topology is composed of dc–dc and dc–ac stages with independent control for each stage, aiming to improve system stability and simplify the control method. The BMSC dc–dc stage, which can be expanded to synthesize more levels, not only features multilevel voltage gain but also partially replaces the original bulk input capacitor and functions as an active energy buffer to enhance power-decoupling ability between dc and ac sides. In dc–ac stage, the control strategy of optimized unipolar frequency doubling sine-wave pulse width modulation is proposed to improve the quality of output waveform. Meanwhile, the multilevel voltage phase has been optimized to further reduce the power loss. Finally, a prototype has been built and tested. Associated with the simulation, the experimental results validate the practicability of these analyses. [ABSTRACT FROM PUBLISHER]

This paper introduces a new analysis approach to modeling resonant converters that can be used to determine closed-form expressions for the exact resonant network waveforms. This approach, based on superposition of step responses to inverter and rectifier imposed steps, can easily be applied to resonant converters with high-order resonant networks, multiple inverters, and/or rectifiers. The usefulness of the proposed analysis approach is demonstrated first by applying it to a series-resonant converter, wherein it is used to determine accurate closed-form expressions for its tank current in different operating modes. These expressions are utilized to draw insights that help identify the converter's operating mode, and determine associated expressions for its output voltage and the switching frequency required to achieve a desired output power. The proposed approach is also applied to the multi-inverter multi-element impedance control network (ICN) resonant converter, wherein it is used to derive closed-form expressions for the converter's currents. These expressions are utilized to evaluate the behavior and optimize the design of an ICN resonant converter. A prototype 200-W 500-kHz ICN resonant converter optimized using the proposed approach is used to validate the modeling results. It is shown that there is an excellent agreement between the experimental and modeled waveforms during steady-state operation as well as during startup transients. [ABSTRACT FROM AUTHOR]

This paper develops a simplified phasor model for predicting harmonics present at the point of common coupling between a voltage-source power converter and the utility network. It employs the frequency coupling matrix (FCM) modeling technique. The FCM is experimentally determined without requiring access to converter internal details, such as control and output filter parameters, which are generally not available for converters used in distributed generation systems. Experimental measurements are conducted on a commercially available two-stage, three phase, grid-tied photovoltaic inverter to assess the accuracy of experimentally determined FCMs to predict the harmonic behavior of grid-connected converters. This paper considers two grid conditions for the experimental analysis: 1) when the grid is stiff and contains only background voltage harmonics and 2) when the grid contains harmonic grid impedances as well as background voltage harmonics. In all cases, a close match between the results predicted by the FCM approach and experimental measurements is achieved, thus demonstrating the practical viability of using experimentally determined FCM models for harmonic predictions. [ABSTRACT FROM PUBLISHER]

A merit of the interleaving reducing the switching harmonics allows for the reduction of the filter inductance. However, in the case of direct parallel voltage source inverters (VSIs), a severe circulating current occurs. To suppress the high frequency circulating current, coupled inductors (CIs) for the high impedance is inserted. However, the employed CIs induce a positive- or negative-sequence circulating current (i.e., a cross current) besides the zero-sequence circulating current already mentioned in the other papers. Due to different impedances developed by the current characteristics and the cross current in the CIs, VSIs becomes unstable when the resonant controllers are applied for the harmonic compensation such as 5, and 7th harmonics. In this paper, the cross currents and the impedances of CIs varying with the current characteristics are mathematically analyzed, and a novel current controller is proposed to solve this stability problem. The experimental results validate the proposed control scheme. [ABSTRACT FROM PUBLISHER]

This paper presents a new multilevel selective harmonic elimination pulse-width modulation (MSHE-PWM) technique for transformerless static synchronous compensator (STATCOM) system employing cascaded H-bridge inverter (CHI) configuration. The proposed MSHE-PWM method optimizes both the dc-voltage levels and the switching angles, enabling more harmonics to be eliminated without affecting the structure of the inverter circuit. The method provides constant switching angles and linear pattern of dc-voltage levels over the modulation index range. This in turns eliminates the tedious steps required for manipulating the offline calculated switching angles and therefore, easing the implementation of the MSHE-PWM for dynamic systems. Although the method relies on the availability of the variable dc-voltage levels which can be obtained by various topologies, however, the rapid growth and development in the field of power semiconductor devices led to produce high-efficiency dc-dc converters with a relatively high-voltage capacity and for simplicity, a buck dc-dc converter is considered in this paper. Current and voltage closed loop controllers are implemented for both the STATCOM and the buck converter to meet the reactive power demand at different loading conditions. The technique is further compared with an equivalent conventional carrier-based pulse-width modulation to illustrate its enhanced characteristics. The effectiveness and the theoretical analysis of the proposed approach are verified through both simulation and experimental studies. [ABSTRACT FROM AUTHOR]

In this paper, a real-time implementation of selective harmonic elimination pulsewidth modulation (SHEPWM) using generalized Hopfield neural network (GHNN) as applied to the single-phase inverter is designed and discussed. Finding the location of the switching instants in the case of SHEPWM involves the solution of a set of nonlinear algebraic transcendental equations. The problem is redrafted as an optimization problem, and it is solved by using GHNN. Though, in principle, the $n$ number of harmonics can be eliminated using the presented methodology, this paper tries for the case of the elimination of the 5th-, 7th-, 11th-, and 13th-order harmonics while retaining the desired fundamental. An energy function is formulated for this problem and the set of ordinary differential equations (ODEs) describing the behavior of GHNN is obtained. A program in KEIL C was developed to solve these systems of ODEs by the Runge–Kutta fourth-order method to give the switching instants for continuously varying modulation indexes $(M)$. A MATLAB simulation was carried out, and an experimental setup was also constructed in order to validate the simulated results. The fast Fourier transform analysis of the simulated output voltage waveform and the experimental output voltage waveform confirms the effectiveness of the proposed method. Hence, the proposed method proves that it is much applicable in the industrial applications by virtue of its suitability in real-time applications. [ABSTRACT FROM PUBLISHER]

Three optimized pulse-width modulated (PWM) techniques for the overmodulation region of two-level inverter-fed ac drives are introduced and investigated from the harmonic loss minimization point of view. The optimization is elaborated for the lowest loss-factor, which is proportional to the square of the root mean square value of current harmonics. The loss-factors are computed for different switching numbers as the function of the motor fundamental voltage. It is shown that, with respect to the motor heating and torque ripples, the acceptable drive condition can be guaranteed by a relatively low value of an inverter switching frequency up to 96%–97% of maximal possible motor voltage. Furthermore, it is shown that the so-called three-vector methods have considerably better performance in the lower part of the overmodulation region than the so-called two-vector method for the same number of switching. The performance of the techniques is compared with other existing PWM techniques. This paper discusses the implementation details of the proposed optimal PWM techniques. The theoretical results are verified by experimental and simulation tests. [ABSTRACT FROM AUTHOR]

An observer-based control (OBC) strategy for dual-active-bridge converters is proposed in this paper. The target is not only to handle the active power transferring between two terminals, but also to regulate the phase difference between the primary voltage and current around specific minimum value. The value is chosen to reduce the conduction loss in the system. A reduced-order observer is developed to estimate the direct and quadrature components of the transmission current for use in a decoupled current control system. Since the dc terminal current is the only input of the observer, a low sampling frequency is enough to ensure an acceptable precision. Experiment results show that the proposed OBC strategy can help improve the dynamic performance compared with that when using a single loop voltage mode system. Furthermore, at the high power range, the efficiency obtained when employing the OBC method is improved by up to 7.2%. [ABSTRACT FROM AUTHOR]

Impedance network inverters are the best alternatives for voltage-source and current-source inverters. The boosting capability and the shoot-through solution of such converters make them excellent solutions for various applications. Nevertheless, hard switching forces the converter to operate in low switching frequency, which results in a bulky impedance network. Moreover, the coupling between the shoot-through duty cycle and the inverter modulation index makes a tradeoff between the voltage gain and the modulation index (output voltage harmonics). This paper presents a novel dual switching frequency modulation to mitigate the switching losses of the converter, which results in a more compact impedance network. The proposed method combines a high-frequency pulse width modulation with a low-frequency sinusoidal pulse width modulation (SPWM). Therefore, the switching losses decrease considerably with respect to the conventional simple boost modulation. In addition, the impedance network design frequency remains high, and the network size decreases obviously. The proposed approach removes the interdependence between the shoot-through duty cycle and the inverter modulation index. A comparison between the proposed method and the conventional simple boost method is performed to show its advantages over the conventional method. Finally, experimental results are presented to validate the performance of the proposed method. [ABSTRACT FROM PUBLISHER]

This paper proposes a multiloop framework for current control of grid-connected voltage source inverters (VSIs) with LCL output filter. The discrete-time model is of third-order with a nonminimum phase zero when controlling the grid side current. This poses some difficulties on the design of most types of controllers. Motivated by this problem, the inner loop is implemented by a discrete-time sliding mode control law to ensure the tracking of the converter side current. This can be achieved regardless the grid impedance and voltage, making the converter to behave like a current source inverter with a capacitive+inductive (CL) filter. Thus, the problem of current control falls from a third-order system to a second-order system. Several types of controllers can be designed to implement the outer loop based on the equivalent CL circuit. In this work, a resonant controller with a virtual resistor was applied. Simulations and experimental results are presented to validate the proposal. [ABSTRACT FROM PUBLISHER]

Shunt active power filter (SAPF) is the preeminent solution against nonlinear loads, current harmonics, and power quality problems. APF topologies for harmonic compensation use numerous high-power rating components and are therefore disadvantageous. Hybrid topologies combining low-power rating APF with passive filters are used to reduce the power rating of voltage source inverter (VSI). Hybrid APF topologies for high-power rating systems use a transformer with large numbers of passive components. In this paper, a novel four-switch two-leg VSI topology for a three-phase SAPF is proposed for reducing the system cost and size. The proposed topology comprises a two-arm bridge structure, four switches, coupling inductors, and sets of LC PFs. The third leg of the three-phase VSI is removed by eliminating the set of power switching devices, thereby directly connecting the phase with the negative terminals of the dc-link capacitor. The proposed topology enhances the harmonic compensation capability and provides complete reactive power compensation compared with conventional APF topologies. The new experimental prototype is tested in the laboratory to verify the results in terms of total harmonic distortion, balanced supply current, and harmonic compensation, following the IEEE-519 standard. [ABSTRACT FROM AUTHOR]

This paper discusses the use of a cascaded multilevel converter for flexible power conditioning in smart-grid applications. The main feature of the proposed scheme is the use of independent dc links with reduced voltages, which makes such a topology an ideal candidate for medium- and high-power applications with increased reliability. The developed control strategy regulates independent dc-link voltages in each H-bridge cell, and allows the selective and flexible compensation of disturbing currents under a variety of voltage conditions without requiring any reference frame transformation. The selective control strategies are based on the decompositions proposed in the conservative power theory, which result in several current-related terms associated with specific load characteristics. These current components are independent of each other and may be used to define different compensation strategies, which can be selective in minimizing particular effects of disturbing loads. Experimental results are provided to validate the possibilities and performance of the proposed control strategies, considering ideal and deteriorated voltage conditions. [ABSTRACT FROM PUBLISHER]

Microinverters for grid-connected photovoltaic (PV) power conversion systems often require voltage boost due to the low dc voltage of the PV panels. A high-frequency (HF) transformer-isolated differential-mode Ćuk inverter (DMCI) is an attractive topology due to its inherent voltage boost capability and high power density. One of the significant operational issue of the DMCI addressed in this paper is the presence of lower order harmonic distortion in the injected grid current. It is shown that lower order odd and even harmonic voltages are generated with this topology. This problem is accentuated due to the low damping offered by the grid to harmonic voltages. A systematic low-complexity control design is proposed to address this issue. It is shown experimentally that the DMCI operates stably with effective attenuation of the lower order harmonics using the proposed design. Practical operational issues of the DMCI with fast switching GaN field-effect transistor (FET) devices are analyzed and solutions are proposed. It is shown that there can be significant HF noise generation in the DMCI with a frequency range higher than the switching frequency. Practical solutions for resolving HF issues using a combination of circuit layout design and additional passive components are proposed and validated. All of the experimental results are demonstrated on a 500-W GaN-FET-based microinverter prototype. [ABSTRACT FROM PUBLISHER]

A modified scheme for reactive power compensation using static VAr compensators (SVCs) has been proposed in this paper for unbalanced four-wire system. The conventional SVC-based scheme requires both delta ( $\Delta $ $)$ - and star (Y)-connected SVCs for the same purpose. The proposed scheme uses a single-equivalent delta-connected thyristor controlled reactor (TCR) along with a combination of Y- and $\Delta $- connected thyristor switched capacitors for this purpose. The single-equivalent $\Delta $ -TCR in the present scheme is the result of a virtual Y-TCR and the conventional $\Delta $-TCR. This can reduces effective number of switching devices, cost, complexity, and space requirement compared to the conventional SVC-based schemes. Moreover, the proposed scheme can have various advantageous features compared to newly used DSTATCOM. The proposed scheme can also prevent injection of triplen harmonics in to the line, which is injected by Y-TCR in the conventional scheme. An optimized switching function is adopted in the proposed scheme for reduction of additional injected harmonics by TCR. The optimized switching angles are computed offline using gravitational search algorithm and stored in the processor memory for online application. The viability of the proposed scheme is simulated using MATLAB/Simulink and verified by suitable experimental results on a practical system. [ABSTRACT FROM AUTHOR]

Traditional model predictive control cost functions, when utilizing long prediction horizons ( $N\geq 10$) in power inverter applications, have demonstrated harmonic performances approaching that of schemes based on offline-generated optimal pulse patterns. However, long prediction horizons often prohibitively increase computational load. A different approach to maximizing harmonic performance is taken in this paper. It is shown that shaping the output voltage spectra using a simple feedback mechanism can significantly reduce the length of the required prediction horizon, facilitating a feasible computational load. When a short-horizon cost function is augmented by the feedback mechanism an excellent tradeoff between harmonic performance and switching loss is achieved, even with a prediction horizon of one. It is also shown that the feedback mechanism can be used to improve input reference tracking. Experimental verification of the proposed modulator is performed on a two-level three-phase inverter. [ABSTRACT FROM AUTHOR]

In this paper, a fault-tolerant multiphase multilevel inverter (MPMLI) configuration is proposed based on the dual inverter concept. This configuration helps to improve the performance of pole–phase modulated multiphase induction motor (PPMMIM) drive in both normal and switch failure conditions. Comparing to the existing multilevel inverter topologies for multiphase induction motor (MIM) drives, the proposed MPMLI configuration requires less number of dc sources and power electronic devices. The proposed MPMLI configuration is able to sustain under various faulty conditions, which can improve the reliability of the system. In addition, dc-link utilization (DLU) in low-pole mode is improved by using space vector pulsewidth modulation (SVPWM). In high-pole mode, carrier-phase-shifted 3-Φ SVPWM is used for reducing the torque ripple. This MPMLI configuration produces a multilevel voltage profile across the effective phase in 3-phase 12-pole mode. By maintaining the V/f ratio constant, the proposed MPMLI-fed MIM drive facilitates a wide range of load torque with half of the rated speed in faulty condition. This advantage makes it suitable for traction and electric vehicle applications where reliability and wide range of torque–speed are the major concerns. The performance of proposed MPMLI-fed 5 hp, 9-φ PPMMIM drive is simulated by finite-element method (FEM) in ANSYS Maxwell 2-D and experimentally verified by laboratory prototype under normal and faulty conditions. [ABSTRACT FROM PUBLISHER]

In this paper, a new carrier-based pulse width modulation (PWM) strategy providing common-mode voltage (CMV) elimination and reduced current ripple in a three-level neutral-point-clamped inverter is introduced. The employed switching sequences are made up of the three zero CMV (ZCMV) vectors, and one among the three vec-tors is applied at two ends of a half-carrier cycle. The output current ripple characteristics pertaining to those switching sequences are investigated. In a carrier cycle, the root-mean-square current ripple minimization is analyzed and an optimal sequence is derived accordingly. The presented PWM scheme results in a considerably reduced current harmonic distortion in a wide modulation region as compared to the two existing ZCMV schemes on the same average switching frequency. Also, an implementation of sawtooth-carrier-based PWM patterns is proposed for further improvement of the harmonic performance. The algorithm requires small computational burden and is straightforward for an online implementation. Simulation and experimental results are both provided to validate the good performance of the proposed PWM method. [ABSTRACT FROM PUBLISHER]

The injected grid current of the voltage-controlled grid-connected inverter has serious distortion due to the low frequency harmonic components in the output voltage, which is resulted by the dead time of the drive signals of the power switches, and the distortion cannot be eliminated even when an output voltage closed loop is incorporated. This paper introduces a virtual series impedance to increase the output impedance of the grid-connected inverter only at the dominated lower harmonic frequencies; thus, the injected grid current quality can be improved and the dynamic performance of the grid-connected inverter is not deteriorated. Experimental results from a 6-kW single-phase grid-connected inverter confirm the effectiveness of the proposed method. [ABSTRACT FROM AUTHOR]

Over recent years, the output power of micro-inverters [module-incorporated inverter (MIC)] is progressively pushed to higher levels, following the current photovoltaic (PV) modules market trends. The interleaved Flyback inverter—under discontinuous conduction mode of operation (DCM)—is an appealing solution for PV applications which are based on MIC technology. This topology provides increased power level for distributed PV generation exploitation with simple control configuration, high efficiency, and reduced filter size. In this paper, the harmonic injection capability is incorporated into the interleaved Flyback inverter for the implementation of an active anti-islanding scheme. A suitable technical solution is proposed that bypasses the unfolding H-bridge, without affecting the active power generation of the inverter and without requiring any hardware modification. In addition, a mathematical model based on the instantaneous power balance theory is presented, being a powerful analysis tool for inverters operating under complete magnetic discharge such as the Flyback inverter (either conventional or interleaved) under DCM or boundary conduction mode of operation. The proposed model predicts accurately the steady-state operational behavior of the Flyback inverter under current harmonic injection, either in grid-tied or islanding operation. The proposed technical implementation method and mathematical model are verified through simulation and experimental results. Finally, an anti-islanding set-up based on the proposed harmonic injection technique is presented and implemented into the Flyback micro-inverter. The proposed set-up is verified through experimental results on various quality factor values, as well as for weak grid conditions. [ABSTRACT FROM AUTHOR]

When employed as a modulator in power inverters, model predictive control has an equivalence to a recently proposed modulation technique known as feedback quantizer modulation (FBQM). Both schemes produce a random-like switching pattern that can facilitate explicit control over the shape of frequency spectra associated with inverter output voltages and currents. This is useful to satisfy electromagnetic interference and acoustic noise requirements, and to avoid excitation of external system resonances. However, it will be shown in this paper that inverter deadtime introduces a disturbance into FBQM that significantly degrades the ability to shape the frequency spectra. Several compensation techniques, designed to model the effect of deadtime inside the formulation of FBQM, are proposed and experimentally verified on a two-level three-phase inverter. [ABSTRACT FROM PUBLISHER]

This paper presents the mathematical and harmonic analyses of output phase voltages of three-phase voltage source inverters which employ a hybrid two-dimensional–threedimensional (2-D–3-D) space vector modulation (SVM) voltage control algorithm. The explicit time-domain representation of the harmonic components in addition to the total harmonic distortion (THD) of the output phase voltages is given in terms of system and control parameters. This paper also investigates the harmonic characteristics and THD performance against the linearity of the modulation region which helps in the harmonic performance and design studies of such inverters employing the hybrid 2-D–3-D SVM. The fundamental component of the output voltages follows the reference with lower THD in the linear modulation region rather than the overmodulation region. Experimental results are used to validate these analyses as well as the effectiveness of the hybrid 2-D–3-D SVM algorithm for generating balanced and low THD phase voltages. [ABSTRACT FROM PUBLISHER]

A new zero-sequence circulating current (ZSCC) reduction method for multimodule voltage source inverters (MVSIs) consisting of P three-phase inverters that are connected in parallel is proposed in this paper. Four-switch inverter modules are used instead of the conventional six-switch modules to reduce the cost. In this paper, the effectiveness of the proposed ZSCC reduction method is studied using selective harmonic elimination pulse width modulation. The proposed ZSCC reduction method can remove about P times the number of harmonics using the same switching frequency as compared to more conventional methods, as explained later in this paper. The concepts discussed in the paper are confirmed with results obtained from an MVSI experimental prototype. [ABSTRACT FROM AUTHOR]

This paper presents the design and implementation of a simple neutral point potential (NPP) regulator for a three-level diode-clamped inverter employing a sine-triangle regulator in conjunction with a closed-loop controller with reduced switching losses. The regulator principle is based on adding a continuous variable offset voltage which regulates the midpoint potential of the dc bus. The novelty of the proposed NPP regulator is in the determination of the magnitude of variable offset voltage based upon the average value, peak-to-peak amplitude, total harmonic distortions, and third harmonic content in NPP. Aside from maintaining dc-bus voltage balance, the proposed regulator leads to a significant reduction in the voltage distortion at the NP, resulting in the reduction of the required dc-bus capacitance. It also reduces the switching losses of the inverter by inserting the “no-switching” zone within each half cycle of the fundamental voltage wave. Analytical, computer simulation, and experimental results verifying the approach are presented in this paper for various load power factor angles. [ABSTRACT FROM AUTHOR]

The Z-source inverter (ZSI) employs an LC impedance network between the main inverter bridge and the power source. The unique feature of the ZSI is that it can operate either in buck or boost mode with a wide range of obtainable output voltages from a given input voltage. This topology also exhibits better electromagnetic-interference noise immunity when compared to a traditional voltage-source inverter (VSI). However, the LC impedance network of ZSI significantly increases the size and cost of the power converter and can make it unsuitable for low-power applications. This paper proposes a novel topology called switched boost inverter (SBI) which exhibits similar advantages of ZSI with lower number of passive components and more active components compared to ZSI. The steady-state and small-signal analyses of SBI, along with its pulsewidth modulation (PWM) control strategies, have been discussed in this paper. This paper also presents a comparison of SBI and ZSI with the same input and output parameters. The theoretical analysis given in this paper has been validated using a laboratory prototype of SBI, and the experimental results are presented for verification. The experimental harmonic spectrum of the inverter's output voltage with the proposed PWM technique is also plotted and compared with that of a traditional VSI. All the experimental results show good correlation between theory and experiments. [ABSTRACT FROM PUBLISHER]

Multilevel inverters with hexagonal and dodecagonal voltage space vector structures have improved harmonic profile compared to two-level inverters. Further improvement in the quality of the waveform is possible using multilevel octadecagonal (18-sided polygon) voltage space vectors. This paper proposes an inverter circuit topology capable of generating multilevel octadecagonal voltage space vectors, by cascading two asymmetric three-level inverters. By the proper selection of dc-link voltages and the resultant switching states for the inverters, voltage space vectors, whose tips lie on three concentric octadecagons, are obtained. The advantages of octadecagonal voltage space vector-based pulsewidth modulation (PWM) techniques are the complete elimination of fifth, seventh, eleventh, and thirteenth harmonics in phase voltages and the extension of linear modulation range. In this paper, a simple PWM timing calculation method is also proposed. Experimental results have been presented in this paper to validate the proposed concept. [ABSTRACT FROM PUBLISHER]

This paper investigates the suitability of selective harmonic elimination (SHE) for low-loss multimegawatt grid-connected photovoltaic (PV) inverters. The proposed system is able to meet utilities regulations, IEEE and IEC standards. In an attempt to substantiate the potential superiority of SHE over carrier-based or space-vector pulsewidth modulation (PWM), this paper demonstrates that SHE may allow grid-connected PV inverters to be controlled using a switching frequency of less than 1 kHz, while the inverter is still able to provide necessary operation features such as independent control of active and reactive powers and operation control simplicity. For system validation, experimental results with SHE are compared to the case when the inverter is controlled using third-harmonic injection PWM, with a 2-kHz switching frequency. Furthermore, the paper proposes a new implementation technique for SHE that utilizes the third harmonics to spread the switching angles over 90° instead of being located in a narrow range as generated when using conventional techniques, along with increases in modulation index. The advantages of the proposed technique include simplicity in implementation and flexibility in PWM waveforms. Simulation and experimentation demonstrate agreement, which validates the practicability of the proposed system. [ABSTRACT FROM AUTHOR]

This paper addresses the inverter nonlinearity of a three-level T-type inverter. The main causes of the nonlinearity are pulse shaping, pulse skipping due to narrow pulses for the dead time, and voltage drop of the switching devices. Although the same causes have existed in two-level inverters, the pulse skipping phenomenon and results are quite different in the case of the three-level T-type inverter. The effects of pulse shaping and skipping have been investigated and discussed. In addition, the voltage drop of the switching devices has been considered in conjunction with the conduction path of the T-type inverter. Compensation methods based on the pulse width modulation (PWM) of T-type inverter to alleviate the inverter nonlinearity have been proposed from research results. The proposed methods could be easily implemented by adding appropriate offset voltages to the voltage references of the inverter in PWM. Furthermore, a neutral voltage balancing method of a three-level T-type inverter has been proposed in conjunction with the proposed PWM methods using offset voltage. Through extensive experimental tests, the fifth- and seventh-harmonic components of the current are conspicuously reduced along with the even harmonics. The neutral voltage of the inverter can be balanced effectively with the proposed offset voltage adjustments as well. [ABSTRACT FROM AUTHOR]

Large-scale photovoltaic (LSPV) energy conversion systems have been installed at many places across the world. The essential component of the LSPV system is the dc–ac conversion stage. The usage of multilevel converters is one of the recent advances in the dc–ac conversion stage of the LSPV system to enable transformer-less inversion. Current-fed multilevel inverter has been chosen in this paper as it provides high power inversion with inherent voltage boosting, and thus, avoids the usage of transformer. High power conversion necessitates low device switching frequency operation in order to satisfy thermal constraint of semiconductor devices and also to improve efficiency. However, low device switching frequency operation leads to higher harmonic distortion of inverter output currents. Synchronous optimal pulsewidth modulation (SOP) technique is an emerging low device switching frequency modulation technique that has been successfully implemented for voltage-source multilevel inverters. However, the state-of-the-art SOP technique cannot be directly applied to modulate current-source multilevel inverter topologies due to additional constraints on the switching commutations. Therefore, the purpose of our study was to propose a modified SOP technique to achieve: low device switching frequency and minimal harmonic distortion of inverter output currents. The topology of current-fed five-level inverter was used for demonstrating the performance of proposed technique. A generalized conversion method was introduced in the modified SOP technique for including switching constraints of the current-fed inverter. In addition, a state-sequencing machine was developed by utilizing redundant inverter states to produce equal switching commutation among all semiconductor devices at minimal switching frequency of 350 Hz. The experimental results obtained from the five-level current-source inverter of 1.2 kW demonstrated the effectiveness of the proposed SOP technique. [ABSTRACT FROM AUTHOR]

This paper investigates a control method to significantly reduce the low-frequency current oscillation for six-step operation of a three-phase inverter. The six-step operation of an ac electric machine drive system under high speeds has a few advantages compared with pulse width modulation (PWM) operation including reduced switching losses, a better utilization of the dc bus voltage, and an enhanced speed capability. In digital implementation of the six-step control, power electronics may not be able to switch on and off exactly at the zero crossing points of reference voltages, which will result in a dc offset in phase voltages and cause a low-frequency oscillation in phase currents. The low-frequency oscillation will create issues such as higher power losses, lower efficiency, and excessive heat that may demagnetize magnets on the rotor for a permanent magnet synchronous machine. This research presents a control algorithm using asymmetric PWM to ensure that power electronics switch on and off exactly at the reference voltage zero crossing points. Both simulation and experimental results demonstrate the algorithm can reduce the low-frequency oscillation in phase currents by more than 90%. [ABSTRACT FROM AUTHOR]