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This paper proposes a novel dual input nine-level inverter (DINLI) topology which requires only seven controllable devices. The dual inputs are un-identical DC voltage sources in the ratio 1:3. A simple control scheme is derived by appropriately modifying the phase disposition pulse width modulation technique to generate high-quality 9-level output from the DINLI topology. At any given instant, a maximum of four switches conduct out of which only a maximum of two switches operate at high frequency, bringing down the switching and conduction losses significantly and improving the overall system efficiency. The bidirectional DINLI (BDINLI) topology with reactive power capability can be realized by replacing the unidirectional devices with the controlled switches (i.e., total nine switches). In addition, the proposed DINLI topology does not require extra voltage balancing circuits which further improves the efficiency. The DINLI operation is verified through MATLAB simulations for grid-connected applications and its extension to an n-level, 3-phase application is also investigated. Experiments performed on a 1KVA laboratory prototype to validate the theoretical claims. [ABSTRACT FROM AUTHOR]

An improved two-stage model predictive current control (MPCC) for three-phase three-level converters in the paper, which can simultaneously achieve common-mode voltage (CMV) reduction, effective dc-link capacitor voltage control, and decreased computational burden, is proposed. Compared to the other current control strategies, it has the capability of handling multiple control objectives and possesses a simple structure. Furthermore, it greatly reduces the CMV since the peak CMVs of all the candidate voltage vectors are constrained to be less than one sixth of the dc-link voltage. In addition, an optimal two-stage voltage vector selection mechanism is employed in the proposed method. It helps to significantly reduce the computational complexity. Simulation and experimental results are provided to verify the effectiveness of the proposed method. [ABSTRACT FROM AUTHOR]

This paper presents Space Vector Modulation (SVM) sequences that reduce Common Mode Voltage (CMV) in Dual Three-phase Asymmetrical Induction Motor (DTAIM). At first, two existing SVM techniques such as Reference SVM (RSVM) and CMV1 are studied. Additionally, three new switching sequences are developed as CMV2, CMV3 and DCMV3, which reduce peak magnitude of CMV by 66.8% in comparison with RSVM technique. In SVM techniques, to obtain least CMV, zero vectors are usually replaced by two opposite large Active voltage Vectors (AV) with equal time duration. In such topologies like CMV1, total six AVs are utilized to synthesize the reference vector. The proposed SVM technique CMV2 utilizes only five large AVs to synthesize the reference vector and reduces CMV. Selection of five neighbouring AVs is reflected in reduction of harmonic flux trajectories and stator current ripple in proposed techniques. Additionally, two more switching sequences (CMV3 and DCMV3) are developed related to utilization of specific zero voltage vectors in all sectors (7 and 56) that produce zero CMV. These two switching sequences also provide easy implementation feature during the development of c-code program. In this study, CMV and stator current ripple are considered as performance parameters for different SVM techniques. All SVM techniques are analysed by analytical results, computer simulations, and using prototype test setup of DTAIM fed by Dual Three-phase Voltage Source Inverters (DTVSIs). [ABSTRACT FROM AUTHOR]

A new transformer-less three-level grid-tied inverter is proposed in this article. By employing the switched-capacitor (SC) modules, a new topology is derived. The proposed topology has some features which are high efficiency, the capability of voltage boosting without utilization of any additional boost stage, and suppressing the leakage current by using common grounded strategy. In this article, a peak current control is employed to generate the gate pulses of power semiconductor switches and adjustment of both active and reactive powers. By doing so, the grid injected current is controlled and adjusted to have a proper quality. The operation modes, design consideration, and a comparison with some recently proposed grid-connected topologies are done through this paper. Finally, the performance and feasibility of the proposed inverter are confirmed with a 500 W experimental prototype. [ABSTRACT FROM AUTHOR]

Motivated by the method to analyze the impact of dead time in hard-switching converters, this paper, for the first time, analyzes the impact of zero-voltage notches on the outputs of soft-switching pulsewidth modulation (PWM) converters. It proves that the output distortion of soft-switching converters due to their deviation voltage is independent of the direction of their output current. Hence, their compensation strategies require no sensor to detect the current's direction, which is required by dead-time compensation methods in hard-switching converters. A simple yet effective compensation algorithm is presented for soft-switching converters. The analysis result and effectiveness of the proposed algorithm are experimentally verified via a three-phase inverter that represents an important class of converters. [ABSTRACT FROM AUTHOR]

This paper presents the design of a phase-shifted full-bridge series resonant converter (PS-FB SRC). The proposed FB SRC features a novel two-mode operation. It is operated in series resonant mode at normal loads. The switching frequency is varied to regulate the output voltage. The fixed-frequency phase-shifted pulse width modulation, on the other hand, is used to adjust the effective duty cycle and regulate the output voltage at light loads. The proposed converter exhibits high conversion efficiency for wide-range load conditions. The relationships among the voltage gain, the switching frequency, and the effective duty cycle are discussed and analyzed. Finally, a 48-V/42-A prototype is implemented. Experiments are conducted to verify the theoretical analysis. [ABSTRACT FROM AUTHOR]

Unipolar sinusoidal pulsewidth modulation (SPWM) full-bridge inverter brings high-frequency common-mode voltage, which restricts its application in transformerless photovoltaic grid-connected inverters. In order to solve this problem, an optimized full-bridge structure with two additional switches and a capacitor divider is proposed in this paper, which guarantees that a freewheeling path is clamped to half input voltage in the freewheeling period. Sequentially, the high-frequency common-mode voltage has been avoided in the unipolar SPWM full-bridge inverter, and the output current flows through only three switches in the power processing period. In addition, a clamping branch makes the voltage stress of the added switches be equal to half input voltage. The operation and clamping modes are analyzed, and the total losses of power device of several existing topologies and proposed topology are fairly calculated. Finally, the common-mode performance of these topologies is compared by a universal prototype inverter rated at 1 kW. [ABSTRACT FROM AUTHOR]

A novel high power factor converter is presented in this paper. The proposed converter is a high-frequency forward converter controlled by a magnetic amplifier. This converter has no need of special control to correct the power factor. Power factor is corrected by the automatic variation of the saturation time of the magnetic amplifier according to the input voltage variation. The current stress of the transistor switch is low because this converter operates in the continuous conduction mode of the inductor current. The circuit operation is verified experimentally at a frequency of 500 kHz. [ABSTRACT FROM PUBLISHER]

The paper [1] proposes a very simple and attractive algorithm for controlling both active and reactive powers of a DFIM with a unique feedback control loop. In this technical note, it is proved that the presented algorithm in [1] yields a marginally stable closed-loop system (for the rotor currents). This fact could imply undesired oscillations in the rotor variables, which, eventually, can be large for certain disturbances. The control law in [1] (which has been cited in more than 100 journal and conference papers) has probably been tested and implemented several times in a real application. However, as the rotor current oscillations are with the same frequency than the power grid (or twice in the three-phase framework), they may have been attributed to the presence of grid-coupling noise or small unbalanced effects instead of the inherent marginal stability of the closed-loop dynamics. The problem detected could be overcome using two nested loops, as many references propose (see a general example in [3] or a recent application in [4]), or adopting amore advanced control design technique [5]. [ABSTRACT FROM AUTHOR]