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A novel single-stage doubly grounded transformerless inverter configuration which can buck-boost the output voltage is proposed in this paper. In this transformerless inverter configuration grid neutral is directly connected to PV panel negative rail which suppresses/eliminates the PV leakage currents. In addition, the tracking of maximum power point is possible for wide variation of weather conditions due to buck-boost voltage capability of inverter. Moreover, the proposed inverter topology has symmetrical operation in both half cycles hence injects negligible DC offset current in to the grid. Here the symmetrical operation of inverter is achieved due to one inductor is used for both half cycles of the grid. The proposed topology is realized using five switches, two of which work at 50 Hz and remaining three switches at high frequency which reduces overall semiconductor losses. Further, the proposed inverter topology is controlled through a newly developed modulation technique and possible working modes are analyzed and described thoroughly. For performance validation, the experimental analysis of grid connected proposed inverter is performed on a 1 kVA system and results show that proposed inverter feeds power in to the grid with lesser THD while achieving greater efficiency. [ABSTRACT FROM AUTHOR]

This paper presents the development of a Class-D full-bridge zero-voltage switching (ZVS) inverter, applicable to wireless power transfer (WPT) systems, operating at 13.56 MHz switching frequency with dynamic dead-time control (DDTC). Resonant-coupled WPT systems are being designed at ultrahigh switching frequencies to reduce the size of the wireless link and the passive components. Maintaining ZVS while controlling the output power delivered to a fixed or variable load is one of the major challenges of designing inverters at multi-MHz switching frequencies. DDTC is the approach deployed in this paper to sustain soft switching of a Class-D full-bridge inverter over the full range of output power while regulating the input dc bus voltage. Simulation results are presented to show that dynamically controlling the dead-time during input dc bus voltage variations reduces switch-node voltage overshoot, prevents large current spikes in the switching devices, and reduces associated high switching loss. Practical results obtained show that DDTC reduces switch-node voltage overshoot, increases the inverter efficiency, and reduces the steady-state temperature of the inverter during output power regulation. [ABSTRACT FROM AUTHOR]

In this paper, many impedance-source inverters with coupled inductors have been investigated to obtain a high step-up boost ratio. However, the leakage inductors in these topologies induce great voltage spikes at the dc link, which will increase the voltage stress of switches. Thus, the power level of inverters is limited. Furthermore, the efficiency of the inverters can be degraded by the losses associated with leakage inductors. To address abovementioned issues, this paper proposes a family of low-spike high-efficiency Y-source inverters. The proposed inverters have the ability of eliminating voltage spikes at the dc link and recycling the leakage energy via the additional diode and capacitor. In order to show the excellent characteristics of the proposed topologies, this paper compares the performances of the proposed inverters and the improved-Y-source inverter in many aspects. Simulation and experimental results have verified the abilities of the proposed inverters. [ABSTRACT FROM AUTHOR]

In this paper, a new family of impedance source inverters is presented. It employs high-frequency electrical isolation between the inverter bridge switches and the load along with voltage clamping across the dc-link voltage. Conventional Z-source inverters (ZSIs) employs an impedance network that consists of inductors and capacitors. It has unique features that realize both step-up/step-down functions and eliminates the need of dead/overlap times. This paper extends this novel concept by using electrical isolation in impedance source inverters. High-frequency isolation has many advantages in terms of immunity and reliability; when applied with impedance source inverters this makes ZSIs a preferable choice for industrial applications. In photo-voltaic systems, the addition of the high-frequency transformer provides safety by avoiding the injection of dc circulating current into the grid, without the need of an external bulky line frequency transformer. The gain of the proposed inverter design can be accurately selected by choosing the turns ratio of the high frequency transformer (HFT) or by adjusting the shoot-through duty cycle (STDC) to the inverter. This allows for greater freedom especially when utilizing a higher modulation index, with the STDC allowing dynamic gain adjusts to be done speedily during operation of the inverter. Additionally, a dc-rail voltage clamping technique for the proposed class of isolated ZSIs is also discussed. This technique provides benefits not only in improving the output voltage quality, but also in reducing voltage stress of the active and passive components by minimizing the voltage spikes across the switching devices. In this paper, several high-frequency isolated ZSIs are presented, and an example isolated improved ΓZSI design is shown and discussed in detail. Simulations are provided for the proposed class of isolated inverters to verify their working. Further experimental investigation has been done for which results for the isolated improved ΓZSI are reported. These empirical results have largely confirmed the expected benefits that were determined through simulation and accurate model-based testing. [ABSTRACT FROM AUTHOR]

This paper presents an adaptive multi-loop control scheme for inverters interlinking dc voltage sources to single-phase, low-voltage ac grids. Control self-adaptation is particularly useful in the case of weak grids that, due to frequent physical modifications (e.g., network reconfigurations and disconnection of generators/loads) and intrinsic lack of inertia, present strongly time-variant characteristics. The solution presented in this paper is based on a high-performance converter controller with auto-tuning capabilities. It is shown that the applied auto-tuning method can significantly widen the stability region of the interlinking converter, covering a broad range of grid impedance values. In addition, within the stable region, the controller maintains the nominal performance. Experimental results are reported validating the proposed approach in realistic operating conditions, including grid voltage distortion and variations of amplitude and frequency. [ABSTRACT FROM AUTHOR]

This paper provides an experimental discussion on a real-time real-power emulator that plays an important role in achieving a total test of medium-voltage, high-power, high-speed induction motor drives. The use of the emulator brings cost and time savings to the test. The test bench including the emulator is characterized by connecting two modular multilevel double-star chopper-cell (DSCC) converters connected in a front-to-front way. This paper designs, builds, and tests a 400- ${\rm V}_{\rm dc}$ , 10-kW downscaled test bench. It mainly consists of the following two identical DSCC converters: 1) one DSCC converter is used as an inverter under test; and 2) the other as a real-time real-power high-fidelity emulator. Experimental waveforms confirm that the emulator can reproduce electrical and mechanical operating performance of the three-phase 200-V, 10-kW, four-pole, 9000-r/min induction motor loaded with a centrifugal compressor. [ABSTRACT FROM AUTHOR]

This paper proposes an “isolated soft switching current fed LCC-T resonant dc–dc converter for PV/fuel cell applications.” This converter is able to achieve zero voltage switching for front-end inverter switches and zero-current switching for voltage doubler diodes. The majority of dc–dc converters have compact capacitive (C) filter in output, but high harmonic currents through transformer makes them bulky. The proposed converter attempts to improve harmonic content through a transformer under wide load and input variations as well as it can significantly reduce required turns ratio of transformer to achieve required output voltage. For the above reasons, the proposed converter can offer better footprints and therefore it can be a potential candidate for PV/fuel cell applications. This paper presents basic operating principal, detailed analysis, control, and design of the proposed converter with the help of an example. This converter operates in two modes, i.e., constant duty cycle mode and constant frequency mode, depending on load demand, and is explained through operating curves. Finally, experimental results are included for justifying the proposed theory. [ABSTRACT FROM AUTHOR]

In this paper, a current controller for a parallel operation of inverters is described. When inverters operate in parallel, it is a well-known fact that the inverter current is composed of the average current (AVC) and the zero-sequence circulating current (henceforth ZSCC), which inevitably flows between inverters under the parallel operation. Considering this, previous studies concentrated on reducing ZSCC. However, in this paper, it is found that the inverter current has another component, a differential current, in addition to the two components of AVC and ZSCC. Based on these three decomposed current components, three equivalent circuits are derived from n-paralleled inverters. To minimize the differential current and improve the regulation performance of the total output phase current, a decomposed current control scheme is proposed from equivalent circuit models. The proposed algorithm is applied to a system consisting of three paralleled two-level inverters with small shared inductance whose dc links are connected in common. Additionally, synchronous pulsewidth modulation is employed as the PWM method for each inverter. The proposed current controller is compared with two conventional current controllers, one where each inverter controls its own currents and the other where only AVC is controlled. Through experiments, it is shown that these conventional controllers have limitations and the proposed current controller overcomes these limitations. The effectiveness and feasibility of the proposed control scheme are verified through experimental results. Especially, both theoretical analysis and experiment results verify that the proposed method is robust with regard to parameter errors. [ABSTRACT FROM AUTHOR]

A new transformer-less three-level grid-tied inverter is proposed in this article. By employing the switched-capacitor (SC) modules, a new topology is derived. The proposed topology has some features which are high efficiency, the capability of voltage boosting without utilization of any additional boost stage, and suppressing the leakage current by using common grounded strategy. In this article, a peak current control is employed to generate the gate pulses of power semiconductor switches and adjustment of both active and reactive powers. By doing so, the grid injected current is controlled and adjusted to have a proper quality. The operation modes, design consideration, and a comparison with some recently proposed grid-connected topologies are done through this paper. Finally, the performance and feasibility of the proposed inverter are confirmed with a 500 W experimental prototype. [ABSTRACT FROM AUTHOR]

The instantaneous output power of the two-stage single-phase grid-connected photovoltaic (PV) inverter pulsates at twice the line frequency ($2f_{{\text{o}}}$), generating second harmonic current (SHC) in the front-end dc–dc converter and PV panel, which will affect the maximum power point tracking operation and deteriorate the overall conversion efficiency. The generating mechanism of the SHC is analyzed in this paper and it is pointed that in order to eliminate the SHC in the front-end dc–dc converter and PV panel, the voltage loop gain of the front-end dc–dc converter should be high enough at $2f_{{\text{o}}}$. Since there is a −180° phase abrupt at the resonant frequency of the input side filter capacitor and the inductor, the system may be unstable. To cope with this problem, the inductor current feedback active-damping scheme (ADS) is adopted. For further improving the loop gain at $2f_{{\text{o}}}$ , proportional–integral–resonant regulator with ADS (PIR + ADS) is proposed in this paper. Besides, a step-by-step closed-loop parameters design method is presented. Finally, a 3-kW two-stage single-phase grid-connected PV inverter has been fabricated and tested, and the experimental results verify the feasibility of the proposed control schemes. [ABSTRACT FROM AUTHOR]

Research studies of vehicle-to-grid (V2G) are gaining more and more attention, because of its attractive features, such as, transferring bidirectional power between electric vehicles and grid, regulating grid voltage/frequency etc. This paper investigates the damping technique of the grid-connected inverter for a V2G application. As the silicon carbide (SiC) mosfet has obvious advantages in high-power-density inverters with a high switching frequency, an LLCL filter-based SiC mosfet inverter is designed to suppress the harmonics and increase the power density in this paper. By analyzing and comparing the suppression effects of four passive damping methods on the resonance peak of the LLCL filter, it is found that passive damping control strategy brings extra loss into the V2G system, and affects the performance of LLCL filter. An active damping control method is proposed to reduce losses and ensure better dynamic performance. The feasibility of the design scheme and performance are verified by simulations and experiments. [ABSTRACT FROM AUTHOR]

This paper proposes a high-power-density and reliable inverter topology, which transfers the maximum power of a PV array to the load in one power conversion stage. The single-stage power conversion, along with the soft-switching capability of the proposed three-phase PV inverter promises high efficiency at all operating points. Instead of a capacitive dc link that decouples the dc–dc converter and the voltage source inverter in traditional two-stage PV inverters, a high-frequency capacitive ac link is employed in the proposed inverter, which enables exploiting a very small film capacitor, rather than a bulky electrolytic capacitor, for transferring power. Eliminating electrolytic capacitors prolongs the lifetime of this inverter. Considering the long lifetime of PV modules, this feature is of high importance in PV applications. The high-frequency ac link also allows using high-frequency transformers for providing galvanic isolation. Therefore, this inverter is expected to have a very high power density. This paper presents principles of the operation and control, design, and analysis of this inverter, and verifies the performance of the inverter through two prototypes: a 2-kW Si-based prototype and a 2-kW SiC-based prototype operating at different switching frequencies. [ABSTRACT FROM AUTHOR]

Soft magnetic powder cores with their high saturation flux density and low core loss are excellent alternatives for filter inductors in inverter-based applications. However, their nonlinear current-dependent inductance characteristics pose a challenge for control of grid-connected inverter with LCL filter. In this paper, the variable inductance conundrum is discussed and a modified direct digital control method based on a variable-structure inductance estimation model that takes into consideration wide nonlinear variation in both inverter- and grid-side inductances is proposed. The proposed method is shown to have better grid-voltage harmonic rejection and improved stability margins. However, investigation of stability which is conventionally based on nominal values of filter inductors cannot predict instabilities over the entire range of inductance variation. Hence, a parametric approach to conventional stability methods with a parameter space defined by variation in actual and estimated inductance is explored in this paper. The effect of line impedance on stability is also investigated with impedance-based stability criterion by considering line inductance as an additional dimension in the parameter space. A pattern in stability margins is observed due to inductance variation, with inductance at its minimum being most vulnerable to instability. Experimental results measured from a 5 kW single-phase grid-connected inverter with various LCL filters have verified the feasibility of the proposed control method. The experimental results also match the analytical results with reasonable accuracy. [ABSTRACT FROM AUTHOR]

Many research works report the use of LCL filters for grid-interfaced PV systems. Indiscreet selection of passive LCL filter parameters may result in poor filtering and increased power losses. LCL filter parameter selection is critical to get a good performance and at the same time ensure that losses and costs stay low. This paper proposes a novel approach to design the LCL filter for a grid-interfaced PV system. A cost-based minimization approach on a cost per joule basis for each of the filter elements is explored to obtain the optimal filter design. Simulation results for a 10-kVA grid-connected inverter with an LCL filter are presented in order to verify the efficacy of the proposed design. The impact of designed filter parameters on the ripple current is also discussed in this paper. The total inductance of the LCL filter is varied and filter parameter values which give lowest cost is identified while meeting harmonic standard requirements and the fundamental voltage drop across the filter. Finally, the proposed design is also experimentally validated via a hardware prototype. Results validate the design method in terms of the harmonic attenuation and total harmonic distortion. [ABSTRACT FROM AUTHOR]

This paper proposes a new dc–ac converter with a reduced number of semiconductor switches and gate drive and control circuit components. A salient feature of this inverter is its pure sinusoidal line-to-line voltages with no need for output filter. Also, the proposed inverter improves the voltage utilization factor of the input dc supply compared to the four-switch three-phase inverter (first best topology in the literature from the number of switches point of view) and standard six-switch inverter with sine pulsewidth modulation. The proposed inverter is capable of operating with a wide range of output voltages from zero to the full value of the dc input voltage by appropriately altering the instantaneous duty cycle. A three-phase universal inverter with only three power switch has been proposed in this paper for the first time ever, to our knowledge. For the purpose of providing a good compromise between fast transient response and stability, a model predictive controller is proposed. All the design expressions have been derived. A comparison with other dc–ac converters is given to show the merits of the proposed converter. Finally, satisfactory circuit operation is confirmed by experimental results from a laboratory prototype. [ABSTRACT FROM AUTHOR]

This paper proposes a high-efficiency single-phase T-type boundary conduction mode (BCM) microinverter. The conventional full-bridge BCM microinverter has achieved zero voltage switching (ZVS) and thereby improved the efficiency, but it suffers from high switching losses under light load conditions. The proposed T-type BCM microinverter reserves ZVS and uses a multilevel technique to further decrease the switching losses. The BCM operation with multilevel technique will have too low switching frequency when the grid voltage approaches half of the dc link voltage. To solve this problem, this paper adopts a third operation mode for the T-type switching leg to maintain the switching frequency above a minimum value. The corresponding mode transitions are also detailed to ensure a smooth operation. Because of the turn-offdelay of the freewheeling transistor, the actual lower current boundary deviates from the programmed one, which will distort output current. To address this issue, this paper also proposes a boundary compensation method. A prototype has been built for performance verification, which can test both full-bridge and T-type topology. Compared with the full-bridge BCM microinverter, the proposed T-type BCM microinverter has a higher efficiency over the whole load range. [ABSTRACT FROM AUTHOR]

Soft-switching techniques of transformerless photovoltaic grid-connected inverters (TLIs) can significantly reduce switching losses, as well as soften switching processes. Conventional dc–ac soft-switching configurations proposed by Dr. Deepakraj M. Divan are invalid in TLIs because of the leakage current problem. In order to develop soft-switching techniques in TLIs, this paper proposes a new soft-switching configuration and a procedure to guide the invention of soft-switching TLIs. First, this paper proposes two basic resonance tanks related to dc bus polarities, and then, uses these basic tanks to elevate four popular full-bridge-type TLIs according to the proposed guideline. As a result, four soft-switching TLIs are gained. Second, this paper picks obtained soft-switching highly efficient and reliable inverter concept (HERIC) as example to analyze its soft-switching operation principle and performance. As a consequence, all active switches of the gained soft-switching HERIC circuit are switched under both of zero-current turn-on and turn-off conditions; the reverse recovery problem of freewheeling diodes is alleviated owing to the zero-current turn-off of diodes; meanwhile, the common-mode voltage at the switching frequency scale is still constant. Finally, some experimental results from a 3-kW universal prototype at 50-kHz switching frequency are provided to verify the effectiveness of the main contributions of this paper. [ABSTRACT FROM AUTHOR]

This paper introduces a new bidirectional single-phase inverter topology. The proposed topology has three ports: a dc port, an ac port, and a ripple port. The ac and dc ports are bidirectional to support rectifier or inverter operation. A small inductor, which is of alternating current, exchanges power between different ports of the single-phase system. The proposed topology is capable of accomplishing voltage step-up or step-down, suppressing the ripple power, and performing inversion or rectification operation in one stage of power conversion. The proposed configuration offers an active decoupling function, which not only eliminates the double-frequency ripple power at the dc port but also achieves minimum capacitance requirements to minimize the size of the decoupling capacitor. This facilitates the use of a very small thin-film capacitor, which offers a much longer life-cycle and higher reliability compared with a bulky electrolytic capacitor. A control approach is also developed to regulate the dc-port and ac-port currents and manage the ripple power through proper distribution of power between each port. Moreover, a very small capacitor can be placed in parallel with the inductor to reinforce the proposed configuration with soft-switching operation, which enhances the overall efficiency and minimizes the voltage stress over the semiconductor devices. This converter is capable of accommodating an arbitrary number of dc or single-phase ac sources and/or loads configuring a multiple-input multiple-output inverter without introducing any additional passive elements or sacrificing the performance of the inverter. The primary focus of this paper is dc-to-ac conversion mode of operation, in spite of the fact that it can easily be configured to serve as a rectifier. Experimental and simulation results are presented to validate the operation of the proposed topology and its control strategy. [ABSTRACT FROM AUTHOR]

This paper proposes a new high-efficiency photovoltaic (PV) converter for grid connection through a high-leg delta transformer. The converter is composed of a symmetrically connected boost converter and three half-bridge inverters. One of the three half-bridge inverters is connected to the boost converter, and the others are directly connected to the PV terminals. As a result, this circuit configuration enables to reduce the power losses in both boost converter and inverters. This paper also proposes a new cooperative control method between the symmetrically connected boost converter and inverter. The control method can reduce the average switching frequency to 75% of that in a conventional one, resulting in a great reduction in the switching power loss. Experimental results confirm that the proposed circuit configuration makes it possible to improve its European efficiency from 91.6% to 94.5%. Moreover, system performance is evaluated on the assumption of maximum power point tracking operation. [ABSTRACT FROM AUTHOR]

This paper presents a unified framework for the modeling, analysis, and design of load-independent Class E and Class EF inverters and rectifiers. These circuits are able to maintain zero-voltage switching and, hence, high efficiency for a wide load range without requiring tuning or use of a feedback loop, and to simultaneously achieve a constant amplitude ac voltage or current in inversion and a constant dc output voltage or current in rectification. As switching frequencies are gradually stepping into the megahertz (MHz) region with the use of wide-bandgap (WBG) devices such as GaN and SiC, switching loss, implementing fast control loops, and current sensing become a challenge, which load-independent operation is able to address, thus allowing exploitation of the high-frequency capability of WBG devices. The traditional Class E and EF topologies are first presented, and the conditions for load-independent operation are derived mathematically; then, a thorough analytical characterization of the circuit performance is carried out in terms of voltage and current stresses and the power-output capability. From this, design contours and tables are presented to enable the rapid implementation of these converters given particular power and load requirements. Three different design examples are used to showcase the capability of these converters in typical MHz power conversion applications using the design equations and methods presented in this paper. The design examples are chosen toward enabling efficient and high-power-density MHz converters for wireless power transfer (WPT) applications and dc/dc conversion. Specifically, a 150-W 13.56-MHz Class EF inverter for WPT, a 150-W 10-MHz miniature Class E boost converter, and a lightweight wirelessly powered drone using a 20-W 13.56-MHz Class E synchronous rectifier have been designed and are presented here. [ABSTRACT FROM AUTHOR]

This paper proposes a variable off-time control method for a single-phase microinverter operating in the discontinuous conduction mode (DCM) for efficiency improvement. First, the fixed off-time control method is analyzed. The concept is to fix the off-time of the active switch throughout a line cycle for all output powers and scale the on-time of the active switch to shape a sinusoidal output current. Then, based on the fixed off-time control method, a variable off-time control method is proposed to modulate the preset fixed off-time in order to decrease the switching frequency during ac line zero-crossings and light load conditions. Compared with existed fixed-frequency DCM control or boundary conduction mode control, the variable off-time control is more flexible to optimize the efficiency under different load conditions as the switching frequency range can be automatically adjusted according to the output power. The switching frequency is high at heavy loads to limit the maximum peak current and is low at light loads to increase the light load efficiency. In addition, a predictive on-time method is adopted to simplify inverter control and reduce hardware costs. The parameter design principle is detailed in this paper. A 300 W prototype is built to verify the performance of the proposed method. [ABSTRACT FROM AUTHOR]

This paper proposes a new single-phase single-stage switched-boost inverter with four switches. Like the quasi-Z-source inverter and quasi-switched boost inverter (qSBI), the proposed inverter has the main features as continuous input current, buck/boost voltage with single-stage conversion, and shoot-through immunity. Compared to the qSBI, the proposed inverter uses one more capacitor and one less switch. This paper presents the operating principles, pulse-width modulation control strategy, parameter design guidelines, and simulation results for the proposed inverter. To verify the performance of the proposed inverter, an 800-W prototype was built with an 110 V/50 Hz output voltage in stand-alone and grid-connected modes. The simulation and experimental results matched those of the theoretical analysis. [ABSTRACT FROM AUTHOR]

To support the development of high-frequency ac microgrids in terms of compact design, high-voltage gain and low total harmonic distortion (THD), a buck–boost dual-leg-integrated step-up inverter is proposed in this paper. The inverter is formed by integrating a buck–boost converter into a conventional single-phase full-bridge inverter by sharing the upper switch and the body diode of the lower switch in both bridge-legs. Consequently, the component count is significantly reduced over the step-up inverter counterparts. In addition, to address the drawbacks of hybrid modulation methods adopted by existing dual-leg-integrated inverters, such as double-variable control, and high THD of output voltage/current at high input voltage and heavy load conditions, unipolar frequency doubling sinusoidal pulse width modulation scheme is adopted in this inverter. As a result, the modulation ratio M becomes the only control variable to regulate the output voltage/current and the control is simplified. The THD of the proposed inverter output can remain low throughout the entire input voltage range and load power range. This paper presents the topology derivation procedure, operation principle, and steady-state characteristics of the proposed inverter. To validate the effectiveness of theory, experimental results of a 400 W hardware prototype, where the output voltage frequency is at 500 Hz, are reported. [ABSTRACT FROM PUBLISHER]

In this paper, two structures are proposed for the switched-inductor quasi-Z-source inverter. In the proposed structures to extend the voltage gain of inverter, two new switched-inductor structures are used. In the proposed structures, voltage across the capacitors in the Z-source network and in the switched-inductor is symmetric and small. The other advantage of proposed inverters is known as achieving higher voltage gain per smaller duty cycle ratio (of shoot-through). Compared with a conventional continuous input current switched-inductor quasi-Z-source inverter at the same gain voltage, there is less of a ripple of input current in the proposed inverters. In this paper, at first the both the conventional and the proposed switched-inductor Z-source inventers are thoroughly investigated to find out their governing relations. Then, the proposed Z-source inverters are compared with the conventional ones by simulating them to assess their performance efficiency. Next, applying the simple boost pulse width modulation the simulation is carried out with PSCAD/EMTDC software. After that, to evaluate the obtained results, the prototypes of the proposed inverters with 48 Vdc input voltage are used. [ABSTRACT FROM PUBLISHER]

Microinverters require high voltage gain capability for interfacing the low dc voltage output of photovoltaic (PV) module to single-phase ac grid. A two-stage nonisolated inverter is proposed in this paper, with a first boost stage and a second traditional pulse width modulated grid-tied inverter stage. The proposed boost stage consists of a coupled inductor added with a voltage multiplier to achieve the required high voltage gain at high efficiency and to operate over a wide input voltage range. Among the coupled inductor topologies, adding a clamp circuit is a common solution to limit the voltage spike caused by leakage inductance. In the proposed converter, the resonance between the coupled inductor and voltage multiplier is used to address the issue of voltage spike, thereby reducing both component count and device voltage stress. Detailed analysis and design procedure of the proposed converter is presented in this paper. Experimental results of a 250-W microinverter are presented to validate the proposed converter. [ABSTRACT FROM PUBLISHER]

In this paper, new half-bridge and full-bridge topologies for a switched-boost inverter are proposed. These topologies have a high boost factor in comparison with conventional types. In addition, the proposed topologies have continuous input current and can generate zero-voltage level in output. In this paper, the operation of the proposed inverters in different operating modes is analyzed. Then, the values of inductors and capacitors are designed. Moreover, the used switching pattern and its logical diagram are introduced. A comprehensive comparison between the proposed and conventional topologies in terms of the boost factor, the number of elements, and the efficiency shows the good features of the proposed inverters. Finally, to verify correct operation of the proposed topologies and derived equations, simulation and experimental results are presented. [ABSTRACT FROM AUTHOR]

A novel hybrid pulse width modulation (PWM) technique is proposed in this paper for two parallel interleaved, two-level, three-phase voltage source inverters (VSIs). The two parallel interleaved VSIs are analyzed as a three-level (3L) inverter. A 3L inverter provides minimum line current ripple when nearest three voltage vectors are applied. In this paper, a novel carrier-based PWM technique is developed that ensures the application of nearest voltage vectors, keeping average circulating current to zero over a switching period. For carrier-based implementation of the proposed PWM, generalized common-mode (CM) offsets are derived in terms of maximum and minimum values of reference signals. Each 3L space-vector sector is divided into seven subsectors. For each subsector, a CM offset is calculated, addition of which to reference signals ensures the minimum line current ripple and zero average circulating current. Simulation and experimental results are provided to validate the proposed technique. [ABSTRACT FROM PUBLISHER]

It is mandatory to keep the total harmonic distortion in the output of most inverters below the limits prescribed by different international standards. The harmonic distortions caused due to nonlinear loads may not get corrected by typical magnitude controller, like PID controller. Repetitive controller is more effective in such situations. Often, repetitive controller is used as add-on block to the conventional magnitude controller. Design of repetitive controller can be easily implemented on digital platform. Rapid change in phase and magnitude of inverter-filter's transfer function near corner frequency causes instability problems in repetitive controller. Various techniques have been proposed by researchers to overcome this problem. Most of the reported techniques rely on digital compensation. However, it is hard to find a digital compensator, which simultaneously meets the phase and gain requirements at moderate computational effort. Here, a new output voltage feedback scheme has been proposed, which simplifies the requirement of digital compensation. The proposed scheme requires an extra hardware but at negligible added cost. In spite of this extra hardware, the proposed circuit turns out to be more energy efficient in comparison to few popular schemes, reported in literature, where some resistance is introduced in the inverter's filter for better stability of controller. In addition to the proposed modification the paper presents a simplified explanation of the various factors affecting stability of repetitive controller. The paper also discusses a novel experimental method for verifying the efficacy of repetitive controller in suppressing distortion of any particular harmonic order. [ABSTRACT FROM PUBLISHER]

This paper investigates and evaluates the performance of a single-phase split-source inverter (SSI), where an alternative unidirectional dc–ac configuration is used. Such configuration is utilized in order to use two common-cathode diodes in a single device instead of using two separate diodes, resulting in minimum parasitic inductance in the commutation paths. In this paper, the analysis and modulation of the single-phase SSI using this alternative configuration is discussed, and the analysis of the low-frequency component in the dc side is introduced. Moreover, the features behind employing the triangular, the trailing-edge sawtooth, and the leading-edge sawtooth carriers with the single-phase SSI are discussed, and the differences among these carriers are highlighted. In order to highlight the performance of the proposed SSI, a comparative study is conducted with the two-stage architecture and the single-phase quasi-Z-source inverter (qZSI). The introduced analysis is enhanced with simulation results using MATLAB/PLECS models, where a 1-kVA single-phase SSI is designed and simulated. Finally, the designed 1-kVA single-phase SSI is implemented experimentally and tested at different operating points, i.e., at different voltage gains, and a maximum efficiency of $95.5\%$ is obtained. [ABSTRACT FROM PUBLISHER]

In this paper, it is described how the circulating current flows between inverters that have isolated dc link such as cascaded H-bridge (CHB) topology when they are operating in parallel. In this case, zero sequence circulating current, which normally flows through shared dc link, cannot flow between inverters in parallel. However, circulating current is provoked by asynchronous switching instant of devices, difference of dc-link voltages of parallel inverters, and unbalanced impedance. The circulating current should be suppressed by a sharing inductor that is inserted between inverters. Generally, all of the inverters should synthesize the same output voltage reference for load current control to minimize the size of this sharing reactor. However, this conventional method cannot guarantee diminishing circulating current in the transient state and even in the steady state. In this paper, in order to reduce sharing reactance, after deriving circulating current model from general case of n-parallel operation, circulating current control method is devised based on the model. This proposed algorithm is applied to active front end five-level-CHB inverter system for medium voltage drive. Simulation and experimental results are provided to verify the effectiveness of the proposed control scheme. [ABSTRACT FROM AUTHOR]

In this paper, two topologies are presented for the enhanced-boost quasi-Z-source inverters (qZSI), namely continuous input current configuration and discontinuous input current configuration of enhanced-boost qZSI with two-switched impedance networks. Similar to enhanced-boost impedance-source inverters (ZSIs), these proposed inverter topologies possess very high boost voltage inversion at low shoot-through duty ratio and high modulation index to provide an improved quality output voltage. Compared to enhanced-boost ZSIs with two-switched Z-source impedance networks, these proposed inverter topologies share common ground with source and bridge inverter, overcome the starting inrush problem, and draw continuous input current and the lower voltage across the capacitors. Moreover, the input ripple current is negligible. This paper presents the operating principles and analysis of continuous input current configuration enhanced-boost qZSI with two-switched impedance networks and compares with ZSI, switched inductor ZSI, DA/CA-qZSI, and enhanced-boost ZSIs. The theoretical analysis is done and is validated through simulation and experimental results. [ABSTRACT FROM PUBLISHER]

A single-phase common-mode transformerless grid-connected photovoltaic (PV) converter, which is based on the integration of two stages, is proposed in this paper. Transformer elimination in grid-connected PV systems has many advantages. It not only reduces cost, size, and weight but also increases the complete system efficiency. Since there is no galvanic isolation between grid and PV array, a leakage current may appear due to the PV parasitic capacitance to the ground, if this is not taken into account in the converter design. This paper presents a dc/dc boost converter integrated with a full-bridge inverter. The integration of these two stages reduces the ground leakage current. The neutral line of the grid is directly connected to the negative terminal of the PV array, eliminating any possibility of leakage current in this terminal. The principle of operation of the transformerless converter is analyzed, and a 200-W topology is experimentally tested. [ABSTRACT FROM PUBLISHER]

High-power boost converters offer significant benefits to hybrid and electric vehicles, because higher-voltage propulsion power equates to lower motor losses. However, the converters themselves must have high efficiency and high power density in order to make the system-level trade-off beneficial. Thus, this paper presents an optimized design process of high power multi-phase interleaved bidirectional boost converters. In order to achieve a fast and accurate analysis and design, a generalized method is developed for the calculations of required phase inductance and output capacitance. In addition, a genetic algorithm (GA) optimization method is implemented for the inductor design. Using the proposed design process, a 3-phase 60 kW interleaved converter is designed and tested using paralleled SiC MOSFETS. The converter achieves peak efficiency of 99.2% at 10 kW and is $>$ 98% efficiency from 5% to 100% load. The resulting power density is 9.4 kW/L, which can be further improved to 12.2 kW/L with alternate terminal connectors. [ABSTRACT FROM AUTHOR]

This paper proposes the use of advanced bus clamping switching sequences to reduce the impedance network inductor current ripple of the three-phase Z-source inverter (ZSI). Proposed technique is named as ABC4_MCB. MCB denotes that the maximum constant boost control method is used for the voltage boosting. One of the conventional space vector pulsewidth modulation of ZSI, “ZSVM6,” is termed as ZSVM6_MCB under the maximum constant boost control method. The switching sequences of ABC4_MCB technique are designed in such a way that it offers around 34% reduction in the maximum instantaneous inductor current ripple as compared to the ZSVM6_MCB for the equal average switching frequency. The factor of percentage reduction in the inductor current ripple using the proposed technique is constant over the entire range of shoot through duty ratio (0–0.48). Theoretical findings have been verified using simulation and experimental results. [ABSTRACT FROM AUTHOR]

In recent years, a number of bidirectional inductive power transfer systems (BD-IPT) suitable for wireless grid integration of electric vehicles have been developed. These developments have been fueled by the enhanced efficiency and spatial tolerance offered by BD-IPT systems. A typical BD-IPT system utilizes two synchronized full-bridge converters operating at fixed duty cycles to drive the primary and secondary magnetic couplers. However, in order to cater for a wide range of loading conditions, additional circuitry is employed at the expense of cost and power density. As an alternative solution, this paper proposes a novel power converter, named a boost active bridge (BAB), to replace the full-bridge converters. The BAB topology caters to a wide range of loading conditions without the need for any extra switching devices. A comprehensive mathematical model that predicts steady-state currents, voltages, and power transfer is presented to highlight the operating principles of the BAB technology. Experimental results obtained from a 3.5-kW prototype show a nearly constant efficiency under all loading conditions, validating the viability of the proposed BAB topology. [ABSTRACT FROM AUTHOR]

This paper presents novel single-phase single-stage buck–boost inverters. The proposed inverters provide buck–boost operation for a wide variation of the input dc voltage. In addition, the proposed inverters are bidirectional and provide reactive power. Further, they require only one inductor. The proposed inverters also eliminate the common-mode leakage current by connecting the output neutral to the midpoint of input capacitors or directly to input voltage sources. Therefore, they are well suitable for photovoltaic applications. Although six switches are required, two switches are working at line frequency, resulting in negligible switching loss. Of the four remaining switches, only two are switching at high frequency at a time. The circuit operations are demonstrated through the analysis of the proposed inverters. A 120 Vrms/60 Hz/400 W hardware prototype was constructed and tested. The experimental results verified the theoretical analysis. [ABSTRACT FROM AUTHOR]

Input-series-output-parallel (ISOP) inverter system is very suitable for high dc input voltage and large ac output current power conversion applications. If this topology is applied to the grid-connected occasion, a bulky-capacity grid-connected inverter can be built with multiple small-capacity standardized inverter modules, which can significantly improve the reliability of the system operation and facilitate system design. In this paper, we investigate an ISOP LCL-type grid-connected inverter system, and put forward an optimized way for the topology of combined LCL filters first. Then, the inverter-side inductor current is carefully chosen as the controlled variable and thus a concise distributed control method is proposed to achieve multiple control objectives. On the basis of the presented distributed control, the redundant control technique is also provided to heighten the reliability of the grid-tied ISOP inverter indeed. Finally, a three-module prototype is built and the experimental results validate the effectiveness of the raised strategy. [ABSTRACT FROM AUTHOR]

This paper presents the circuit design and magnetic integration of push–pull class-E inverters for wireless power transfer (WPT) up to megahertz. The design criterion for achieving zero-voltage switching (ZVS) of a class-E inverter with coupled windings is derived mathematically. The approaches of magnetic integration for push–pull class-E inverters are analyzed and compared. Then, a new magnetic structure with hybrid magnetic materials is proposed to build the integrated inductors with either coupled windings or uncoupled windings. A 3-MHz WPT system is built to verify the analysis. The detailed comparison of the class-E inverters with magnetic integration is presented in terms of switch voltage, efficiency, harmonic currents, and thermal distribution. In the optimized design example, the switches keep ZVS over the entire load range without using any closed-loop control. The system efficiency reaches 87.1% at 350-W output power. [ABSTRACT FROM AUTHOR]

In this paper, two single-phase single-stage split-inductor buck–boost inverters are proposed: type-I and II. The proposed type-I is unity power factor inverter, while the proposed type-II inverter is suitable for any power factor. Both topologies remove the shoot-through problem. Furthermore, the reverse recovery issues for all switches are eliminated; therefore, mosfets are used to obtain higher efficiencies. The proposed inverters operated at higher switching frequencies confer the additional benefit of smaller passive components. The current stresses of the two switches in the proposed type-I and II inverters are lower of the conventional boost inverter. The dead time can be eliminated at both the high and line switching frequencies. In addition, the inductor conduction loss is minimized to improve efficiency. Moreover, the voltage stresses of the two switches in the type-I inverter can be much lower of its counterpart boost inverter. Most importantly, unlike the conventional high-reliability inverters, the magnetic volume of the proposed high-reliability type-I and II inverters is same of its counterpart boost inverter. The experimental results obtained for 500 W, 110 Vrms, 60 Hz hardware prototypes verify the analysis. [ABSTRACT FROM AUTHOR]

In this paper, a novel filter structure to suppress circulating currents is proposed based on the sequence of pulsewidth modulation voltage harmonics for high-power interleaved motor-drive systems. The sideband harmonics can be divided into positive-, negative-, and zero-sequence components. Through 120° interleaving among three paralleled inverters, a majority of positive- and negative-sequence harmonics are phase shifted. By these phase shifts, the differential-mode circulating currents between the paralleled ac–dc converters can be suppressed with the proposed filters, which have an identical structure to the three-phase common-mode chokes. Such a structure highly benefits the design and manufacturability for high-power applications where a choice of magnetic-core shapes is limited. Compared to coupled inductors (CIs) with cyclic-cascade or monolithic configurations, the number of magnetic cores can be reduced by one-third. Peak flux-linkages of the proposed filters and the conventional CIs were compared to estimate the size reduction in case of flux-limited designs. Considering the whole modulation index range, which may be required in the motor-drive systems, the maximum flux-linkage can be reduced by 50%. Prototype filters are built and showed a 33% reduction in weight and size compared to the conventional CIs. The validity of the proposed filter is verified through the simulation and a small-scale experiment. [ABSTRACT FROM AUTHOR]

The inductance is an important parameter impacting current ripple calculation, usually with the assumption that the designed inductance performs ideally in most of voltage source inverters (VSIs) applications. However, the initial permeability of magnetic material usually descends when the winding current reaches or goes beyond the saturation limit. In such region of saturation, the implemented inductor does not perform as expected in design stages and its value varies with the bias current. In this paper, analysis and calculation of the current ripple are presented for a three-phase VSI with powder cores-based inductors, which reveals the calculation error of current ripple caused by the soft saturation nature of powder cores. Based on the equivalent single-phase model, the influence of inductance saturation on current ripple can be quantitatively evaluated. Then, a comparison of the current ripple calculation between considering and ignoring inductance saturation of implemented inductors is drawn in detail. Furthermore, under the condition of inductance saturation, the output current ripple peak-to-peak value of three phases is used as the constraint for variable switching frequency pulsewidth modulation (VSFPWM) design. A comprehensive method is developed to compensate the effect of inductance saturation in VSFPWM. At last, the effectiveness of the proposed strategy is verified by the detailed simulation and experiment. [ABSTRACT FROM AUTHOR]

Unipolar-pulsewidth modulation (UP-PWM) inverter takes advantages of high power efficiency and small output chokes which is widely used in the industry. However, UP-PWM inverters cannot be used in parallel operation due to a current unbalance problem. This paper studies the current unbalance problem of paralleled UP-PWM inverters with common dc bus and ac bus. First, the problem of unbalanced inductor current is defined and analyzed. Second, a technique to eliminate unbalanced currents is proposed. The proposed current balancing technique only requires one more current sensor in an inverter module rather than changing converter topology or modulation method, which makes it possible to apply UP-PWM inverters in parallel-operation while keeping the advantages of unipolar switching. The proposed current balancing method is verified by both simulation and hardware experiment. Experimental verification is performed on two 1 kW, 400 V input, and 120 V/60 Hz output prototypes, which shows a good agreement to the analytical study. [ABSTRACT FROM AUTHOR]

The development and application of gallium nitride–heterojunction field-effect transistor (GaN–HFET) has been actively researched. Because GaN–HFETs have advantages in high-frequency operation, it is possible to downsize power converters by increasing the switching frequency. As the switching frequency rises, the switching loss increases in proportion to the frequency; therefore, application of a soft-switching method is needed to decrease the losses and heat generation. The resonant power conversion circuits represented by the class Phi-2 inverter have soft-switching feature; therefore, these circuits realize low-switching-loss operation even in high-frequency regions. However, the operation of these resonant circuits depends on the load conditions, generally. Thus, it is important to investigate the characteristics of the inverter for various load conditions. In this paper, we investigate the characteristics of the non-isolated and isolated class Phi-2 inverters by changing the load resistance and the duty ratio of the boost circuit connecting after the class Phi-2 circuit, which is operated at 13.56 MHz. We also developed a protection system during abnormal operations such as an open circuit. From experimental results, the class Phi-2 inverter has superior characteristics under various load conditions and changes. Moreover, we confirmed the effectiveness of the abnormal operation stop system. [ABSTRACT FROM AUTHOR]

In this paper, an integrated step-up inverter without transformer is investigated for photovoltaic (PV) power generation. The proposed topology can be derived by combining a traditional boost converter with a single-phase full bridge dc–ac converter. The main features of the integrated inverter are: First, the leakage current caused by the solar cell array-to-ground parasitic capacitance can be theoretically reduced to zero due to the characteristics of the converter configuration, which can improve the efficiency and the reliability of the PV generation system; second, the output ac voltage of the proposed inverter can be higher than the input dc voltage, which is capable of connecting low voltage PV panels to the grid; third, only five active switches are used in the presented inverter, and those switching devices can be synchronously driven by various sinusoidal pulsewidth modulation methods based on the carrier; therefore, the proposed inverter is compact and with curtailed cost. The working principle and analysis of the proposed integrated inverter are elaborated. Finally, simulation and experimental results are obtained in a lab prototype, which agree well with the theoretical analysis. [ABSTRACT FROM AUTHOR]

In order to provide high and extendable power levels for inductive power transfer (IPT) system, a parallel multi-inverter system based on modular inverter is presented. Various power requirements can be implemented by an adjustment of the number of paralleled inverters, which provides a high modularity. A master−slave scheme is employed for the switching-driver signals of parallel inverters, where one acts as a leader while others act as followers. Despite the master−slave scheme, the proposed circuit topology has natural robustness because of the equality in terms of the hardware configuration of each modular inverter. For proper parameters, the output phase (current lagging corresponding voltage) of an inverter is lower than the average of output phase of all inverters, when its output voltage lags behind others, and vice versa. Based on this approach, PI controllers are designed to implement phase synchronization for output voltages of all inverters. An IPT prototype supplied by the proposed parallel multi-inverter with three inverters was designed, built, and tested. Experiments show that the proposed parallel multi-inverter system has not only good circulating current suppression capacity but also excellent performance of phase synchronization. The maximum dc−dc efficiency was 94% at a 35.1 kW receiving power. This paper is accompanied by a Matlab/Simulink file demonstrating phase synchronization control. [ABSTRACT FROM AUTHOR]

This paper contains a comparison between three topologies of a three-phase two-level inverter: A quasi-Z-source inverter (qZSI), a voltage-source inverter with a boost converter and a voltage-source inverter with an interleaved boost converter. experimental results obtained from laboratory tests of equivalent 6-kW 100-kHz inverters based on SiC mosfets and Schottky diodes are provided. The following parameters are compared: Quality of input inductor current and output phase voltage as well as total power losses in the inverters. The results for these parameters are obtained for input voltage ranging from 325 V to almost 600 V (where feasible), for two sets of equivalent modulation methods (two regular methods and two reduced-loss methods), for a couple of characteristic values of deadtime and for the operation both at the maximum value of modulation index and at equal values of voltage across the inverter bridge. Results of the experiments show that the qZSI topology may, at certain conditions, surpass the traditional two-stage inverter topologies in the areas of input inductor current quality, output voltage quality and also power losses (at high values of input voltage). What is needed to obtain that is a careful examination of operating conditions, applied modulation method and deadtime value. [ABSTRACT FROM AUTHOR]

High slew rate of the line voltage $(\boldsymbol {dv}/\boldsymbol {dt})$ has been a concern for power inverters based on the emerging wide bandgap switching devices, such as silicon carbide (SiC) mosfets. Particularly, for SiC-based power inverters feeding electric machines interconnected with long cables, there could be more severe insulation stress on the stator windings in electric machines, due to the higher dv/dt output from the SiC inverters. Compared to the conventional lower voltage electric transportation applications (e.g., 270 V dc), higher dc bus voltage of 500–600 V can dramatically reduce cable weight and systematic copper losses, hence improve the power density and efficiency of power converters. However, high dc bus voltage further increases the $\boldsymbol {dv}/\boldsymbol {dt}$ level in the converter ac line voltages. Driven by the necessity of developing SiC inverters with 500 V dc bus in electric transportation applications while attenuating the $\boldsymbol {dv}/\boldsymbol {dt}$ stress to a low level, this paper presents a multi-domain design approach for dv/dt filters that comprehensively considers the constraints in electrical, magnetic, and thermal domains. Experimental results based on a 75 kW SiC inverter are provided to verify the efficacy of this design approach. [ABSTRACT FROM AUTHOR]

A dv/dt filter is useful to mitigate the deleterious effects of voltage pulses with high edge rates, such as voltage overshoot and ringing in motor drive systems, which can cause premature motor failure. With the introduction of wide-bandgap semiconductor drives, these issues will become more pronounced. This paper introduces a new type of dv/dt filter where the inductor, capacitor, and damping resistor are integrated into the output bus bar or cable of a silicon carbide (SiC) inverter. This integrated filter may be smaller, lighter, and cheaper to construct than filters built from discrete components. An analytical model of the integrated dv/dt filter is developed, and this model is used to design output filters for a 460 V AC, three-phase SiC motor drive. Prototype filters are constructed and tested with a SiC inverter connected to a 460 Vrms, 30-HP induction motor, and experimental results demonstrate output waveforms that match the analytical model and meet the National Electrical Manufacturers Association (NEMA) MG 1 Part 31 requirements for inverter-rated motors. Finally, the voltage waveforms and losses of the prototype-integrated filter are compared with several other mitigation options, demonstrating that the integrated filters meet the NEMA specification at a fraction of the mass and volume of the discrete component solution without sacrificing efficiency. [ABSTRACT FROM AUTHOR]

Zero-voltage-switching (ZVS) mosfet grid inverter has distinct advantages such as higher efficiency and higher power density. However, the ZVS inverter may lose ZVS condition during startup stage if it does not start properly. It may increase the voltage stress on mosfets and even destroy the power semiconductor device. In order to achieve the ZVS condition for ZVS inverter during the startup stage, this paper proposes a safe startup method with an auxiliary clamping capacitor pre-charging circuit and designed ZVS pre-charging pulse sequence. The pre-charging circuit is enabled only at the startup stage. Theoretical analysis shows that the proposed method is capable of reducing the voltage stress during the startup stage for the ZVS inverter. Finally, the proposed safe startup method is verified on a 3 kW grid inverter. [ABSTRACT FROM AUTHOR]

The magnetic resonant wireless power transfer (WPT) system with a class E inverter has wide application in mid-range power transmission, especially for several megahertz scenario. However, it is cumbersome for the existing modeling and analysis methods to obtain the analytical solution to the system variables, which limits the evaluation of system characteristic. This paper proposes a nonlinear mathematical model for the WPT system with a class E inverter. The equivalent small parameter method (ESPM) is first adopted to solve the proposed six-order nonlinear model, and symbolic-form steady-state periodic solutions are yielded. During the whole solving process, only three iteration steps are needed for the proposed method. Compared with other existing modeling and analysis methods, the symbolic periodic results acquired by the ESPM exhibit sufficient accuracy by virtue of the combination of more higher harmonics. Meanwhile, the calculation complexity is simplified remarkably. Simulation and available experiments validate the effectiveness and accuracy of the proposed method. [ABSTRACT FROM AUTHOR]