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In this paper, new half-bridge and full-bridge topologies for a switched-boost inverter are proposed. These topologies have a high boost factor in comparison with conventional types. In addition, the proposed topologies have continuous input current and can generate zero-voltage level in output. In this paper, the operation of the proposed inverters in different operating modes is analyzed. Then, the values of inductors and capacitors are designed. Moreover, the used switching pattern and its logical diagram are introduced. A comprehensive comparison between the proposed and conventional topologies in terms of the boost factor, the number of elements, and the efficiency shows the good features of the proposed inverters. Finally, to verify correct operation of the proposed topologies and derived equations, simulation and experimental results are presented. [ABSTRACT FROM AUTHOR]

The five-level nested neutral-point-clamped (5L-NNPC) converter is one of the most promising topologies for medium-voltage (2.3–7.2 kV) high-power applications such as medium-voltage drives, wind energy conversion systems, and grid-connected systems. The 5L-NNPC requires a fewer number of switching devices, freewheeling and clamping diodes, and flying capacitors compared to the existing five-level multilevel converters. In the 5L-NNPC topology, each flying capacitor voltage is regulated at one-fourth of the dc-bus voltage to obtain the five-level operation. Due to the lack of redundant switching states, it is difficult to control the flying capacitor voltages by using the pulse-width-modulation-based classical control methods. This paper proposes a model-predictive current control (MPCC) approach to control the flying capacitor voltages along with the output currents of the 5L-NNPC converter. The discrete-time model of 5L-NNPC is developed to implement the MPCC scheme. The simulation and experimental studies are conducted to verify the dynamic and steady-state performance of 5L-NNPC with the MPCC scheme. The performance of the proposed MPCC approach is compared with the conventional space-vector-modulation-based voltage-balancing approach. Furthermore, the flying capacitor voltage control capability of MPCC is verified at different load power factors. [ABSTRACT FROM AUTHOR]

A modular multilevel converter control system, based on converter energy storage, is proposed in this paper for two different control modes: active power and dc voltage. The proposed control system decouples the submodule (SM) capacitor voltages from the dc bus voltage. One of the practical applications is the management of active redundant SMs. A practical HVDC system with 401-level MMCs, including 10% redundancy in MMC SMs, is used for validating and demonstrating the advantages of the proposed control system. This paper also presents a novel capacitor voltage balancing control based on \max–\min functions. It is used to drastically reduce the number of switchings for each SM and enhances computational efficiency. [ABSTRACT FROM AUTHOR]

A fractional-order capacitor (FOC) plays a vital role in fractional-order circuits. However, the FOC with order $1< \alpha < 2$ based on existing manufacturing schemes can be only operated in milliwatt power level. Thus, the applications of an FOC in power conversion are limited. To solve the problem, this paper proposes a novel method for realizing a high-power FOC with order $1< \alpha < 2$, in which a power converter is applied to emulate the current–voltage characteristic of an ideal FOC, so the rated power of the FOC can be increased greatly and depended on the power converter. The corresponding topology and its control strategy are provided. The available experiments verify the effectiveness of the proposed approach. [ABSTRACT FROM AUTHOR]

In this paper, a single-phase multilevel ac/ac converter with reduced number of power semiconductor devices is proposed. For the simple case of a three-level converter, only three bidirectional switches and two capacitors are required. The proposed converter provides a highly sinusoidal and regulated output voltage with a simple topology. The efficiency is high because in each state of operation only one semiconductor conducts. The converter can be easily extended to any desired levels in the output voltage to even more reduce the output total harmonics distortion. Another advantage of the proposed converter is that by increasing the voltage levels, the stress on the switches will decrease. The proper performance of the proposed converter is confirmed through extensive simulation and experimental tests. [ABSTRACT FROM PUBLISHER]

A zero-current switching full-bridge isolated dc/dc converter based on a semiresonant L-C cell has been developed in this paper. With respect to the classical full-bridge configuration, no additional switches are required, thus by preserving its simplicity and robustness. The proposed architecture allows achieving zero-current switching at both primary and secondary sides. A 50-kW prototype has been developed and tested in different operating conditions. The experimental results are in agreement with the simulations by confirming the goodness of the proposed solution. Efficiency up to 97% at full load operating condition has been reached in the laboratory prototype. [ABSTRACT FROM PUBLISHER]

In this paper, a new cascade switch-ladder multilevel inverter topology is presented which can generate a large number of output voltage levels. First, a fundamental switch-ladder multilevel inverter structure is described. Then, the structure of recommended cascade topology based on series connection of fundamental switch-ladder topologies is presented. To generate maximum number of levels with minimum number of switching elements, dc sources, and voltage on switches, the proposed cascade topology is optimized. Comparison results prove that the presented cascade topology requires fewer numbers of components. Also, the value of voltage rating on switches is less than other structures. Experimental results for two topologies are analyzed to verify the performance of the proposed topology. [ABSTRACT FROM PUBLISHER]

Leakage current reduction of the single-phase transformerless cascaded H-bridge PV inverter is investigated in this paper. The high-frequency common-mode loop model of a typical single-phase cascaded H-bridge PV system is established. Based on the model, the main factors that affect the leakage current are discussed. The reason why the typical single-phase cascaded H-bridge inverter fails to reduce the leakage current is explained. In order to solve the problem, a cascaded topology based on the H5 inverter is presented, along with a new modulation strategy, which can ensure that the stray capacitor voltage is free of high-frequency components. In this way, the leakage current can be effectively reduced. Finally, a prototype with TMS320F28335DSP + XC3S400FPGA digital control is built. The performance tests of cascaded H-bridge and the proposed topologies are carried out. The experimental results verify the effectiveness of the proposed solution. [ABSTRACT FROM AUTHOR]

A new cascade topology for multilevel converter is introduced in this paper which comprises series connection of several submultilevel units. To determine the magnitudes of the dc sources, two new methods are described. The proposed topology is optimized to generate any levels with minimum number of components and peak voltage on switches. The presented topology can be used in high-voltage applications due to using the switches with low voltage rating. To indicate the merits of the proposed structure, comparison studies are provided with other topologies in terms of the number of elements and peak voltage on switches. The comparison results prove that the presented cascade multilevel converter requires fewer components. Moreover, it is shown that the total peak voltage on switches in the proposed topology is less than other structures. Experimental work is presented to demonstrate the performance of the presented multilevel converter. [ABSTRACT FROM PUBLISHER]

The flying-capacitor-based multilevel converter is one of the well-known breeds of the multilevel power converters. This paper proposes a new flying-capacitor-based multilevel converter to minimize the number of flying capacitors (FCs) and power switches. The advantage of the proposed FC-based multilevel converter in comparison with the conventional flying-capacitor multicell converter is that it needs fewer FCs. Also, in comparison with the stacked multicell converter, the proposed multilevel converter requires fewer semiconductor switches. In order to balance the voltage of the FCs in proposed multilevel converter, a new active voltage balancing method which is fully implemented using logic-form equations is presented. The proposed voltage balancing method measures output current and FC voltages to generate switching states to produce the required output voltage level, as well as balance the FCs voltages at their reference values. The output voltage of the proposed multilevel converter controlled with suggested active voltage balancing method can be modulated with any pulse-width-modulation (PWM) method, such as phase-shifted-carrier PWM or level-shifted-carrier PWM. Simulation results and experimental measurements of proposed FC-based multilevel converter are presented to verify the performance of the proposed converter, and its novel switching and modulation strategy, which is based on the active voltage balancing method. [ABSTRACT FROM PUBLISHER]

This paper presents a new formulation of a finite control set model-predictive control (FCS-MPC) algorithm, allowing to determine the best commutation instant in order to optimize the converter current tracking. This algorithm, mixing properties of FCS-MPC method and time resolution related to pulse width modulation schemes, is illustrated in a parallel flying capacitor converter. The parallel association of classical commutation cells is a good solution for increasing the output current driven by the converters, while the standard semiconductor technology is used. The control strategy used with this type of connection must be able to ensure not only a good distribution of the output current among the different legs, but also the balancing of the floating capacitor voltages. [ABSTRACT FROM PUBLISHER]

This paper studies microgrids where loads are supplied by parallel-connected inverters controlled by decentralized active power/voltage frequency and reactive power-/voltage-magnitude droop control laws. A paralleled ac system, such as a multiinverter microgrid, is susceptible to circulating currents due to differences in voltage magnitude, frequency, phase angle, or dc offset. Circulating currents due to differences in voltage magnitude and dc offset have been known issues reported in literature. However, an in-depth analysis of the problem is required to ascertain the deviation of the system-operating condition from the desired condition. This paper provides a mathematical model that predicts the effect of voltage-magnitude offsets on reactive power sharing between inverters. Simulation and experimental results verify the accuracy of the analytical results obtained from the mathematical model. We examine the effect of dc-circulating currents and propose a simple capacitor emulation control law implemented in software to eliminate dc-circulating currents. This solution is a possible alternative for hardware implementation to eliminate dc-circulating currents. The effectiveness of the capacitor emulation control law has been verified through experimental results. [ABSTRACT FROM PUBLISHER]

This paper introduces a multiple-input multiple-output modular multilevel dc–dc converter (MIMO-MMC) and its associated control scheme. The proposed topology has a bidirectional structure and may be utilized in both low- and high-power applications ranging from approximately 100 W–10 MW. The modular structure of the MIMO-MMC enables efficient component utilization through module voltage and current sharing capabilities. The topology can supply or extract regulated power from an arbitrary number of controllable voltage nodes without requiring source or load multiplexing, resulting in minimized filtering requirements. The MIMO-MMC's structure is described, and the steady-state operation of the converter is theoretically analyzed. The dynamic models of the converter for both step-down and step-up configuration are derived and employed to devise an effective control algorithm for closed-loop operation. A general method is provided for stability analysis of the proposed closed-loop system followed by a case study verifying stability of the system at different operating points. The steady-state operation and dynamic response of the converter under both configurations is investigated through simulation and experiment. [ABSTRACT FROM PUBLISHER]

The purpose of neutral-point voltage balancing algorithms in the three-level neutral-point clamped (3L-NPC) topology is to eliminate the voltage unbalance of top- and bottom-side dc-link voltages (neutral-point voltage). These algorithms are divided into dc unbalance and ac unbalance compensation methods. The dc unbalance causes distortion of output currents; therefore, this problem has to be solved. The ac unbalance implies that there is an ac ripple in the top- and bottom-side dc-link voltages. In applications using 3L-NPC topology, a large dc-link capacitor value is required to mitigate this ac unbalance problem. As a result, the size and the cost of applications become large and expensive. In this paper, a compensation method for mitigating the ac unbalance of the neutral-point voltage is proposed, which causes the dc-link capacitor value to be small, when a carrier-based pulse width modulation method is applied. The proposed method compensates the ac unbalance of the neutral-point voltage by adding an optimal compensation value to the reference duty signals. This compensation value is calculated simply by currents and reference duty signals. The calculation process of the optimal compensation value is discussed, and the effectiveness of the proposed method is verified with simulations and experiments. [ABSTRACT FROM PUBLISHER]

The behavior of the series–parallel resonant converter with a capacitor as output filter is analyzed when operating under optimum switching conditions. A polynomial is deduced to quickly compute what switching frequency and duty cycle are necessary at the control to obtain the desired output voltage and power in the converter. This polynomial is so simple that it is suitable for being implemented in low-cost digital processors. It could provide, for instance, a start-up strategy guiding the power supply to a known set point, or it could generate alarms if the currents or voltages measured are larger than expected. In this paper, the steps to obtain such a model are described in detail. As an example, the coefficients of the polynomials are deduced when the series and the parallel capacitor are the same. The grade of accuracy of the model has been demonstrated through experimentation on a prototype. [ABSTRACT FROM AUTHOR]

This paper consists of the presentation of a regulation strategy capable of controlling the energy stored in the modular multilevel converter (MMC) in an HVDC configuration. This is achieved by regulating the positive, negative, and zero sequences in dqo coordinates of the differential current using two rotating reference frames: at once and at twice the fundamental grid frequency value. The active and reactive negative sequence components of the differential current at twice the fundamental frequency are used to eliminate the oscillations of the three-phased leg energy, reducing significantly the capacitor voltage oscillations, while the zero-sequence component is used to regulate the total energy stored at a given reference. Meanwhile, active and reactive positive sequence components of the circulating current are used for eliminating the average energy difference between the upper and lower arms in a three-phase MMC. In order to decouple efficiently the differential current components, the decoupled-double-synchronous-reference-frame current control strategy is used. Finally, simulation results validate the performance of the MMC in an HVDC configuration with the proposed control. Control equations are demonstrated, and cross-coupled leg-energy terms are introduced. [ABSTRACT FROM PUBLISHER]

In this paper, three dc/dc ladder multilevel converters are compared. The first one is the classical ladder topology and the two other topologies presented are based on the classical one. A mathematical calculation of the output resistance and the gain of the converter as a function of the number of levels is carried out for the three topologies in order to estimate the voltage drop due to the output current. These calculations are validated with simulations and experimental results. Finally, the behavior of the three topologies is compared through experimental tests. Results show higher performance for the presented converters compared to the classical ladder. [ABSTRACT FROM AUTHOR]

The integration of photovoltaic (PV) modules in buildings causes problems with shadows that can strongly reduce the energy produced by these systems. Moreover, most PV modules are designed for stand-alone applications that have output voltage adapted to lead batteries. Indeed, this historical sizing of PV modules can be discussed in the case of grid-connected systems. In this paper, a cascaded dc/dc converter based on boost chopper is proposed. First, the advantages and the limits of this topology will be shown. Second, this topology will be optimized to maximize the efficiency or minimize the volume. The originality of this optimization is that the converters' parameters and the arrangement of the PV cells are variable parameters. Indeed, the optimization is done on the entire system. To realize these optimizations, semiempiric models of losses and volumes of different components of a boost chopper were developed. The optimization uses a successive quadratic programming algorithm. Considering the optimization results over the whole range of the specifications, a flexible solution is developed and experimental results are presented. Finally, optimized topologies connected to several PV are evaluated at different situations of typical shadows. [ABSTRACT FROM AUTHOR]