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This paper describes a flow control of the dye in the paper mill with the quasi-Z-source indirect matrix converter (QZSIMC) fed induction motor drive. More than a decade the voltage-source inverter (VSI) and current-source inverter (CSI) have been used to control the speed of the induction motor, which in turns controls the flow of dye. Recently, the matrix converter (MC) has been an excellent competitor for the VSI or CSI for its compactness. The voltage transfer ratio of the VSI, CSI, and MC has been limited to 0.866. Thus, the efficiency of these converters is less. To improve the voltage transfer ratio the quasi-Z-source network (QZSN) is to be used between voltage source and indirect MC (IMC). The modification in the shoot-through duty ratio of the QZSN varies the voltage transfer ratio greater than 0.866. Different voltage transfer ratios are needed for different voltage sag conditions. For a variation of the duty ratio of the QZSN, the fuzzy logic controller has been presented. To control the IMC vector control with space vector modulation has been presented. This paper proposes the implementation of QZSIMC adjustable speed drive for the flow control of dye in paper mill during different voltage sag conditions. A 4-kW prototype has been built and the effectiveness of the proposed system is verified with simulation results and experimental setup. Simulation is done in MATLAB, Simulink platform. Experimental setup is done with the aid of a TMS320F2812 (Texas Instrument) processor. The experimental results validate the maintenance of the speed of an induction motor at the set condition, thus controlling the perfect flow of dye in paper manufacturing technology. [ABSTRACT FROM AUTHOR]

In photovoltaic systems, common-mode voltage (CMV) generates leakage current, which shortens the insulation lifespan and causes safety problems. As for neutral-point-clamped (NPC) inverters, zero CMV PWM (ZCMV PWM) can be implemented to eliminate leakage current, but unable to balance neutral-point (NP) voltage in dc side. This article presents a novel modulation technique for NPC PV inverter. The strategy contains ZCMV PWM and another two modulation modes which keeps CMV constant in one switching period, so as to eliminate leakage current. In order to balance NP voltage, NP current is adjusted by selection of optimal modulation mode and the leakage current is still well eliminated during the process of balancing NP voltage. Compared with conventional ZCMV PWM, the proposed scheme can remove both leakage current and NP voltage deviation. The output performance and limitations of the proposed method are also introduced in the paper. Experiments are provided to verify the validity of the proposed method. [ABSTRACT FROM AUTHOR]

A novel single-stage doubly grounded transformerless inverter configuration which can buck-boost the output voltage is proposed in this paper. In this transformerless inverter configuration grid neutral is directly connected to PV panel negative rail which suppresses/eliminates the PV leakage currents. In addition, the tracking of maximum power point is possible for wide variation of weather conditions due to buck-boost voltage capability of inverter. Moreover, the proposed inverter topology has symmetrical operation in both half cycles hence injects negligible DC offset current in to the grid. Here the symmetrical operation of inverter is achieved due to one inductor is used for both half cycles of the grid. The proposed topology is realized using five switches, two of which work at 50 Hz and remaining three switches at high frequency which reduces overall semiconductor losses. Further, the proposed inverter topology is controlled through a newly developed modulation technique and possible working modes are analyzed and described thoroughly. For performance validation, the experimental analysis of grid connected proposed inverter is performed on a 1 kVA system and results show that proposed inverter feeds power in to the grid with lesser THD while achieving greater efficiency. [ABSTRACT FROM AUTHOR]

Miniaturization and low cost contribute to the development and popularization of wireless power transfer (WPT). Reducing the number of power conversion stages can reduce the volume and cost of the WPT converter, and even make it possible to improve the efficiency. A single-stage WPT converter with constant current (CC) and constant voltage (CV) output and its asymmetric modulation method are proposed in this paper. A direct AC-AC converter is applied to the primary side of the WPT converter to directly convert line-frequency AC to high-frequency AC. The applied direct AC-AC converter that can replace the commonly used multi-stage primary converter reduces the number of circuit devices, thereby reducing the volume and cost of primary converter. The proposed WPT converter can realize zero voltage switching (ZVS) and power factor correction (PFC). In order to achieve CC and CV output, a switchable hybrid compensation topology is applied to the proposed WPT converter. A 720-W experimental prototype was manufactured to verify the rationality of the proposed WPT converter and the correctness of the theoretical analysis. [ABSTRACT FROM AUTHOR]

Both the local and concurrent commutation failures (LCF and CCF) are concerned threats to the secure operation of multi-infeed LCC-HVDC (MIDC) systems, which will be largely impacted by the voltage stability. However, this impact has not been clearly revealed yet by earlier works due to the lack of the related analytical evaluation method. Thus in this paper, the analytical evaluation method related to the LCF and CCF with the voltage stability in MIDC systems is firstly proposed considering the complicated inter-inverter interactions. This is realized by deriving the analytical expressions of the LCF and CCF immunity indices (LCFII and CCFII) as the functions of the voltage stability factor (VSF) based on the system quasi-steady-state model. Moreover, the proposed method is used to clearly evaluate the impact of the voltage stability on the LCF and CCF by comprehensively conducting the parametric dependence analysis of the LCFII, CCFII, and VSF versus various system parameters and operation variables. The analysis results indicate that in some certain situations, increasing the voltage stability of MIDC systems however imposes an unexpected negative impact on the LCF and CCF. Finally, the simulation results of the PSCAD/EMTDC program based on a tri-infeed LCC-HVDC system validate the theoretical developments. [ABSTRACT FROM AUTHOR]

Due to different solar radiation, temperature, and other reasons of modules in the three-phase cascaded H-bridge (CHB) photovoltaic (PV) inverter, the output power among PV modules will be unequal and lead to unbalanced grid currents, which cannot meet the requirements of grid codes. On the other hand, the second-order voltage ripple is aroused in the dc-link capacitor since each phase-leg of the CHB inverter is made up of a single-phase inverter. Concerning these two issues, this paper proposes an optimized third harmonic injection method based on fundamental frequency zero sequence injection (FFZSI), which is a conventional method to handle the slight power imbalance problem. In this paper, the FFZSI is adopted to redistribute the power among three phases, and then the third harmonic is injected into the three-phase combined reference waveforms according to the two requirements: all modules are free from overmodulation and the dc-link voltage fluctuation is mostly reduced. Therefore, the proposed method can reduce the dc-link voltage fluctuation and extend the power balance range of FFZSI at the same time. The validity and effectiveness of the proposed method are verified by simulation and experimental results. [ABSTRACT FROM AUTHOR]

This paper proposes a new three-phase to five-phase transformer, with a 30-pulse AC–DC converter for power quality improvement in vector-controlled induction motor drive. Here, three isolated transformers (T1, T2, and T3) are used and each transformer is designed to convert three-phase AC-supply into five-phase AC supply, to achieve ten-pulse AC–DC conversion. A unique configuration and angle among these three transformers is designed in such a way that the resultant input current of this transformer shows 30 pulses in it. A hybrid multilevel inverter is proposed in this paper, which is cascading a three-level neutral point clamped inverter with a two-level voltage source inverter to drive an induction motor (IM). A modified level shifted carrier-based sinusoidal pulsewidth modulation and a 3rd harmonic injection techniques are utilized to modify the modulating signal, to enhance the fundamental magnitude, and to reduce the harmonics than traditional technique. The responses of proposed medium voltage induction motor drive (MVIMD) are evaluated by simulating in MATLAB-Simulink. The proposed MVIMD performance is then verified using a scaled down laboratory prototype under various operating conditions such as steady state, starting, load perturbation, speed control, field weakening, varying load conditions, and over a wide speed range of IM. [ABSTRACT FROM AUTHOR]

This paper proposes a family of single-stage converters consisting of three different converters, each of which is able to produce a variety of waveforms through the waveform-subtraction technique. We brand this converter family as waveform-subtraction based single-stage converter (WSSC). By using only a single-stage converter, the proposed waveform generation technique is able to realize dc–dc–ac conversions and suppress input current ripple, meeting the needs of modernized power grid with renewable energy sources. At the same time, converters in this WSSC family are capable of generating a range of shapes, such as triangular, rectangular, and sawtooth waveforms, with simple structures, demonstrating its suitability of being applied in the electrochemical industry, e.g., in the electroplating process. Furthermore, the proposed family converters also realize substantially better input current ripple suppression compared to other conventional converters. In order to prove the validity and efficacy of the proposed WSSC and the theory underpinning it, in this paper, extensive simulations and analyses are conducted to verify the theoretical foundation of the proposed WSSC strategy, and the prototype of a converter from the proposed converter family is built and tested in our laboratory, which validates the functionality of the WSSC. [ABSTRACT FROM AUTHOR]

This paper proposes a new control scheme to eliminate the 3rd harmonic in the output currents of grid-following inverters under unbalanced grid conditions. Unbalanced grids adversely affect the performance of grid-following inverters due to the oscillations appearing on the DC-link voltage with a frequency twice the line frequency. The paper is based on instantaneous active reactive control (IARC) technique due to its advantages over other existing methods. However, the presence of severe asymmetrical 3rd harmonic distortions in the inverter output currents is the main challenge with IARC method, which impairs the power quality requirements. This paper enhances the IARC scheme by proposing a 3rd harmonic elimination approach by adopting a current reference generation method using the symmetric sequence components concept. Furthermore, the proposed scheme complies with the grid code requirements by injecting the requested reactive current. Finally, the proposed approach is evaluated by theoretical and simulation analysis and validated experimentally using a hardware setup. [ABSTRACT FROM AUTHOR]

This paper proposes a novel polygonal voltage space vector structure (SVS) having 30 sides, for a star-connected induction motor drive. The SVS eliminates the presence of harmonics up to 25th order from motor phase voltage throughout the entire modulation range, providing a torque profile devoid of lower order pulsations. Linear modulation is extended till 99.63% of base speed without exceeding the motor phase voltage rating. Topology consists of a dc-link fed primary inverter and two equal low voltage modular capacitor fed secondary inverters. Here the harmonics generated by the primary inverter is canceled by the secondary inverter which acts as a switched capacitive filter. Detailed description of the SVS generation and timing calculations are provided in this paper. Effectiveness of the proposed scheme is validated using experimental results, inverter loss calculations, and harmonic analysis. [ABSTRACT FROM AUTHOR]

In this paper, a dynamic model based on the sampled-data method is presented for a wireless power transfer (WPT) system. The orders of the derived model are equal to the orders of a system. The modeling is different from the existing dynamic modeling for WPT systems, which almost double the model's order. Furthermore, the systematic analysis process is suitable for any WPT topologies and without the higher harmonics neglected and low-frequency approximation. Meanwhile, the state variables are allowed to vary up to twice the switching frequency, since the half-period symmetry property is exploited. In this paper, the series–series (SS) compensated WPT system is chosen as an example and the large-signal model and the steady-state operation point are determined. The small-signal responses perturbed by the phase-shift angle, switching frequency, and input voltage are obtained. The derived model is more adequate with simulation and experimental validation. [ABSTRACT FROM AUTHOR]

Four-level hybrid-clamped inverter is a newly proposed topology that can operate under a wide voltage range without switches connected in series. However, when it is applied in medium voltage high power conversions, the flying capacitors in each phase will occupy a huge volume and a high switching frequency is required to restrain the voltage ripples. In order to overcome this drawback, a four-level active neutral-point clamped inverter is discussed in this paper, which consists of only six switches and no diodes or flying capacitors are required. In order to balance the neutral-point voltages under the full power factor and modulation index range, a capacitor voltage balance method based on carrier-overlapped pulsewidth modulation is proposed in this paper. The upper and lower dc-link capacitor voltages are balanced by zero-sequence voltage injection and the central dc-link capacitor voltage is balanced by adjusting the duty cycles of switching signals slightly. Simulation and experimental results are presented to confirm the validity of this method. [ABSTRACT FROM AUTHOR]

This paper presents a 5-level inverter topology for open-end induction motor drives by using a single dc source. The open stator windings of the drive are supplied with a 3-level flying capacitor inverter from one end and capacitor-fed 2-level inverter from another end. The voltage ratio of the dc link to the capacitor in 2-level inverter is maintained at 4:1 ratio to generate five-level voltage output. The capacitor in 2-level inverter is balanced by the switching redundant vector combinations from both the inverters while the floating capacitors in the 3-level inverter are balanced by using redundant switching states. The proposed topology gives 5-level operation with less number of floating capacitors and power semiconductor switches compared to other existing topologies. Also, the balancing of the capacitors is independent of load power factor and modulation index. Further, the generalization of the proposed dual inverter scheme for any n-level inverter is also included in this paper. The experimental results and required analysis are also presented to validate the inverter scheme. [ABSTRACT FROM AUTHOR]

In this paper, a new modular and active snubber cell, easily applicable, and attractive for converters, especially have many switches proposed. This snubber cell is implemented on the single phase of a grid-connected three-phase T-type three-level inverter (T-3LI). In this new converter, the main switches turn-on under zero-voltage transition and turn-off under zero-voltage switching (ZVS). Also, auxiliary switches turn-on under zero-current switching and turn-off under ZVS. All snubber diodes operate under soft switching (SS). There are no additional current and voltage stresses on the main switches. During an SS operation, the switching energies are transferred to a dc voltage source. Then, these energies are processed to input with an independent dc–dc converter. Thus, all switching energies are recycled. In this paper, the principle operation and steady-state analysis of the modular and active snubber cell for a single-phase T-3LI are presented and experimental results, rated 1 kW and 100 kHz, are provided to verify theoretical analysis. [ABSTRACT FROM AUTHOR]

In this paper, many impedance-source inverters with coupled inductors have been investigated to obtain a high step-up boost ratio. However, the leakage inductors in these topologies induce great voltage spikes at the dc link, which will increase the voltage stress of switches. Thus, the power level of inverters is limited. Furthermore, the efficiency of the inverters can be degraded by the losses associated with leakage inductors. To address abovementioned issues, this paper proposes a family of low-spike high-efficiency Y-source inverters. The proposed inverters have the ability of eliminating voltage spikes at the dc link and recycling the leakage energy via the additional diode and capacitor. In order to show the excellent characteristics of the proposed topologies, this paper compares the performances of the proposed inverters and the improved-Y-source inverter in many aspects. Simulation and experimental results have verified the abilities of the proposed inverters. [ABSTRACT FROM AUTHOR]

A space vector modulation (SVM) technique of a dual-inverter system for an open-end winding motor drive is described in this paper, where one inverter has a battery power source and the other has an only capacitor across the dc bus. The SVM must be achieved to operate the motor with field-oriented control and simultaneously to control the capacitor voltage at a constant value by using redundant switching states of the dual-inverter system. The control of the capacitor voltage is carried out by selecting a charging or a discharging mode in each redundant switching state, taking the instantaneous motor power factor into account. In addition, it is also required to reduce the error voltage pulses, which are generated in output multilevel voltage waveforms during the dead time. The compensation method of the existing dead-time scheme and the improved SVM sequence to reduce the error voltage vectors are proposed in this paper. The proposed methods are examined through several experimental tests and are confirmed to generate superior output voltage waveforms from the viewpoint of the measured total harmonic distortion and dv/dt. [ABSTRACT FROM AUTHOR]

This paper presents a new series capacitor based frequency scan method to assess the subsynchronous resonance risk including induction generator effect (IGE) and subsynchronous control interaction (SSCI). Most existing frequency scan methods are generator based and calculate the impedance as viewed from the neural bus of the study generator. In this paper, the generator-based frequency scan method is discovered to be inadequate or inapplicable to deal with a cluster of inverter-based generation resources under some circumstances. The proposed method scans the impedance as viewed from the series capacitor to assess the IGE/SSCI risk. With nearby inverter-based generation resources modeled by their frequency-dependent impedances, the proposed method is capable of assessing the IGE/SSCI risk for a cluster of inverter-based generation resources. The electromagnetic transient simulation was conducted to validate the proposed method. The proposed method also successfully demonstrates the nonlinear impact of the number of in-service units on the SSCI performance for a cluster of inverter-based generators. [ABSTRACT FROM AUTHOR]

Multilevel inverters (MLIs) are playing a pivotal role in the power sector with potential applications, such as interfacing renewable energy sources with the grid and several industrial drive applications. MLIs with a smaller number of switching devices are more promising due to their compact size, reduced cost, and higher efficiency compared with their traditional counterparts. This paper, therefore, presents a new three-phase seven-level inverter. This topology is a combination of two cascade-connected two-level voltage-source inverters (VSIs) and H-bridge cells with flying capacitors (FCs). This paper presents the operating principle and the balancing technique for the dc-link capacitors and FCs. The generation of various output voltage levels and the limitation of the sinusoidal pulsewidth modulation control for FC voltage balancing is also presented. The number of components in the proposed circuit configuration and their voltage ratings are considerably lower compared with the recently proposed topologies. The behavior of the proposed circuit configuration is first assessed with simulation studies and is then tested with a laboratory prototype. The simulation and experimental results validate the effectiveness of the proposed topology and the voltage balancing technique. [ABSTRACT FROM AUTHOR]

In this paper, a new family of impedance source inverters is presented. It employs high-frequency electrical isolation between the inverter bridge switches and the load along with voltage clamping across the dc-link voltage. Conventional Z-source inverters (ZSIs) employs an impedance network that consists of inductors and capacitors. It has unique features that realize both step-up/step-down functions and eliminates the need of dead/overlap times. This paper extends this novel concept by using electrical isolation in impedance source inverters. High-frequency isolation has many advantages in terms of immunity and reliability; when applied with impedance source inverters this makes ZSIs a preferable choice for industrial applications. In photo-voltaic systems, the addition of the high-frequency transformer provides safety by avoiding the injection of dc circulating current into the grid, without the need of an external bulky line frequency transformer. The gain of the proposed inverter design can be accurately selected by choosing the turns ratio of the high frequency transformer (HFT) or by adjusting the shoot-through duty cycle (STDC) to the inverter. This allows for greater freedom especially when utilizing a higher modulation index, with the STDC allowing dynamic gain adjusts to be done speedily during operation of the inverter. Additionally, a dc-rail voltage clamping technique for the proposed class of isolated ZSIs is also discussed. This technique provides benefits not only in improving the output voltage quality, but also in reducing voltage stress of the active and passive components by minimizing the voltage spikes across the switching devices. In this paper, several high-frequency isolated ZSIs are presented, and an example isolated improved ΓZSI design is shown and discussed in detail. Simulations are provided for the proposed class of isolated inverters to verify their working. Further experimental investigation has been done for which results for the isolated improved ΓZSI are reported. These empirical results have largely confirmed the expected benefits that were determined through simulation and accurate model-based testing. [ABSTRACT FROM AUTHOR]

In this paper, an overload and short-circuit protection method is proposed for voltage source inverter-based uninterruptible power supply (UPS) system. In order to achieve high reliability and availability of the UPS, short circuit and overload protection scheme are necessary. When overload or short circuit happens, using the proposed control method, the amplitude of the output current can be limited to a constant value, which can be set by the customer to avoid the destruction of the power converter, and to obtain a faster recovery performance as well. The detailed principle of the proposed protection method is discussed in this paper. It mainly contains three parts in the control diagram for current limit, first is the anti-windup in the voltage and current controllers, then the feedforward of the capacitor voltage to the current control loop, the last is the fast reset of the resonant part of the current controller when overcurrent happens. The procedure of developing the control method is also presented in the paper. Experimental results on a commercial UPS system are presented to verify the effectiveness of the control method. [ABSTRACT FROM AUTHOR]

This paper presents a novel seven-level inverter topology for medium-voltage high-power applications. It consists of eight active switches and two inner flying capacitor (FC) units forming a similar structure as in a conventional active neutral-point-clamped (ANPC) inverter. This unique arrangement reduces the number of active and passive components. A simple modulation technique reduces cost and complexity in the control system design without compromising reactive power capability. In addition, compared to major conventional seven-level inverter topologies, such as the neutral point clamped, FC, cascaded H-bridge, and ANPC topologies, the new topology reduces the dc-link voltage requirement by 50%. This recued dc-link voltage makes the new topology appealing for various industrial applications. Experimental results from a 2.2-kVA prototype are presented to support the theoretical analysis presented in this paper. The prototype demonstrates a conversion efficiency of around 97.2% ± 1% for a wide load range. [ABSTRACT FROM AUTHOR]

Multilevel inverters (MLIs) are being used in wide range of power electronic applications. These converters have attracted a lot of attention during recent years and exist in different topologies with similar basic concepts. This paper presents five main submodules (SMs) to be used as the basic structures of MLIs. The paper reviews the common MLI topologies from the structural point of view. The topologies are divided into the different SMs to show conventional MLI configurations and future topologies that can be created from the main SMs. A comparative study between different topologies is performed in detail. The MLIs are categorized and investigated with from different perspectives such as the number of components, the ability to create inherent negative voltage, working in regeneration mode and using single dc source. [ABSTRACT FROM AUTHOR]

This paper proposes an “isolated soft switching current fed LCC-T resonant dc–dc converter for PV/fuel cell applications.” This converter is able to achieve zero voltage switching for front-end inverter switches and zero-current switching for voltage doubler diodes. The majority of dc–dc converters have compact capacitive (C) filter in output, but high harmonic currents through transformer makes them bulky. The proposed converter attempts to improve harmonic content through a transformer under wide load and input variations as well as it can significantly reduce required turns ratio of transformer to achieve required output voltage. For the above reasons, the proposed converter can offer better footprints and therefore it can be a potential candidate for PV/fuel cell applications. This paper presents basic operating principal, detailed analysis, control, and design of the proposed converter with the help of an example. This converter operates in two modes, i.e., constant duty cycle mode and constant frequency mode, depending on load demand, and is explained through operating curves. Finally, experimental results are included for justifying the proposed theory. [ABSTRACT FROM AUTHOR]

Reduced switch active phase converters (APC) are cost-effective solutions for running three-phase loads from single-phase grids. This paper proposes a novel auxiliary-capacitor-based APC (AC-APC) for this application. The combination of the topological location of the auxiliary capacitor and the control of the AC-APC reduces current stress on the semiconductor devices. In this paper, a selection criterion for the optimal auxiliary capacitor value is formulated to reduce the device currents in such a way that the overall efficiency is enhanced. This paper presents a comparative analysis of converter volt-ampere (VA) rating and device power loss for conventional H-bridge active front-end and inverter-based topology, APC, and AC-APC. To evaluate the efficacy of the proposed AC-APC, an experimental study is conducted on the APC and the AC-APC feeding a 3-hp three-phase induction motor. At a full load of $\text{2.5}\,\text{kW}$ and $\text{0.8 } \text{power factor}$ , the measured maximum efficiency of the AC-APC is $2\%$ higher than that of the APC. Analytical evaluation of converter currents and device power loss are in close agreement with experimental observations. [ABSTRACT FROM AUTHOR]

In low-power applications of photovoltaic (PV) systems, the transformerless grid-connected inverters have been preferred to increase the efficiency and reduce the cost, size, and power losses when they are compared to the ones with the transformer. A transformerless single-phase inverter topology with a single dc-link capacitor for the grid-connected PV systems is proposed in this paper. The proposed inverter has been simulated by using a cooperation process of the MATLAB and SPICE package programs and it has been implemented for experimental verification. The proposed inverter reduces the high-frequency common-mode leakage current caused by parasitic capacitances of PV panels, whereas it is controlled with the unipolar sinusoidal pulsewidth modulation. Also, the results show that the common-mode voltage remains constant. The efficiency of the proposed inverter has been compared to that of the most common topologies having the dc-link decoupling during the zero voltage states. This paper is accompanied by a video file demonstrating the power loss distribution in the inverter. [ABSTRACT FROM AUTHOR]

This paper proposes a modular on-road wireless power transfer system with interoperable power adjustment mechanism. The paper is anticipated to enhance the capability of on-road charging during the movement of automated guided vehicles (AGV), by which the traveling mileage is increased, while the battery volume is decreased. The system design includes an interoperable power adjustment technique based on the detected impedance, and the moving position of AGV can be, hence, comprehended so as to facilitate the adjustment of the output power from each transmission module in a more flexible way. Through the investigation of on-road charging efficiency, all of coil magnetic analysis, misalignment charging evaluation, system stress simulation, and resonant characteristics investigation are performed. Experimental results gained from software simulation and hardware realization are beneficial for AGV charging applications. [ABSTRACT FROM AUTHOR]

In modern power systems, the increasing penetration of renewables and power electronics, particularly inverter-based wind and solar power generation, is altering power system dynamics and bringing new stability concerns. One challenging issue that is attracting considerable attention is the wide range of power oscillations associated with multiple parallel grid-connected inverters. In such systems, the characteristics in terms of resonance and oscillation are significantly different from single-inverter systems. This paper investigates the mutual interaction and stability issues of multiple grid-interfacing inverters with LCL-filters in power-electronics-based power systems under various grid conditions. The investigation reveals that such interactions between power inverters and the grid may excite multiple resonances at various frequencies under certain grid conditions. The nodal admittance matrix concept, which was originally from power systems engineering, is adopted here. Moreover, this paper further develops an Interaction-Admittance model that can effectively describe these mutual interactions in terms of a physical network admittance. We apply our model to various scenarios such as stiff grid conditions and inductive grids with/without power factor correction capacitors. The results with the proposed framework demonstrate an intuitive interpretation of multi-inverter system resonance and instabilities. Finally, simulations and experiments on a lab-scale system are provided to verify the theoretical analysis. [ABSTRACT FROM AUTHOR]

This paper describes a dc-link voltage control method of a single-phase back-to-back cascaded H-bridge inverter (SBCI) for a medium-voltage motor drive system. The main advantage of the SBCI topology over the conventional regenerative cascaded H-bridge topology with a three-phase active front-end (AFE) is a simple system structure, which is composed of an input transformer, a power cell, a current sensor, etc. However, the challenging points of the SBCI are larger voltage ripple in the dc-link capacitor and imbalance of dc-link voltages of each phase. The asymmetric dc-link voltage of each power cells could cause unstable operation such as over-modulation due to the lack of the dc-link voltage of a particular phase and result in over-voltage or under-voltage faults. In this paper, the control strategy of the dc-link voltage for the SBCI that uses the negative-sequence voltage of the converter is described. The proposed control method is verified with a computer simulation whose target is a 6.6-kV–1.25-MW medium-voltage drive system. Also, through the experimental setup with the prototype SBCI whose power rating is 16.2 kVA, the dc-link voltage of each AFE has been controlled within a 0.5% error of its reference value at the full load. [ABSTRACT FROM AUTHOR]

This paper presents a new single-source three-phase seven-level inverter with an inherent three-time voltage boosting capability for medium-voltage applications. The proposed topology is comprised of series connection of two switched-capacitor (SC) networks with an added half-bridge module per phase. Each of such integrated SC networks requires a single capacitor associated with three active power switches. The three-time voltage boosting feature of the proposed topology can reduce the dc-link voltage requirements by 50% in comparison to the traditional neutral point clamped (NPC), flying capacitors, active NPC (ANPC), hybrid clamped ANPC, and cascaded H-bridge topologies, and 75% to advanced ANPC topologies. It can also reduce the number of required switches and capacitors as well as their voltage stresses compared to those state-of-the-art topologies reported in the literature. By integrating “n” number of added SC networks in the proposed seven-level basic topology, the number of output voltage levels can be extended to 2n+3 per phase. A finite control set model predictive control algorithm is also derived to control the converter in both the active and reactive power exchanges modes without distorting the generated grid current quality. The capacitor voltage balancing is inherent in the proposed topology, and thus, there is no need for any additional voltage balancing circuit, which further reduces the control complexity. The performance of the proposed topology and its control algorithm are validated by several measurement results. [ABSTRACT FROM AUTHOR]

The focus of this paper is on analyzing the impact of conservation voltage reduction in the presence of active devices such as solar photovoltaic (PV) and developing controls that leverage these distributed energy resources. An event-driven predictive approach for real-time volt/volt-ampere reactive (VAR) optimization, along with a local two-level adaptive volt/VAR droop-based control algorithm for advanced distribution management systems, is introduced. The methodology covers aggregated and autonomous controls under different timescale operations, including the impact and effect of unpredicted events such as cloud transients on PV power production. Besides, the control schemes include the uncertainties in PV power generation and load power demand. The proposed methodology is validated in a real-time framework using the real-time digital simulator platform through co-simulation with models based on Python and OpenDSS (Open Distribution System Simulator). The developed methodology is tested on the modified IEEE 123-feeder test system. The results reveal that the proposed methodology works well in the presence of high penetrations of PV power, produces significant energy savings, and mitigates over-/undervoltage problems. [ABSTRACT FROM AUTHOR]

A new transformer-less three-level grid-tied inverter is proposed in this article. By employing the switched-capacitor (SC) modules, a new topology is derived. The proposed topology has some features which are high efficiency, the capability of voltage boosting without utilization of any additional boost stage, and suppressing the leakage current by using common grounded strategy. In this article, a peak current control is employed to generate the gate pulses of power semiconductor switches and adjustment of both active and reactive powers. By doing so, the grid injected current is controlled and adjusted to have a proper quality. The operation modes, design consideration, and a comparison with some recently proposed grid-connected topologies are done through this paper. Finally, the performance and feasibility of the proposed inverter are confirmed with a 500 W experimental prototype. [ABSTRACT FROM AUTHOR]

The instantaneous output power of the two-stage single-phase grid-connected photovoltaic (PV) inverter pulsates at twice the line frequency ($2f_{{\text{o}}}$), generating second harmonic current (SHC) in the front-end dc–dc converter and PV panel, which will affect the maximum power point tracking operation and deteriorate the overall conversion efficiency. The generating mechanism of the SHC is analyzed in this paper and it is pointed that in order to eliminate the SHC in the front-end dc–dc converter and PV panel, the voltage loop gain of the front-end dc–dc converter should be high enough at $2f_{{\text{o}}}$. Since there is a −180° phase abrupt at the resonant frequency of the input side filter capacitor and the inductor, the system may be unstable. To cope with this problem, the inductor current feedback active-damping scheme (ADS) is adopted. For further improving the loop gain at $2f_{{\text{o}}}$ , proportional–integral–resonant regulator with ADS (PIR + ADS) is proposed in this paper. Besides, a step-by-step closed-loop parameters design method is presented. Finally, a 3-kW two-stage single-phase grid-connected PV inverter has been fabricated and tested, and the experimental results verify the feasibility of the proposed control schemes. [ABSTRACT FROM AUTHOR]

Motors and inverters are increasingly being used in vehicles. As more vehicle components are being adopted, requirement for safety and installation space are increasing. Growing attention is being paid to the use of six-phase permanent magnet synchronous motors (PMSMs) and their parallel control by two inverters, because of their reduced size and enhanced safety. This paper proposes a pulsewidth modulation (PWM) control algorithm for a six-phase PMSM. In low-voltage vehicle components such as electric power steering, the current is usually acquired with resistors placed under the low-side switching devices. In the proposed control algorithm, the neutral voltage of the two inverters is shifted to either a lower or higher voltage within a certain range to allow for the signal conditioning time delay after the switching device turns on or off, and the time taken for the phase current to rise or settle. The paper proposes a novel PWM control algorithm that ensures that the on-time of the low-side switching devices satisfies the restriction on current sensing with resistors and reduces the current in the capacitor at the same time. The work contributes to reducing the current in a practical configuration involving low-voltage vehicle components. [ABSTRACT FROM AUTHOR]

The switching speeds of next-generation power semiconductor devices, such as those made of silicon carbide and gallium nitride are roughly ten times those of conventional devices (e.g., silicon insulated-gate bipolar transistors). This increases the frequency range of the electromagnetic noise accompanying the switching operations of pulsewidth modulated (PWM) converters and worsens the influence of radiated noise. The authors have previously proposed an active common-mode filter (ACF) that reduces the radiated noise from the power cables connected to a PWM converter and evaluated its effect in reducing radiated noise by using a function generator as a common-mode (CM) noise source. In this paper, the ACF is applied to a motor drive system fed by a three-phase PWM inverter, and the attenuation characteristics of the CM voltage are evaluated. To avoid saturating the ACF, the combination of an active common-noise canceller and the ACF is discussed. The experimental results show that the system constructed in this paper can suppress the CM voltage produced by the PWM inverter over a wide frequency range from 100 to 100 MHz. [ABSTRACT FROM AUTHOR]

This paper proposes a high-power-density and reliable inverter topology, which transfers the maximum power of a PV array to the load in one power conversion stage. The single-stage power conversion, along with the soft-switching capability of the proposed three-phase PV inverter promises high efficiency at all operating points. Instead of a capacitive dc link that decouples the dc–dc converter and the voltage source inverter in traditional two-stage PV inverters, a high-frequency capacitive ac link is employed in the proposed inverter, which enables exploiting a very small film capacitor, rather than a bulky electrolytic capacitor, for transferring power. Eliminating electrolytic capacitors prolongs the lifetime of this inverter. Considering the long lifetime of PV modules, this feature is of high importance in PV applications. The high-frequency ac link also allows using high-frequency transformers for providing galvanic isolation. Therefore, this inverter is expected to have a very high power density. This paper presents principles of the operation and control, design, and analysis of this inverter, and verifies the performance of the inverter through two prototypes: a 2-kW Si-based prototype and a 2-kW SiC-based prototype operating at different switching frequencies. [ABSTRACT FROM AUTHOR]

Enhancement of dc bus voltage utilization for a five-level inverter with single dc source and capacitor-fed H-bridge (CHB) units is investigated in this paper. A carrier-based modulation technique is used for boosting the dc bus utilization, which is established by providing detailed mathematical analysis. The five-level inverter used here is realized by cascading a CHB unit to each phase of a three-level neutral point clamped inverter. The increase in dc bus voltage utilization owes to the pole voltage redundancies offered by CHB units. The floating capacitors of H-bridge units are balanced within a quarter fundamental cycle using the switching state redundancies of pole voltage levels. The aforementioned modulation technique allows the inverter to enhance the dc bus utilization from 0.577 $\text{V}_{\text{dc}}$ to 0.63 $\text{V}_{\text{dc}}$ under unity power factor. This enhancement is obtained in the linear modulation range without increasing the dc bus voltage, and thus, the inverter can operate without the presence of low-order harmonics in its phase voltages. The strength of this paper lies in its detailed mathematical analysis for finding out the limiting modulation index and power factor condition in the light of floating capacitor voltage balancing issue. Simulation as well as experimental verification of the modulation scheme is carried out on an induction motor drive under various operating conditions. It is shown that this carrier-based modulation technique is suitable for any single source inverter topology with one CHB unit per phase. [ABSTRACT FROM AUTHOR]

This paper proposes a novel method for instantaneous balancing of neutral-point (NP) voltages with stacked multilevel inverters (MLIs) for variable-speed drives. The stacked MLI uses series-connected dc sources and NPs (connecting points of dc sources) to obtain the desired levels. The balancing of NP voltages are obtained by using a low-voltage-capacitor-fed cascaded H-bridge (CHB) per phase of a symmetrical six-phase induction machine (IM), which ensures zero current drawn from NPs (at any given instant). Since no current is drawn from NPs, the single dc-link operation with stacked capacitors is also possible. The scheme is suitable for applications, where low-voltage dc sources and batteries are stacked to form a dc link. A variable-speed operation is done using a seven-level inverter scheme for a symmetrical six-phase IM, which is formed by three dc-link stacked capacitors cascaded with two low-voltage-capacitor-fed CHBs per phase. Furthermore, the method is extended for an open-end IM to obtain a seven-level common-mode eliminated space vector structure using a single dc link. The generalization of this method for any stacked $n$ -level inverter without NP voltage deviation is also presented in this paper. The experimental results and analysis are included to validate the proposed method. [ABSTRACT FROM AUTHOR]

This paper proposes a new dc–ac converter with a reduced number of semiconductor switches and gate drive and control circuit components. A salient feature of this inverter is its pure sinusoidal line-to-line voltages with no need for output filter. Also, the proposed inverter improves the voltage utilization factor of the input dc supply compared to the four-switch three-phase inverter (first best topology in the literature from the number of switches point of view) and standard six-switch inverter with sine pulsewidth modulation. The proposed inverter is capable of operating with a wide range of output voltages from zero to the full value of the dc input voltage by appropriately altering the instantaneous duty cycle. A three-phase universal inverter with only three power switch has been proposed in this paper for the first time ever, to our knowledge. For the purpose of providing a good compromise between fast transient response and stability, a model predictive controller is proposed. All the design expressions have been derived. A comparison with other dc–ac converters is given to show the merits of the proposed converter. Finally, satisfactory circuit operation is confirmed by experimental results from a laboratory prototype. [ABSTRACT FROM AUTHOR]

In a sensorless vector control method, at low speeds and self-commissioning for AC motors, it is necessary to model dead time, rise/fall time, parasitic capacitors, and semiconductors’ voltage drop accurately. In this paper, voltage drop in each phase due to the nonlinear behavior of the inverter from the control system's viewpoint is precisely modeled by using two lookup tables. These lookup tables make the proposed model robust against the dc-link voltage and carrier frequency variations in the entire current range. In conventional methods at standstill, the measured voltage in the dc current test contains the nonlinearity of two phases. Therefore, to obtain the nonlinear voltage of each inverter phase, it is assumed that the values of inverter nonlinearity voltage at both high current and low current are equal. This simplification leads to distortion in measured voltage in the low currents. However, in this paper, the voltage drop equation of each phase is solved by numerical method that is realizable in conventional processors. The results obtained in actual voltage measurement show the superiority of the proposed method over traditional methods in the low currents. The proposed method is verified by using a voltage source inverter feeding a 2.2-kW three-phase induction motor. [ABSTRACT FROM AUTHOR]

This paper presents a new topology based on a modified class-E resonant inverter used as an LED series current regulator. The proposed topology behaves as a controllable nondissipative impedance that adjusts the current flowing through the lamp. In this circuit, the LED is placed at the dc side of the class-E inverter, in series with the input filter inductance. The power handled by the ac side is sent back to the input by means of two diodes. Despite the addition of these two diodes, the converter maintains all the advantages of the class-E inverter: low component count, simple control, and extremely low switching losses. The LED current can be controlled with a small variation of the operating frequency. This way, the low-frequency current ripple of the lamp can be strongly reduced even when there is a considerably high input voltage excursion, such as the one expected in electrolyticless high-power-factor LED ballast. This paper proposes a simplified methodology based on the fundamental approach aiming to design and build a laboratory prototype. The prototype is designed in order to minimize the effect of LED voltage in the output current. This way, the input voltage ripple can be canceled using a simple feedforward control. [ABSTRACT FROM AUTHOR]

This paper proposes a split-capacitor four-wire current source inverter, which is the dual of the split-capacitor four-wire voltage source inverter. Since the midpoint of the dc link is tied to the neutral point of ac filter capacitors, the common-mode voltage (CMV) is reduced significantly. Consequently, the leakage current issue is effectively addressed. The proposed circuit is cost-effective as no extra switch is added. This paper, first, establishes the equivalent common-mode circuit of the proposed inverter. The impact of the neutral line inductance on CMV is also analyzed. Then, a specific modulation is introduced to balance the dc-link voltages/currents. To achieve good input/output performance, a nonlinear control method is developed based on time-domain models. Finally, all the proposed methods and related theoretical analysis are verified by simulations and experimental results. [ABSTRACT FROM AUTHOR]

This paper introduces a new bidirectional single-phase inverter topology. The proposed topology has three ports: a dc port, an ac port, and a ripple port. The ac and dc ports are bidirectional to support rectifier or inverter operation. A small inductor, which is of alternating current, exchanges power between different ports of the single-phase system. The proposed topology is capable of accomplishing voltage step-up or step-down, suppressing the ripple power, and performing inversion or rectification operation in one stage of power conversion. The proposed configuration offers an active decoupling function, which not only eliminates the double-frequency ripple power at the dc port but also achieves minimum capacitance requirements to minimize the size of the decoupling capacitor. This facilitates the use of a very small thin-film capacitor, which offers a much longer life-cycle and higher reliability compared with a bulky electrolytic capacitor. A control approach is also developed to regulate the dc-port and ac-port currents and manage the ripple power through proper distribution of power between each port. Moreover, a very small capacitor can be placed in parallel with the inductor to reinforce the proposed configuration with soft-switching operation, which enhances the overall efficiency and minimizes the voltage stress over the semiconductor devices. This converter is capable of accommodating an arbitrary number of dc or single-phase ac sources and/or loads configuring a multiple-input multiple-output inverter without introducing any additional passive elements or sacrificing the performance of the inverter. The primary focus of this paper is dc-to-ac conversion mode of operation, in spite of the fact that it can easily be configured to serve as a rectifier. Experimental and simulation results are presented to validate the operation of the proposed topology and its control strategy. [ABSTRACT FROM AUTHOR]

This paper presents theoretical and experimental discussions on low-voltage-ride-through operation of a modular multilevel single-delta bridge-cell (SDBC) inverter intended for utility-scale photovoltaic (PV) systems. Modern grid codes require grid-tied inverters to provide dynamic grid support during grid-fault events by injecting reactive current. This paper discusses decoupled positive- and negative-sequence reactive-current control, focusing on asymmetric voltage sags with imbalanced magnitude and phase relationships. The main objective is to present a feedforward control method based on calculation of the zero-sequence current required for achieving power balance during normal and grid-fault conditions. Moreover, this paper demonstrates a practical method that minimizes overcurrent stress in the three inverter clusters by adjusting active power drawn from PV arrays. Experimental results on a three-phase 12.6-kVA system prove that the SDBC inverter is capable of seamlessly operating through asymmetric voltage sags. [ABSTRACT FROM AUTHOR]

This paper proposes generation of a 15-level (14 concentric) dodecagonal voltage space vector structure (DVSVS) for a star connected induction motor drive. The proposed multilevel DVSVS is obtained by cascading two inverters, namely a primary and secondary inverter. The primary inverter is a five-level (5L) structure formed by stacking two three-level flying capacitors with individual reduced dc sources and the secondary inverter is also a 5L structure formed by cascading two capacitor-fed cascaded H-bridges (CHB). The active power is supplied by the primary inverter, while the secondary inverter acts as switched capacitor harmonics filter, and capacitors in the secondary inverter are balanced naturally irrespective of load power factor for entire modulation index. The high-voltage dc supply fed primary inverter is operated in quasi-square wave mode, while the high frequency switching is applied to low voltage CHBs, thus, reducing the overall switching loss. The proposed scheme gives the advantages of both DVSVS and multilevel structure, thus, making it one of the solutions for battery or stacked dc-fed applications. The paper also presents the experimental results as well as comparison study with the existing topologies to support the advantages of proposed scheme. [ABSTRACT FROM AUTHOR]

This paper presents a generalized power-decoupling control scheme using a multiport isolated bidirectional converter for a multilevel inverter, which has multiple dc links inside. In the proposed method, a single power-decoupling capacitor is needed for all the dc links in the multilevel inverter cell. First, a prototype of the power-decoupling concept of individual H-bridge cells in the multilevel inverter is proposed, using a separate power-decoupling circuit. Then, a more advanced one-step power-decoupling method is proposed. The lifetime and reliability of the multilevel inverter is improved as film capacitors replace the large capacitance electrolyte capacitors. A multi-input ports/single output voltage-fed dual half-bridge converter (MDHB) is used for the power-decoupling circuit. A steady-state analysis for the peak and root mean square of the MDHB current is carried out for the loss breakdown. The currents are functions of the switching frequency, phase shift, leakage inductance, turn ratio, and output voltage, which make the multiport transformer design complex. A design methodology is proposed, which takes into account the design of the copper and core losses as functions of the switching frequency and number of turns. Furthermore, a special winding method for the input port is illustrated to obtain identical leakage inductances for the uniform current distribution in the multiport transformer. The proposed MDHB employs a current-sensorless power-decoupling control that contributes to the spontaneous ripple rejection of all the dc links without individual link current information, as well as to the cost and size reduction. Hence, the ripple-rejection controller is independent of the control configuration of the multilevel inverter, and also available for universal applications of various inverter topologies. Since the primary-input ports of MDHB share a single magnetic core for interfacing the ripple power to the unified secondary ripple capacitor, the controller design becomes difficult in considering the dynamic interaction among the ports, along with the average-voltage control loop design. In this paper, the dynamic analysis and controller design procedure of the circuit is also presented. The power decoupling is achieved even when the ripple frequency is other than the double frequency of the inverter output, since the single-pole transfer function of the small-signal model of the MDHB allows sufficient phase margin, along with high bandwidth. The proposed power-decoupling method for the multilevel inverter is validated with the help of simulation and 1.2-kW hardware prototype experimental results. [ABSTRACT FROM AUTHOR]

This paper proposes a new single-phase single-stage switched-boost inverter with four switches. Like the quasi-Z-source inverter and quasi-switched boost inverter (qSBI), the proposed inverter has the main features as continuous input current, buck/boost voltage with single-stage conversion, and shoot-through immunity. Compared to the qSBI, the proposed inverter uses one more capacitor and one less switch. This paper presents the operating principles, pulse-width modulation control strategy, parameter design guidelines, and simulation results for the proposed inverter. To verify the performance of the proposed inverter, an 800-W prototype was built with an 110 V/50 Hz output voltage in stand-alone and grid-connected modes. The simulation and experimental results matched those of the theoretical analysis. [ABSTRACT FROM AUTHOR]