Search

Modular multilevel converter based high voltage direct current (MMC-HVDC) transmission is the prospective technology for large-scale wind farms integration. In this paper, a comprehensive coordinated control strategy for DC fault ride-through (FRT) of wind farms connected to the grid through bipolar MMC-HVDC transmission is proposed. To reduce the requirement of breaking speed and capacity of DC breakers, an active current-limiting control method is proposed to limit the rise rate of DC fault current, and the principle of parameter selection is designed. After DC breakers isolate fault, the control mode switching methods of bipolar MMC are designed to make the fault pole MMC operate as a STATCOM to support the AC grid and improve the active power transmission capability of the healthy pole MMC, which can reduce the impact range of unbalanced power between wind farms and converter station. In addition, a coordinated control strategy for wind farms load-shedding considering speed constraints is designed to realize the optimal distribution of load-shedding power among wind turbines, which can regulate unbalanced power together with the healthy pole MMC to realize DC FRT. Finally, the effectiveness and feasibility of the proposed control methods are verified by simulation results. [ABSTRACT FROM AUTHOR]

The emerging voltage source converters (VSCs) such as hybrid cascaded multilevel converters (HCMCs) are promising converter technologies which enable higher converter efficiency, compactness, and DC fault resilience for high voltage direct current (HVDC) transmission. However, the large number of switching events due to the converters’ submodules introduces a heavy computational burden for electromagnetic transient (EMT) simulations. Efficient and accurate EMT-type converter models play a vital role in the control and design of HVDC converters. Several computationally efficient models for the HCMCs are proposed in this paper, including the detailed equivalent model (DEM) and several average value models (AVMs) of varying accuracy. Additionally, a combined model is proposed which allows the users to switch among the DEM and AVMs during dynamic simulations. The proposed models are validated against the DEM for dynamic transients. The simulation results demonstrate good modeling accuracy of the proposed models. The AVMs are also shown to significantly improve simulation efficiency compared to the DEM, which is very desirable especially for HCMCs with a large number of submodules. [ABSTRACT FROM AUTHOR]

This paper analyzes the combination in a cascaded H-bridge multilevel inverter (CHBI) based on transformers with the different turn ratios for increasing the voltage level and proposes the switching method for achieving the output voltage distribution among H-bridge cells (HBCs). The transformers used in this paper are connected to the output of the respective HBCs, and the secondary sides of all the transformers are connected in series for generating the final output voltage. Only one of the transformers, in particular, has a different turn ratio for increasing the output voltage level. In this paper, the possible turn ratio of the special transformer with a different turn ratio is discussed in detail, and a switching method based on the level-shifted switching method for the topology used in this paper is proposed. To verify the effectiveness of the proposed method, a three-phase 21-level CHBI is experimentally tested. [ABSTRACT FROM PUBLISHER]

The dual-loop control strategy in a hybrid reference frame (HRF) for single-phase voltage-source inverters in islanded operation mode is studied, which applies a capacitor voltage shaping loop in the synchronous reference frame (SRF) and a capacitor current shaping loop in the stationary reference frame (HRF-based v+ ic control strategy). This strategy is able to achieve the purpose of active damping, fast dynamic response, and zero reference tracking error. However, due to the inherent characteristics of SRF-based voltage loop and the digital control delay, the performance of the system is degraded and the control parameter design of the HRF-based v+ ic control strategy shows great difficulties. To overcome these shortcomings, in this paper, a systematic parameter design guideline for the HRF-based v+ ic control strategy is proposed to ensure the system stability and optimize the performance of the system under control delay condition. The mathematic model of the HRF-based v+ ic control strategy is established with the consideration of control delay in this paper. Based on this model, a satisfactory region of the system stability indexes can be obtained by stability specifications of the system, and the optimal control parameters can be calculated according to the stability indexes selected from the satisfactory region. By using this method, the system stability and robustness can be guaranteed. Finally, the experimental results are presented to validate the effectiveness of the presented optimal control parameter design methodologies. [ABSTRACT FROM AUTHOR]

Cascaded H-bridge (CHB) converter technology is actually the most popular solution for grid-connected converters in both medium- and high-voltage applications. This paper introduces a new control of a single-phase CHB active rectifier. The control uses a direct grid current control based on adaptive resonant controllers. The resonant controllers are adapting to slow fluctuation of ac grid frequency. The challenging problem of CHB converters is dc-link capacitor voltage balancing especially under unbalanced load conditions. This paper presents a reliable voltage-balancing technique utilizing energy estimation of particular dc-link capacitor banks and simple prediction of the changes of their energies. A nonlinear behavior of the converter caused by power semiconductors voltage drops and dead-time effects is minimized by auxiliary adaptive resonant controllers. The resulting control has very good performance, including the operation under unbalanced load conditions, and achieves low total harmonic distortion of converter grid current. The theoretical results were verified by experiments made on the developed CHB active rectifier prototype with three power cells in cascade. [ABSTRACT FROM AUTHOR]

This paper provides an experimental and theoretical discussion on dynamic braking for a medium-voltage induction motor fed by a modular multilevel double-star chopper-cell (DSCC) inverter. It is intended to apply the motor drive to large-capacity fans and compressors with a large moment of inertia. Each chopper cell consists of a bidirectional chopper and a braking chopper connecting a single small-rated braking resistor in series with a single IGBT. This configuration results in a “distributed” dynamic brake that provides a distinctive welcomed side effect of protecting all the bidirectional-chopper cells against sudden overvoltage. An experimental system rated at 400 V and 15 kW is designed, constructed, and tested to verify operating performance of the distributed dynamic brake. Experimental waveforms, along with simulated waveforms, confirm firmly that the distributed dynamic brake is feasible and effective in an induction motor fed by a medium-voltage high-power DSCC inverter for fans and compressors. Finally, this paper gives a design example of a distributed dynamic-braking resistor for the 11-kV, 12-MW induction motor driving a large-capacity fan equipped with a large moment of inertia. [ABSTRACT FROM AUTHOR]

This paper proposes a single-phase power factor correction (PFC) rectifier to achieve high power factor, wide output voltage range, and ripple power decoupling without using electrolytic capacitors. It consists of two parts: PFC circuit and output voltage regulation circuit. The load side is involved in both parts, which is different from the regular two-stage conversion structure. The proposed rectifier can be directly applied to low voltage cases due to the wide output voltage range. And the decoupling capacitor voltage can be smaller than the peak grid voltage, which reduces the voltage stress. Besides, the low-frequency ripple power buffer is implemented without a dedicated power-buffering controller. This paper first introduces the circuit structure, operation principles, and control method. Then, the system design consideration is given. Finally, the effectiveness of the proposed topology is verified by the simulations and experimental results. [ABSTRACT FROM AUTHOR]

An analytical steady-state model of the modular multilevel converter (MMC) can be used for component sizing and assessment of the impact of different parameters on the MMC performance. Thus, this paper proposes an enhanced steady-state model for the MMC, which enables one to calculate the amplitudes of the harmonic components of MMC arm currents, submodule capacitor voltages, and arm voltages. In addition, the proposed model allows for the calculation of the amplitude and phase angle of the modulating signal, and it also presents a criterion for resonance of the arm currents. This is achieved by means of a polynomial function of the modulation index, and through checking the stability criteria established by the proposed model. The capability of formulating the modulating signal enables a more accurate calculation of the steady-state amplitudes of the variables, as compared to the previously published models. This paper also presents an accurate method of submodule capacitor sizing, based on the proposed steady-state model. The proposed method gives the exact value of the submodule capacitance (i.e., the capacitance that results in dc voltage fluctuations within a desired range) for a prespecified submodule capacitor voltage variation and a given circulating current amplitude. The stability criterion given by the proposed steady-state model, used for sizing the arm inductance, and the submodule capacitor voltage variation given by the proposed capacitor sizing method, used for sizing the submodule capacitor, allows for the determining of the operating limits of the MMC in terms of its parameters. Extensive simulation results are presented to demonstrate the efficacy of the proposed steady-state model and the capacitor sizing method. Further, the results obtained from the proposed capacitor sizing method are compared with experimental results from the literature. [ABSTRACT FROM AUTHOR]

In this paper, a single-phase shared leg converter is proposed along with two generalizations. The basic configuration has three two-level insulated gate bipolar transistor (IGBT) legs and is cascaded on the main power system by means of two injection transformers, such that one of these legs is shared between the transformers. The generalizations are expanded cases in which the converter has N\text{leg} legs. The first generalization is the cascaded shared leg (CSL), where the converter is cascaded by N\text{leg}-1 transformers, and one of the N\text{leg} legs is shared between all transformers. The second is the modular CSL, where Nmod modules, each one similar to the basic configuration, are cascaded by 2Nmod transformers. The conventional configurations considered for general comparisons are the cascaded h-bridge (CHB) and the cascaded half-bridge (CHfB). In this paper, we show that proposed configurations provide multilevel ac voltages with greater levels-per-switch ratio compared to the CHB. We also show that proposed CSL generalization has practically the same levels-per-switch than conventional CHfB and saves one transformer. Simulations and experimental results are shown to demonstrate proposed configurations performance and feasibility. [ABSTRACT FROM AUTHOR]

This paper presents a single-stage nonisolated switched capacitor ac–dc converter for power-factor correction (PFC). This converter features reduced passive components, single switch, transformerless high voltage gain, and improves the power factor, reduces total harmonic distortion, and voltage stress across the switch. The peak current mode with a dynamic resonant perturbation scheme compensates the subharmonics that exist at zero crossing of the source current is implemented for PFC. In this paper, the principle of operation, large signal modeling of the circuit, and control method for the proposed PFC converter are provided. [ABSTRACT FROM PUBLISHER]

To improve light load efficiency, a three-phase photovoltaic (PV)-based microinverter may operate in single-phase, two-phase or three-phase mode depending on the available input power. Therefore, its dc-link capacitor may be subjected to large peak-to-peak voltage ripple when operating in phase skipping mode. This paper determines the minimum value of the dc-link capacitor by allowing the maximum acceptable voltage ripple on the dc link. This allows for the use of film capacitors instead of electrolytic capacitors in order to improve the microinverter reliability. Unfortunately, higher dc-link voltage ripple introduces harmonic distortion on the inverter output current waveform if it is not compensated for by the dc-link voltage controller. This paper proposes a simple synchronous control method to regulate the dc-link voltage with the presence of large voltage ripple. The dc-link voltage controller is synchronized with the phase-locked loop and samples the average value of dc-link voltage without introducing unwanted harmonics into the voltage sense path. Experimental results were obtained from a 300-W three-phase half-bridge microinverter prototype to verify the proposed dc-link voltage control performance. Inverter output current total harmonic distortion of 1.6% was achieved even though the dc-link peak-to-peak voltage ripple reached as high as 87 V with 219-V split dc-link voltage. Dynamic response is fast enough to easily track the most extreme ramp change in input PV power. [ABSTRACT FROM PUBLISHER]

A switched-capacitor-based dual-switch dc–dc converter with a high-boost voltage gain is proposed in this paper. The proposed converter can obtain a high-voltage gain with a small duty cycle, which decreases the voltage stress and the conduction loss on the power switches. This paper presents the key waveforms, the operating principles at the continuous conduction mode and the discontinuous conduction mode, and the parameter design. Moreover, a comparison between the proposed converter and other nonisolated converters has been completed. To verify the operating principle, a 200 W prototype is constructed with an input voltage of 25–50 V and an output voltage of 200 V. The simulation and experimental results are shown. [ABSTRACT FROM PUBLISHER]

This paper proposes a DC/DC current flow controller (CFC) for meshed high voltage direct current (HVDC) grids. The CFC has the advantage of a simplified structure that allows us to use the minimum number of switches when unidirectional current flows through the DC lines are expected. An extended CFC topology that is able to operate with all possible current flows is also presented. Then, the operating principle of the CFC is discussed and its structure is compared with a dual H-bridge analyzing advantages and disadvantages. This paper also details the applied modulation strategy and the control methodology. Finally, a five-terminal meshed HVDC grid is used to validate the CFC by means of simulations. [ABSTRACT FROM PUBLISHER]

This paper discusses the impact of small dc capacitance in a motor drive using a floating capacitor H-bridge topology. The proposed topology is intended for applications where variable frequency control is not required. Special attention is paid on investigating the second-order dc capacitor voltage ripples, whose influence on the induction motor as well as on the motor drive itself is of importance. This issue is addressed in this paper through rigorous mathematical formulations. It is found that by inverting the second-order dc ripple voltage using the conventional SVPWM, no harmful harmonics will be generated in the motor line voltage. This demonstrates the possibility of drastically reducing the dc capacitance of the proposed system. Induction motor as well as H-bridge performance with respect to different dc capacitance values is demonstrated by experiments, which lays the foundation for cost reduction and reliability enhancement of the proposed system. [ABSTRACT FROM PUBLISHER]

Hysteretic control provides unique advantages in dc–dc converter applications but it is less popular than other types of control because the switching frequency depends on the operating point, the feedback ripple, and the component parasitics. Furthermore, it is difficult to predict the frequency due to the complex interaction of those factors. This paper proposes harmonic balance analysis to systematically determine the switching frequency of the buck and boost-like converters with hysteretic current control, and extends the method to buck converters with hysteretic voltage control. The analysis includes the most important second-order effects (feedback ripple, component parasitics, a second output capacitor, and switching delays). For the less complex cases the switching frequency is expressed in closed form, and for the more complex cases the paper proposes a graphical solution. The predictions are verified by simulations and, for the buck converter with hysteretic current control, by experiments. The derived results are useful for designing a converter with predictable switching frequency, and can also be employed during the design process of a converter with synchronized or stabilized frequency. Given an arbitrary control scheme or circuit variation, the switching frequency can be readily obtained by following the proposed approach. [ABSTRACT FROM PUBLISHER]

Sheppard–Taylor power factor correction (ST-PFC) rectifier could obtain a high power factor due to its capability of overcoming the control detuning issue. However, it needs a bulky electrolytic capacitor at the load side to buffer the double-frequency ripple power (DFRP), which reduces the reliability and power density significantly. This paper proposes a control method to divert the DFRP to the small energy transfer capacitor. Consequently, the bulky electrolytic capacitor is replaced with a small film capacitor. The proposed method is carried out by introducing the freewheel state (one switch is turned on and the other is turned off) into the control. So no extra hardware is added, which makes the proposed method cost-effective. A low electromagnetic interference emission is also achieved due to the continuous input–output currents. In addition, the proposed method can be extended to other topologies easily. This paper first gives the detailed analysis of the proposed control method, and then introduces the controller design. The selection of the passive components is also briefly discussed. Finally, the simulation and experimental results verify the effectiveness of the proposed control method. [ABSTRACT FROM AUTHOR]

These days, constant on-time current mode (COTCM) control scheme is widely used in the voltage regulator (VR) controllers because it has a higher light-load efficiency and a higher BW design capability while maintaining a simpler compensation requirement. One issue plaguing the COTCM control is its slow transient response which is caused by its fixed TON operation. During the heavy-load step-up transient, the duty cycle becomes saturated and the inductor current increment becomes limited by TON and the minimum off time (TOFF$\_$ MIN) ratio, which can create a large undershoot at load step up. On the other hand, in the load step-down case, if the load step down occurs at the beginning of TON, a large overshoot can be created at the output. To solve this issue, this paper presents a method designed to increase the TON at load step up and then very quickly, decrease at load step down in order to reduce the undershoot and overshoot at output or otherwise save the output capacitor. In this proposed method, the increase or decrease of T ON is proportional to the output change which eliminates the chance of any overcorrection or ring-back problem unlike the methods presented in prior forums. This feature enables the control to work seamlessly in a high-frequency load repetitive case in VR applications. Since this TON change occurs only in the transient period when duty cycle is saturated, it does not affect the small-signal property of the COT control. Moreover, the proposed methods are very much compatible with the state-of-the-art single and multiphase COT control structures. Simulation and test results in both single and multiphase operations are also presented in the paper to verify the proposed concept. [ABSTRACT FROM PUBLISHER]

A novel soft-switching interleaved coupled-inductor boost converter is proposed in this paper. Only a single active soft-switching module is needed to simultaneously achieve the soft-switching property of the two switches in the interleaved coupled-inductor boost converter. The better efficiency is achieved with the less components and cost. The two main switches can achieve the ZVT turn-on and smaller-current turn-off simultaneously when the single active soft-switching module is active. Due to the coupling characteristic of the inductors, the voltages across the two inductors are changed at the same time; therefore, the equivalent circuit is equal to the parasitic capacitors of the two main switches in parallel to resonate with the auxiliary inductor. By coupling two input inductors, the volume and cost of the circuit can be reduced. The interleaved coupled-inductor topology can also reduce the input and output current ripples and share the input and output currents. The operating modes, analysis, and design of the proposed circuit have been discussed in this paper. Simulation and experiments are finally conducted to verify the validity of the proposed circuit. [ABSTRACT FROM PUBLISHER]

The modular multilevel converter (MMC) has become a very attractive solution for interfacing high voltages in hybrid networks. The MMC enables scalability to different power levels, full controllability provided by insulated-gate bipolar transistors, and can achieve very high efficiencies by using a low-switching-frequency method as the nearest level modulation. However, the nearest level modulation requires a capacitor voltage-balancing algorithm, which can result in unbalanced loading for the power semiconductors in the different submodules. Particularly at low-power-factor operation, which could occur in the case of low-voltage ride through and of reactive power injection, the conventional algorithm is no more effective. This paper provides thermal stress analysis of the MMC in operation and proposes a thermal balancing approach, which is embedded in the capacitor voltage-balancing algorithm. The purpose of the thermal balancing is to achieve similar stress distribution among the different submodules to enhance the lifetime. The junction temperatures in the different submodules are studied for HVDC applications, and this paper proves experimentally that the thermal balance within the submodules is significantly improved. [ABSTRACT FROM PUBLISHER]

DC electric springs (DCES) are emerging technologies for the (i) regulation of mains voltage against the intermittent renewable generations and (ii) harmonic cancellation in dc microgrids. When conventional converter topologies (e.g., half-bridge or full-bridge converter) are adopted as DCES, the battery storage of the DCES has to process both the dc power and the ac harmonic power. The pulsating ac power can severely reduce the lifetime of the battery. To address this issue, a hybrid-DCES (H-DCES) is proposed in this paper to perform (i) and (ii) in a decoupled manner. With a modified topology and control method, the H-DCES can divert the ac current to the ground and retains the function of manipulating noncritical load for dc voltage regulation. The immediate benefits of this H-DCES are the reduction of storage capacity and a prolonged lifetime of the battery. Both the operating principle and the mathematical model of the proposed H-DCES are analyzed in this paper. A prototype of the H-DCES is practically tested in a 48-V dc grid. The experimental results show that the H-DCES can realize the decoupled operation of dc voltage regulation and harmonic cancellation. Simulation studies further demonstrate that the H-DCES requires less storage capacity than its counterparts. [ABSTRACT FROM AUTHOR]

Cascaded H-bridge (CHB) based active power filters (APF) can compensate high-order harmonics in medium and high-voltage systems with relatively low switching frequency. This paper reveals that a severe dc capacitor energy unbalance can be induced by harmonic energy exchange if the frequency of APF output current coincides with the switching harmonic frequency of CHB cells. The mechanism of harmonic energy exchange is analyzed, and it is found that the dc capacitor energy unbalance is essentially affected by the carrier frequency of CHB. A noninteger ratio carrier frequency can be adopted to avoid the divergence of dc voltage, but there is still a significant low-frequency ripple on the dc voltage. This paper proposes an adaptive carrier frequency optimization method. By predicting the dc voltage ripple amplitude under different carrier frequencies, this method can adaptively select the optimal carrier frequency to minimize the dc voltage ripple. The proposed method is also proved to be robust against system parameter variations, and it can be implemented by a practical and simple linear computation method. Results obtained from simulation, experimental prototype, and field test are finally presented to verify the proposed adaptive carrier frequency optimization method. [ABSTRACT FROM AUTHOR]

This paper documents a new three-switch, isolated boost dc–dc converter. The major features of the proposed converter are as follows: 1) continuous input current; 2) reduced one active switch, one additional diode, and one additional capacitor; 3) unchanged primary and secondary voltage waveforms of the transformer when the duty cycle is changed; and 4) removal of the snubber circuit. This paper presents the operating principles, analysis, parameter design guidelines, and simulation results for the proposed converter. To verify the performance of the proposed converter, a 400 W prototype was constructed with a 40–60 V dc input. A PID controller was used to maintain the dc output voltage at 400 V. The simulation and experimental results matched those of the theoretical analysis. [ABSTRACT FROM AUTHOR]

In this paper, direct torque control (DTC) of five-phase induction motor (FPIM) is implemented using three-level neutral point clamped (TL-NPC) inverter. One of the advantages of three-level inverter over two-level one for DTC operation is the low torque ripple. Also TL-NPC inverter through space vector modulation technique gives low $ dv/dt$ transition with better voltage waveform. By applying conventional lookup table for DTC, the TL-NPC inverter does not ensures lower $dv/dt$ transition. In this paper, a novel switching scheme for DTC of FPIM using TL-NPC inverter is proposed that ensures the low $ dv/dt$ transition and balancing of dc-link capacitor voltages of TL-NPC inverter. To form the lookup table for DTC operation, instead of using voltage vectors directly, virtual vectors (VVs) are utilized. Two switching states are used in one sample time to generate a VV in $\alpha \beta$ plane, which gives zero resultant voltage in $ xy$ plane. The switching strategy ensures low number of transitions to reduce the switching losses. The switching state redundancies are used in a novel way to balance the dc-link capacitor voltages without using any additional hardware. The proposed technique to balance the dc-link capacitor voltage gives lower switching frequency. The MATLAB/Simulink environment is used for the simulation and the results are validated through experiments. [ABSTRACT FROM AUTHOR]

This paper presents three unidirectional step-up ac–dc converter topologies with voltage multiplication on their outputs. The first topology is the hybrid boost rectifier and the other two are novel bridgeless structures, all based on the integration of boost rectifier and the ladder switched-capacitor (SC) cell. The new hybrid structures provide high voltage gain with low voltage stress across the switches, high-power factor, and output voltage regulation. This paper presents the principle of operation, steady-state and dynamic analysis, design methodology, and experimental verification. A different approach is also presented for the design methodology of the SC cell and for the analysis of its influence on the dynamic model. Three 1000-W prototypes with a 220-V input voltage, 800-V output voltage, and 100-kHz switching frequency were designed to corroborate the theoretical study. The best efficiency was 97.1$\%$ in the proposed bridgeless versions and the voltage stress across the switches stands around 400 V. Furthermore, a comparison between the proposed structures and previous topologies is also presented. [ABSTRACT FROM PUBLISHER]

This paper presents a method for small-signal dynamic studies of power systems including utility-scale PV energy systems considering the effects of dc-side components. Existing methods commonly model a PV energy system as a dc source connected to a grid-tied inverter. This paper shows that the dc components of a PV energy system can also contribute in the dynamics of the power system in the range of small-signal studies. The paper first develops the model of a PV energy system by merging the submodels of dc- and ac-side components. Then, a method to obtain the augmented model of the power system including a PV energy system will be explained using a study system. The study system consists of a PV energy system in parallel with a synchronous generator connected to a grid. Then, based on eigenvalue analysis, verified by time-domain simulations, it is shown that the dc-link capacitor, front-end converter, and its controller can introduce oscillatory modes in subsynchronous range of frequencies. Furthermore, it is shown that the damping of the sensitive modes can significantly vary with respect to the parameters of the dc-side components. [ABSTRACT FROM PUBLISHER]

In high-power applications, parallel operation is required to improve both efficiency and reliability. In an LLC converter, it is difficult to achieve parallel operation due to the gain sensitivity to component tolerance. This paper proposes a new structure of a common resonant capacitor for a multiphase LLC converter, which can achieve very good current-sharing performance with no additional components or control. To evaluate the current-sharing performance, a new first harmonic approximation (FHA) model is built in this paper to analyze the LLC converter with coupled resonant tanks. Both FHA analysis and powersim (PSIM) simulation results demonstrate the load-sharing improvement of the proposed common capacitor LLC resonant converter over the conventional two-phase LLC converter. The current-sharing performance from the FHA analysis and the PSIM simulation are compared, and the error of the FHA analysis is evaluated and explained. A 600 W two-phase LLC converter prototype based on the proposed method is also built to verify the feasibility. Excellent current-sharing performance (6% resonant current sharing error at a wide load range) has been achieved. [ABSTRACT FROM PUBLISHER]

This paper presents a hybrid seven-level converter based on T-type converter and H-bridge cascaded suitable for low-voltage and high-power-density applications. The operation principles and conduction paths are analyzed comprehensively. Voltage balance control of the floating capacitors is the key point of this paper. Mathematical expressions of capacitor voltage balance conditions are deduced based on sinusoidal pulse width modulation (SPWM). The results show that floating capacitor voltages are only balanced when the modulation index is below 0.82 under SPWM. In order to enlarge the modulation index ensuring the capacitor voltage balance, space vector modulation (SVM) is also applied to regulate floating capacitor voltages taking advantage of redundant switching vectors. Meanwhile, in SVM, there are no additional control requirements for the capacitor voltage. Taken both SPWM and SVM into consideration, the limit to the range of operation for this seven-level converter is presented, which is a function of the modulation index and the power factor. The merit of dc voltage utilization improvement in this topology is also analyzed based on simulation results. Simulations and experimental results under different modulation index and RL load are presented to verify the modulation strategies illustrated in this paper. [ABSTRACT FROM PUBLISHER]

This paper focuses on the operation of a grid-connected modular multilevel converter (MMC) supplying a pulsed dc load. The goal is to achieve minimum ac power fluctuation despite the high power fluctuation present on the dc side. The MMC has been selected for its inherent ability to decouple ac and dc current controllers. However, if no additional provisions are taken, the pulsed load causes imbalance of cell capacitor voltages between upper and lower arms in each phase. This paper presents the theoretical analysis of the imbalance problem and proposes a simple arm-balancing controller to enable the operation of the converter under pulsed dc load. The effectiveness of the controller has been successfully verified on a 7 kW MMC experimental prototype with a 3 kA pulsed dc load. [ABSTRACT FROM AUTHOR]

This paper introduces a new tunable piezoelectric transformer (TPT) and demonstrates its operation in a dc–dc converter application. Piezoelectric transformers (PTs) have been conventionally used in high-voltage, low-power applications such as electronic ballasts. Recently, radial type PTs have been developed for higher power ac–dc and dc–dc step down applications. Based on the latter, a new TPT has been developed featuring an auxiliary secondary terminal to control the voltage gain of the transformer. This results in some exciting characteristics from a dc–dc converter standpoint, like an adjustable frequency response of the TPT, and fixed frequency control of the converter with no-cross talk between the primary and secondary in the control circuit. This paper introduces the design concept behind TPT-based dc–dc converters, and proposes a control scheme for their implementation. Experimental results with a 30 W, 220:55 V converter unit are shown to validate these concepts. [ABSTRACT FROM PUBLISHER]

An extended-duty-ratio (EDR) boost converter is studied extensively in this paper for high voltage gain applications with a wide input (and/or output) voltage range. The EDR is a unique combination of an interleaved, multiphase boost converter and switched capacitor configuration that achieves high voltage gain with significantly lower switch voltage stress and switching losses compared to conventional high-gain solutions. Most of the switches in the multiphase EDR experience only a fixed fraction of the output voltage ($1/M, 2/M$ , etc., where $M$ is the number of phases). Through extensive analysis over a wide operating range, it is shown here that the EDR boost converter has inherent current sharing among the phases only in a limited range of duty ratio— $(M-1)/M \leq D \leq 1$. As the duty ratio reduces beyond this range as required in wide input voltage applications, inherent current sharing property is lost. In this paper, techniques to ensure current sharing under all operating zones without requiring current sensors are presented. Instead of having equal duty ratio for each phase, it is adjusted for each phase according to the operating region of the converter. Extensive analysis is presented to derive the required duty ratio changes for the different phases. The proposed concept is validated with experimental results from a 250 W, 3-phase EDR boost, and GaN-based hardware prototype. [ABSTRACT FROM AUTHOR]

Conventional single-phase power-factor-correction (PFC) rectifiers with active power decoupling capability typically require more than three active switches in their circuits. By exploring the concept of power-buffer cell, a new single-stage PFC rectifier with two active switches, one inductor and one small power-buffering capacitor is reported in this paper. The proposed converter can achieve high-power factor, wide output voltage range, and power decoupling function without using electrolytic capacitor. Additionally, an automatic power decoupling control scheme that is simple and easy to implement is proposed in this paper. The operating principle, control method, and design considerations of the proposed rectifier are also provided. A 100-W prototype with ac input voltage of 110 Vrms and a regulated dc output voltage ranging from 30 to 100 V has been successfully designed and practically tested. The experimental results show that with only a 15 μF power-buffering film capacitor, the proposed converter can achieve an input power factor of over 0.98, peak efficiency of 93.9%, and output voltage ripple of less than 3%, at 100-W output power. [ABSTRACT FROM PUBLISHER]

In this paper, a novel current fed hybrid dual active bridge dc–dc converter is proposed, which is suitable for a low-voltage fuel cell power conditioning system. The high-frequency input current ripple can be reduced to minimum because the input side switches are always switched at 50% duty cycles in spite of the fuel cell voltage and the load variation. Notch filter is used in the voltage feedback path to reduce the low-frequency input current ripple when interfaced with a single-phase inverter load. All of the power devices can achieve zero voltage switching by the proposed control strategy. The mode analysis, the operation principle, zero-voltage switching (ZVS) conditions, and parameter design are given in this paper. A 1 kW prototype has been fabricated to verify the effectiveness of the proposed converter and control strategy. [ABSTRACT FROM PUBLISHER]

DC/DC converters connected in series or parallel allow low power devices to be used in high power conversions. The input series output series (ISOS) connection is suitable for situations where both the input and output sides are high voltage fields. To ensure that each module shares voltage with the other, this paper proposes an active output voltage sharing (AOVS) control scheme. The scheme introduces sharing control in the output side so that the isolation is not needed between the input and output sides in the control loop. The AOVS control scheme, consisting of a common output voltage loop and individual output voltage sharing loop, has a master–slave structure. To improve the reliability and realize a hot-plug, this paper also provides an automatic master–slave form of the AVOS control scheme. A simulation of the frequency and time domains is used to verify the accuracy of the small signal model, and an ISOS-connected prototype consisting of three forward converters is made to test the steady and dynamic characteristics of the proposed scheme. [ABSTRACT FROM AUTHOR]

This paper introduces a novel five-level nested neutral point piloted (NNPP) converter and analyzes the operating principle of five-level NNPP converter. This paper presents a novel space vector pulse width modulation (SVPWM) algorithm based on gh coordinate for five-level NNPP converter. First, the common-mode voltage is reduced by choosing the appropriate redundant switching states. After that, the floating-capacitor voltage balance control strategy is presented. The appropriate switch combinations of each phase are determined by the control requirements of floating-capacitor voltages respectively and the hardware mapping method of the switching states is presented. Furthermore, the neutral-point voltage balance control strategy is presented. In order to balance the dc-link capacitor voltages, the seven-segment switching sequence is selected according to the control requirements of dc-link capacitor voltages and the neutral-point voltage regulatory factor is introduced to regulate the durations of the redundant switching states in a switching cycle. Finally, the validity of the novel SVPWM algorithm with decoupling control strategies of floating-capacitor voltages and dc-link capacitor voltages is verified by the experimental results of five-level NNPP converter under steady-state and dynamic conditions. [ABSTRACT FROM AUTHOR]

This paper presents an intensive discussion on a high-voltage direct-current (HVDC) long-distance transmission system combining two modular multilevel double-star chopper-cells (DSCC) converters with dc power cables. Hereinafter, each converter is referred to simply as a DSCC converter, or just as a DSCC for more simplicity. Such an HVDC transmission system is required to provide low-voltage-ride-through (LVRT) capability to enhance system availability. This paper proposes a practical LVRT control characterized by the use of power-line communications between the two DSCC converters. The validity and effectiveness of the LVRT control is verified not only by simulated waveforms obtained from the software package “PSCAD/EMTDC” but also by experimental waveforms from a three-phase 200-V, 400-Vdc, 10-kW, 50-Hz downscaled system with 300-m-long dc power cables. [ABSTRACT FROM AUTHOR]

Unlike the short circuit faults, the breakage fault does not offer distinctive characteristics compared with normal operation transients in DC distribution system and the fault information is difficult to be analyzed, which bring great challenges to breakage protection. In this case, this paper introduces a fault characteristic analysis method for breakage faults and proposes a novel breakage protection scheme based on ratio of positive and negative fault currents for DC distribution network. By establishing the fault circuit equations, the breakage fault features are analyzed for protection. Meanwhile, the ratio of current summation over their subtraction is used to further amplify fault characteristics, which overcomes the reliability problem of conventional breakage protection. A six-terminal flexible DC distribution network is built in PSCAD/EMTDC to verify the proposed protection method. Simulation results show that the protection is robust to the measurement noise and can identify an internal breakage fault and realize the broken pole selection rapidly. [ABSTRACT FROM AUTHOR]

Current flow controllers (CFCs) are power electronics-based devices that may remove some technical barriers preventing multiterminal high-voltage direct current (MTdc) grid deployment. In this paper, an interline CFC topology is investigated. The single H-bridge CFC (1B-CFC) alters the grid power flow by transferring power between neighboring dc lines. The operation and control of a 1B-CFC under a single modulation scheme is presented. A control strategy has been proposed to provide pole balancing support during imbalance conditions. Small-scale prototypes have been developed to demonstrate the functionality and operational range of the device. To this end, an experimental MTdc grid test-rig has been employed. It is shown that a 1B-CFC could be used to limit the dc line current and, additionally, it can be employed to enable asymmetrical tapping of dc lines. For completeness, the performance of the device has been experimentally validated under line overloading, pole imbalance conditions, and a pole-to-pole dc fault. [ABSTRACT FROM AUTHOR]

Low-frequency high-voltage ac transmission scheme has recently been proposed as an alternative approach for bulk power transmission. This paper proposes a multi-period optimal power flow (OPF) for a multi-frequency HVac transmission system that interconnects both conventional 50/60-Hz and low-frequency grids using back-to-back converters with a centralized control scheme. The OPF objective is to minimize system losses by determining the optimal dispatch for generators, shunt capacitors, and converters. The OPF constraints include the operational constraints of all HVac grid and converter stations. The resulting mixed-integer nonlinear programing problem is solved using a proposed framework based on the predictor-corrector primal-dual interior-point method. The proposed OPF formulation and solution approach are verified using a multi-frequency HVac transmission system that is modified from the IEEE 57-bus system. The results with the optimal dispatch from the proposed method during a simulated day show a significant loss reduction and an improved voltage regulation compared to those when an arbitrary dispatch is chosen. [ABSTRACT FROM AUTHOR]

In real applications, it is usually desirable to have a regulated dc output voltage from a wireless power transfer (WPT) system. This voltage regulation is especially necessary because of possible variation in coupling coil relative position and thus a changing mutual inductance. For WPT systems working at megahertz (MHz), Class E rectifiers are known to be advantageous, thanks to their simple configuration and soft-switching operation. In this paper, we propose a new Class-E-based active rectifier. This rectifier is capable to simultaneously perform high-efficiency rectification and output voltage regulation, but without the need to have an additional regulating circuit. Analytical derivations and analysis are provided to explain the operation principle in detail. Guidance is also developed for a balanced design of parameters, which compromises among different criteria. Final experiments validate the analytical analysis and dc output voltage regulation via the active rectifier. With the duty cycle control of the rectifier, a constant output voltage (10 V) can be maintained under a varying mutual inductance coefficient and with more than 92% rectifying efficiency. [ABSTRACT FROM AUTHOR]

Three-phase input diode rectifier interior permanent magnet synchronous motor (IPMSM) drives with small-volume film capacitors have many merits, such as high reliability, high power density, and low cost. However, in regenerative braking mode, the dc link may suffer from overvoltage due to the application of slim film capacitors. In this paper, a novel antiovervoltage strategy is proposed by controlling the motor voltage using stator current vector orientation. The relationship among the braking torque, the dc-link capacitance, and the antiovervoltage ability is analyzed quantitatively. Based on the analysis of principle, a closed-loop antiovervoltage regulation scheme is presented, which is easy for applications. Additionally, this method has the merit of low motor parameter dependence. Meanwhile, the small signal model of the electrolytic capacitorless IPMSM drive is derived for the coefficient design of the voltage controller. The proposed algorithm is finally implemented on a 2.2-kW electrolytic capacitorless IPMSM drive platform to verify the effectiveness of the antiovervoltage control scheme. [ABSTRACT FROM AUTHOR]

This paper proposes an effective sliding mode controller (SMC) for a grid-connected 7-level packed U-cell (PUC7) inverter. The aim is to design a simple controller that deals effectively with the complex control problem of the PUC7 inverter (multiobjective control problem). The selection of the control actions is achieved according to the system state error at every sampling time, regardless of the previous values, which makes the control technique model-independent. The control algorithm evaluates online two cost functions (one for each state error), which are derived on the basis of sliding mode theory, and it selects the optimal control input in order to satisfy the reaching conditions of the two cost functions. Compared with the existing solutions, the proposed SMC technique ensures lower average switching frequency by tuning the hysteresis bandwidth of the capacitor-voltage error. The fast implementation, needless of gains tuning, and simple design procedure are the main features of the proposed algorithm. Simulation and experimental results are presented to prove the effectiveness of the proposed technique in controlling the PUC7 inverter with high dynamic performance and robustness against disturbances and parameters mismatch. [ABSTRACT FROM AUTHOR]

Modular multilevel converters (MMCs) are emerging as a promising topology for medium- and high-power applications. Aluminum electrolytic capacitors (AECs) are usually employed in MMCs as floating capacitors due to their high volumetric efficiency and low price. AECs gradually deteriorate over time due to electrolyte vaporization, and for this reason, they have been recognized as one of the most fragile components in the converter. As they continue to age, the AEC's capacitance decreases and its equivalent series resistance increases, which can result in an increase of submodule (SM) capacitor voltage ripple, power loss and could damage the operation of the MMC with prolonged use of aged capacitors. To prevent such damage, monitoring the health of capacitors is an important step to enhance the reliability of the MMC by predictive maintenance. This paper presents a failure prediction scheme for SM capacitors in the MMC by monitoring the SM capacitor voltage oscillations. Detailed simulation studies are carried out for a five-level MMC in the PLECS® platform and verified experimentally. The estimated capacitance through simulations and experiments is in close agreement to that value measured using the LCR meter. [ABSTRACT FROM AUTHOR]

The present paper provides a solution to operate multilevel dual active bridge (ML-DAB) converters built upon neutral point clamped switching legs in a full-bridge disposition and with any number of levels on either side of the converter. The main issue of such converters is addressing the inherent unbalance of the dc-link capacitor voltages, which hinders the proper operation and optimum utilization of the converter. The proposed solution comprises a generalized to N levels modulation and control scheme that allows operating these converters, while guaranteeing the proper balance of the dc-link capacitor voltages. The suitability of the proposed solution is verified through simulation and experimental tests performed in five different converter configurations, three of them with an asymmetric number of voltage levels, proving that capacitor voltage balance is achievable in a wide range of operation conditions. Moreover, the efficiency of the ML-DAB converters is demonstrated to be superior to the conventional two-level DAB case. [ABSTRACT FROM AUTHOR]

The penetration of renewable energy resources is changing the way the power system is understood and operated. With an increasing number of power electronics devices integrated into the power system, the modular multilevel converter (MMC) is arising as one of the key technologies for HVDC applications. While several control strategies for MMCs have been proposed in the last years, designing controls for MMCs remains a challenging and non-trivial problem due to its large number of degrees of freedom. In this paper, a general multivariable control structure is proposed that generalizes and improves upon previously reported approaches. Moreover, to fully exploit the degrees of freedom offered by this control, a model-based tuning methodology is presented that extends results from optimal $\mathcal {H}_2$ structured control design to MMC applications. A case study using an HVDC link is used to illustrate and analyze the performance of the MMC using the proposed approach in different scenarios. [ABSTRACT FROM AUTHOR]

This paper presents a hierarchical-hybrid architecture for Volt/Var control of distribution grids in the presence of high penetration of distributed generators (DGs). The architecture includes three layers with specific operational goals associated with each layer based on data resolution, communication network, and control device response time. The top layer carries out central optimization and seeks to minimize power losses via optimal 15-minute scheduling of load tap changers (LTCs), voltage regulators (VRs), and capacitor banks (CBs), and DGs. The middle layer ensures voltage regulation using a distributed approach for reactive power provisioning by fast response DGs. The bottom layer carries out local decision making that enlists edge intelligence to operate LTCs, VRs and CBs to cope with fast and real-time changes in DGs and loads. The top layer generates overall references for the lower layers optimized over a 24-hour horizon, updated at 15-minute intervals, which are then suitably corrected at faster time-scales of seconds in the middle and bottom layers. Appropriate coordination is introduced between each layer so as to meet combined goals of optimization and accommodation of load and generation uncertainties in near real-time. The proposed method is validated using a modified IEEE 34 bus test feeder and at 80% penetration of DGs. [ABSTRACT FROM AUTHOR]

In this paper, a voltage sensorless controller is developed for a two-switch single-phase rectifier that involves power factor correction and active pulsating power buffering without electrolytic capacitors. While a two-switch rectifier normally requires four sensed signals for control, only one current sensor is required in this proposal, thereby offering advantages such as low cost, high compactness, isolation between control and power circuits, and improved reliability. While the basic operating principle follows that of a conventional voltage sensorless controller for single-switch converters, several critical design considerations are the key to the success of the implementation which is explained in detail. The feasibilities of the controller are experimentally testified with a 100-W rectifier prototype regarding both steady state and dynamic performance. [ABSTRACT FROM AUTHOR]