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Without active control, the voltage fluctuations of the dc-link and flying capacitors in a 4-level hybrid-clamped converter (4L-HCC) become excessively large in low-frequency operation. This paper studies the switching state redundancy inherent in a 4L-HCC and proposes a new capacitor voltage balancing and stabilizing method to minimize the dc-link and flying capacitor voltage fluctuations. A straightforward algorithm is developed based on a logic table to select the suitable switching states. Verified by simulation and experimental testing results, the new method and algorithm virtually eliminate all the big voltage fluctuations of capacitors at low and zero frequencies, greatly enhancing the robustness and reliability of a 4L-HCC. The capacitor size can be reduced by more than 80% compared with the conventional method. [ABSTRACT FROM AUTHOR]

This paper proposes a three-phase, five-level, non-regenerative pulsewidth modulated rectifier using only two active switches (minimum required) per phase, which drastically reduces gate driver requirement and hardware complexity. It draws sinusoidal input current at close to unity power factor. All the semiconductor devices are rated at only one fourth of the dc-link voltage, and none of them requires any transient voltage balancing snubber. A total of 8 out of the 14 diodes per phase undergo soft switching transition under all operating conditions, which increases its efficiency. No extra hardware circuitry for balancing the flying capacitors (FCs) or the dc-link mid-point voltage are required, which further reduces hardware complexity and increases the conversion efficiency. The proposed topology does not need any sophisticated startup procedure for charging the FCs either, which solves the problem of semiconductor overvoltage during starting. A 3-kW laboratory prototype is built to experimentally verify the proposed topology. The maximum efficiency obtained from the prototype is 98.7%, and it is always more than 96% for the load range from 15% to its rated. [ABSTRACT FROM AUTHOR]

The operating principle of the clamp circuits like clamping diodes and flying capacitor in three-level LLC converter is different from other three-level converters, because the mean value of the resonant tank current is always zero and pulse-frequency modulation control is generally used instead of pulsewidth modulation control. And the converter with only the clamping diodes or flying capacitor is difficult to realize voltage balance. In this paper, the characteristics of the three-level LLC converter with single clamp circuit are first analyzed. Then, the operation principle of the hybrid-clamped circuit under the unbalanced voltages on input capacitors is described with the mode analysis, based on which the mechanism for voltage autobalance is elaborated and the effects of two clamp circuits are derived. Then, the design of the clamping diodes and the flying capacitor is also involved. Finally, a three-level LLC converter prototype is built and the experimental results verify the validity of the theoretical analysis and design. [ABSTRACT FROM AUTHOR]

Power flow control in multiterminal HVdc (MTdc) grids is essential to restrict operation within permissible limits. A current flow controller (CFC) can achieve this. In this paper, the modeling, control, and simulation of resistive, RC-circuit-based, and capacitive CFCs is carried out. CFC prototypes have been developed and an MTdc grid test-rig has been employed for experimental validation. Results show that all devices achieve an effective power flow management. The impact of CFC deployment in future MTdc grids is assessed on droop-controlled converters. A voltage compensation-based method is proposed to minimize power deviations during unscheduled line current control. A protection scheme has been assessed under faults. [ABSTRACT FROM AUTHOR]

This paper deals with the analysis of the input dc-link voltage ripple in multilevel inverter based on H-bridge and level doubling network (LDN). The LDN is basically a half-bridge fed by a floating capacitor, with voltage self-balancing capability, recalling the concept of a flying capacitor configuration. The amplitude of the LDN voltage ripple is analytically determined considering both the low-order and the switching harmonic components. In particular, peak-to-peak distributions of voltage ripples over the fundamental period are analytically determined, making possible the design of dc-link capacitor relying only on the dc-voltage ripple requirements. The case study makes reference to negligible switching ripple in the output current. It well represents either grid connection or passive load having almost sinusoidal currents. Numerical simulations carried out by MATLAB/Simulink and a complete set of experimental verifications are given to confirm the theoretical developments. [ABSTRACT FROM AUTHOR]

According to different clamping methods, nine modes (C_MODE1-9) of the traditional discontinuous pulsewidth modulation (DPWM) for neutral-point-clamped three-level converter have been revealed. Since traditional DPWM cannot balance neutral point (NP) voltage under the full range of modulation index (MI) and power factor (PF), two extended modes (E _MODEs) are proposed in this paper, which can balance NP voltage. The proposed extended discontinuous pulsewidth modulation (EDPWM) is characterized by using C_MODEs and E_MODEs alternately.Therefore, EDPWM can balance NP voltage under the full range of MI and PF. Since the switching numbers under C_MODE and E_MODE in one switching cycle are two and three, respectively, the switching loss under EDPWM is lower than that under other pulsewidth modulation (PWM) strategies. The performance of EDPWM is analyzed and compared with traditional DPWM, space vector PWM (SVPWM) and virtual SVPWM (VSVPWM) in terms of switching loss, waveform quality, and the ability of NP voltage control. Finally, the feasibility and superiority of the proposed method are verified by experiments. [ABSTRACT FROM AUTHOR]

The pulse-width modulated (PWM) switching rectification that can achieve a high power factor (PF) for increasing the energy transfer efficiency between an LC resonator and a rectifier and voltage step-up and -down conversion is proposed for a wireless power transfer (WPT) receiver. The proposed method can emulate the switching rectifier as a resistive load by using an inductor and integrated phase synchronizers. Additionally, similar to a switched-inductor converter that controls the duty cycle ratio (D), the proposed PWM rectifier can control the output voltage VOUT when the input is a rectified, wirelessly coupled voltage instead of a constant voltage. Thus, unlike a conventional PWM switching rectifier for ac mains, an additional voltage conditioning circuit would not be needed after the proposed rectifier for WPT. The proposed PWM switching rectification is implemented in the AMS 0.18 μm 1.8 V/5 V CMOS process. PF = 1 is measured, indicating the most efficient energy transfer, compared to only 0.55–0.65 in a peak detection rectifier. Additionally, 88.2% of peak power conversion efficiency of the switching rectifier is achieved, and the maximum output power is 80.3 mW at 500 kHz of the WPT frequency. Moreover, the measured voltage conversion ratios ranging between 0.73× and 2× are demonstrated in this paper. [ABSTRACT FROM AUTHOR]

High power pseudospark switches (PSSs) can control pulsed high voltage, high peak current discharges. In this paper, a PSS in series with a saturable inductor at the anode is investigated. The commutation process is analyzed with a time-resolved method. And the effects of the number of magnetic cores and anode voltages on discharge characteristics are studied experimentally. At the beginning of commutation process, when the anode voltage is 10.4 kV with four magnetic cores, the inductor is unsaturated, and there is a flat plateau of the forward voltage drop after the anode voltage drops rapidly to about 200 V, at the same time the current rise rate is 2.8 kA/ $\mu \text{s}$. When the inductor is saturated, there is a voltage spike that occurs at the end of the flat plateau, and the current simultaneously rises rapidly at the rate of 6.4 kA/ $\mu \text{s}$. The current sharp rise lags behind the voltage drop of the pseudospark gap, and the electrode erosion and energy dissipation reduce significantly. When the anode voltage is 15.6 kV, the commutation losses reduce by about 30% with seven cores in series at the anode. As a result, it is evident that the discharge process will speed up if the anode voltage is higher. And the trigger delay decreases by up to 8% when the anode voltage varies from 5.2 to 15.6 kV. Finally, in order to obtain a reproducible pseudospark discharge by the use of a saturable inductor, the number of magnetic cores has to be optimized for different anode voltages. [ABSTRACT FROM AUTHOR]

Amorphous magnetic core has been widely used in pulsed power technology with applications including plasma science research, high-power microwave generation, and material surface treatment. For different applications, dynamic properties of the magnetic core will vary with stimulated magnetic field which determines by magnetization time and waveform of the driving voltage. In this paper, toroidal amorphous magnetic core ($\Phi ~540$ – $740\times25$ mm) was investigated theoretically, numerically, and experimentally. Specifically, the circuit is analyzed. A high-voltage test stand, which can generate different driving voltages with same components, was designed and developed in our laboratory. Dynamic properties, including magnetic induction change, coercive force and losses, were studied under three different typical waveforms with the same magnetic flux. Driving voltages of the pulses were 12, 12, and 6 kV and the magnetization rates were 0.6, 1.2, and 0.6 T/ $\mu \text{s}$ , respectively. Experimental results show reasonable agreement with the numerical analysis. [ABSTRACT FROM AUTHOR]

When providing ac output, modular multilevel converters (MMCs) experience power fluctuation in the phase arms. The power fluctuation causes voltage ripple on the module capacitors, which grows with the output power and inversely to the output frequency. Thus, low-frequency operations of MMCs, e.g., for motor drives, require injecting common-mode voltages and circulating currents, and strict dc voltage output relative to ground is impossible. To address this problem, this paper introduces a novel module topology that allows parallel module connectivity in addition to the series and bypass states. The parallel state directly transfers power across the modules and arms to cancel the power fluctuations and hence suppresses the capacitor voltage ripple. The proposed series/parallel converter can operate at a wide frequency range down to dc without common-mode voltages or circulating currents; it also allows sensorless operation and full utilization of the components at higher output frequencies. We present detailed simulation and experiment results to characterize the advantages and limitations of the proposed solution. [ABSTRACT FROM AUTHOR]

In order to provide high and extendable power levels for inductive power transfer (IPT) system, a parallel multi-inverter system based on modular inverter is presented. Various power requirements can be implemented by an adjustment of the number of paralleled inverters, which provides a high modularity. A master−slave scheme is employed for the switching-driver signals of parallel inverters, where one acts as a leader while others act as followers. Despite the master−slave scheme, the proposed circuit topology has natural robustness because of the equality in terms of the hardware configuration of each modular inverter. For proper parameters, the output phase (current lagging corresponding voltage) of an inverter is lower than the average of output phase of all inverters, when its output voltage lags behind others, and vice versa. Based on this approach, PI controllers are designed to implement phase synchronization for output voltages of all inverters. An IPT prototype supplied by the proposed parallel multi-inverter with three inverters was designed, built, and tested. Experiments show that the proposed parallel multi-inverter system has not only good circulating current suppression capacity but also excellent performance of phase synchronization. The maximum dc−dc efficiency was 94% at a 35.1 kW receiving power. This paper is accompanied by a Matlab/Simulink file demonstrating phase synchronization control. [ABSTRACT FROM AUTHOR]

In this paper, a robust adaptive sliding-mode observer (SMO) is designed based on the surface permanent-magnet synchronous machine (SPMSM) model in rotor reference frame ($\gamma \delta $ -axis), and an online inverter nonlinearity identification and compensation method is proposed. In order to reduce the chattering of the SMO, an adaptive law is presented to help estimate the back electromotive forces of an SPMSM; thus, smaller gains can be set for switching functions of the SMO. The small-signal model of the proposed sensorless scheme is derived for analyzing the steady-state and dynamic behavior of the sensorless scheme. Voltage distortion, caused by nonlinear characteristics of switching devices, not only causes (6k ± 1)th harmonics in phase currents but also leads to a rotor position estimation error. The equivalent amplitude of the voltage distortion can be identified based on the derived small-signal model of the proposed sensorless scheme. To improve the accuracy of the estimated voltage distortion, a recursive restricted total least squares is applied to obtain the estimated amplitude of the voltage distortion. Experimental results validate the proposed sensorless control scheme and its effectiveness. [ABSTRACT FROM AUTHOR]

Partial discharge (PD) in gas insulated switchgear (GIS) has been studied extensively under AC voltage or transient voltage applied alone. However, the transient voltage in an actual system is superimposed on the AC operating voltage, which has rarely been studied. In this paper, the effect of AC and switching impulse superimposed voltage on PD characteristics was studied in SF6 gas. A test platform of generating superimposed voltage with controllable phase was used to study free particle and floating potential defect models. When the AC voltage was 90 and 110% of PD inception voltage (PDIV), the standard switching impulse with amplitude of about twice the PDIV was superimposed on different phases of the AC voltage. When the AC voltage is below the PDIV, results show that PDs of free particle defect model can be initiated when switching impulse is superimposed on 45 and 90° of AC. The PDs in the subsequent cycles of AC reignited into a self-sustaining discharge. For the floating potential defect, PDs have a marked difference duration, which is initiated by switching impulse in different phase. However, there is no change in PDs in each model when the AC voltage is above the PDIV. [ABSTRACT FROM AUTHOR]

A gate driving for power devices is a key technology to further improve switching characteristics. With the help of digital gate driver IC, the switching behavior of power devices can be enhanced even under high-speed switching. In this paper, an evaluation platform for determining the optimal switching pattern of an active gate drive control is proposed for an inverter circuit. A high speed optimization system is built up to search for an advantageous switching pattern that reduces total switching loss of two power devices in an inverter circuit and constrains surge voltage simultaneously. The proposed online optimization demonstrates its feasibility for the full-bridge inverter circuit, which is rated at 500 V with digital active gate drive control. Experimental results show that the proposed optimization system is able to obtain optimal switching pattern from $64^{60}$ possible combinations of switching patterns within 15 min, which is 6 times faster than the previous study. Optimizations can also conducted under different load current conditions. Eventually, the obtained optimal pattern yields up to 42% reduction in the total switching loss when it constrains surge voltage to minimum compared with the conventional driving pattern. [ABSTRACT FROM AUTHOR]

Thanks to the favorable advantage of low cost, integrated three-port dc–dc converters with reduced switches have attracted extensive attention. In order to provide more new topologies, this paper aims to propose a programmable topology derivation method, which effectively simplifies the cumbersome process of the conventional combination method. Instead of the manual connection and examination, the proposed alternative can quickly and rigorously derive multiple viable integrated three-port dc–dc topologies from a great number of possible connections with the aid of computer program. Besides, generalized analysis is also accomplished, with which performance characteristics of all derived converters are simultaneously obtained and then a comprehensive comparison can be easily conducted to select a preferred one for the practical application. Finally, an example-specific application with one input and two outputs is given, with topology selection, design, and experimental results demonstrated in detail. [ABSTRACT FROM AUTHOR]

In this paper, a systematic and analytical study of non-isolated topologies belonging to the family of reduced redundant power processing (R2P2) converters is presented. Based on this study, all the non-isolated R2P2 topologies that can be implemented in reality are derived. Detailed examples clarify all possible cases of this analysis. In addition to this, the voltage ratio and the efficiency for each one of the R2P2 configurations are calculated, being further illustrated with examples. A comparison among configurations is also discussed with criteria the high step-up voltage gain and efficiency, aiming for high-power applications. One of these R2P2 converters is selected for further examination, as the most suitable for such applications. The theoretical analysis, as well as the calculations of the step-up voltage ratio and efficiency of the selected converter, is compared to experimental results conducted on a 2-kW laboratory prototype designed to operate in various step-up voltage ratios and in a high-power range, proving the effectiveness of the proposed investigation. [ABSTRACT FROM AUTHOR]

The efficiency improvement of the on–off controlled Class E dc–dc converter operated at 20 MHz switching frequency is investigated in this paper. It is found that with the on–off control, the input power of the converter during the on mode increases with the increase of the input voltage, and it can be reduced by increasing the switching frequency. With this discovery, a variable switching frequency (VSF) on–off control is proposed, which slightly increases the switching frequency when the input voltage increases, maintaining the input power during the on mode slightly higher than the rated output power over the entire input voltage range, and thus highly improving the efficiency of Class E dc–dc converter at high input voltage. A prototype of 9-V–18-V input, 10-W Class E dc–dc converter has been fabricated and tested in the lab. The experimental results show that the proposed VSF on–off control improves the conversion efficiency of the Class E dc–dc converter by 4%–10% compared to the constant switching frequency on–off control. [ABSTRACT FROM AUTHOR]

In order to reduce switching loss of neutral point clamped three-level inverter (NPC TLI), generally discontinuous pulsewidth modulation (DPWM) is used. But it can result in dc offset and ac ripple on neutral point (NP) voltage. So a novel pulse sequence DPWM (NPSDPWM) is proposed to reduce switching loss and control NP voltage simultaneously in this paper. NP voltage is controlled by choosing proper clamping modes. To avoid unexpected switching action during changing clamping mode, an improved pulse sequence is also presented. The switching loss and NP voltage ripple of NPSDPWM, traditional and proposed DPWM in previous literature are compared, respectively. The experimental results show that NPSDPWM has well NP voltage control ability and the switching losses are reduced effectively. [ABSTRACT FROM AUTHOR]

Three-level inverter has an outstanding performance and is more advantageous in the switching vector selection than two-level inverter. In particular, the neutral-point voltage unbalance and common-mode voltage (CMV) reduction of three-level inverter should be carefully regulated for the appropriate operation, both of which, however, are mutually coupled resulting that the conventional space vector modulation (SVM) scheme cannot deal with them properly. To overcome this limitation, this paper proposes an improved space vector modulation (ISVM) technique to reduce the CMV and neutral-point voltage imbalance simultaneously. The generating mechanism of neutral-point voltage oscillation is derived. Based on the analysis, the proposed ISVM method adopts four voltage vectors (large, medium, small, and zero vectors) with adjusted dwell times to eliminate the ac unbalance of the neutral-point voltage. Considering the occurrence of neutral-point voltage disturbances, the dc neutral-point unbalance voltage is controlled by selecting the P-type or N-type small vector and adjusting the dwell times of small vectors for neutral-point voltage recovery. In addition, a novel switching sequence arrangement method with the minimal number of switches transition in one switching cycles and between switching cycles is proposed to reduce the total switching loss. Theoretical analysis and verification results show that the proposed ISVM scheme can reduce the magnitude of CMV to half of value using the conventional SVM, and an accurate control of ac and dc unbalanced neutral-point voltage can be obtained. [ABSTRACT FROM AUTHOR]

Power converter is critical but prone to be failure in switched reluctance motor (SRM) drives. The open- and short-circuit fault characteristics of freewheeling diode in asymmetric bridge power converter are analyzed in details. Based on logic judgment, four online fault diagnostic methods with digital phase current analysis of power converter are proposed in this paper. The fault features are extracted by analyzing the relationship between chopping signal and the current information from some special positions. The four fault diagnostic methods are carried out according to the current obtained by detecting dc bus current and the lower freewheeling bus current, the chopped bus current, the upper excitation bus current and lower freewheeling bus current, the lower excitation bus current, and dc bus current, respectively. Comparisons between the four diagnostic methods are conducted. Simulations and experiments on a 12/8 SRM validate the effectiveness of the proposed methods. [ABSTRACT FROM AUTHOR]

This paper proposes two coupled-inductors-based Z-source networks, called the modified series and tapped switched-coupled-inductors quasi-Z-source networks (mSSCL-qZSN and mTSCL-qZSN, respectively). These networks offer high voltage gains with less-than-unity winding turn ratios $(n < {\text{1)}}$ , resulting in a reduced inductive element size. Other advantages include a less number of active components and their lower ratings and a higher efficiency. In addition, a lower magnetic core size is required for the proposed ZSNs due to the lower peak magnetizing current. The performance principles and detailed comparative analysis are provided and confirmed through experiments on a 200-W dc–dc converter. [ABSTRACT FROM AUTHOR]

The degradation of submodule (SM) insulated gate bipolar transistors (IGBTs) in a modular multilevel converter (MMC) can be monitored through their on-state voltages. This paper proposes a scheme to calculate the IGBT on-state voltages at rated current and normal junction temperature. The equations of on-state resistances are established based on Kirchhoff voltage laws (KVL) in one MMC arm for positive and negative current directions separately. The arm current, arm voltage, capacitor voltages, gate signals, and junction temperatures are utilized in the equations, and most of the signals are known for the control system. The dimension of the equation set is reduced to make it solvable based on an assumption that all the on-state resistances of diodes remain equal. In addition, the Kalman filter (KF) is used to improve the stability and accuracy of the calculation results. The calculated results are converted to the normal condition based on the current-voltage (I–V) and resistance-temperature (R–T) characteristics of SM IGBTs and diodes. The scheme is verified by using the simulation of a five-level three-phase MMC model. The errors of the calculated VCE are within 0.3%, and the calculation accuracy is good enough for the estimation of IGBT degradation. Furthermore, the influences of the measurement accuracy and the equal diode voltage assumption on the calculation accuracy are analyzed. The proposed scheme is expected to be applicable in online condition monitoring of SM IGBTs. [ABSTRACT FROM AUTHOR]

In this paper, a novel discontinuous pulsewidth modulation (DPWM) modulation strategy for a neutral-point-clamped (NPC) three-level converter (TLC) is proposed to reduce the switching loss, reduce common-mode voltage (CMV), and remove dc offset from the neutral-point (NP) voltage simultaneously, which is named as RCMV_DPWM. Based on the space vector diagram with reduced CMV, all clamping modes under RCMV_DPWM are revealed. Then, the NP voltage is controlled by selecting proper clamping mode. The realization of RCMV_DPWM is also discussed. Moreover, the performances of RCMV_DPWM are analyzed and compared with other PWM strategies in term of the NP voltage ripple, switching loss, and waveform quality. Finally, the feasibility and superiority of RCMV_DPWM are verified by experiments. [ABSTRACT FROM AUTHOR]

Because it possesses higher current turn-off capability, the inverse current commutation with semiconductor devices (ICCOS) is a better option for the opening switch of an inductive pulsed power supply than the integrated gate commutated thyristor. This paper investigates the counter-current capacitor, which is the key component that determines the turn-off result and the volume of the counter-current branch. The major contributions of this paper include the following: 1) deriving an analytical expression for the minimum precharged capacitor voltage that can reliably turn off the main switch; 2) verifying this expression through a series of experiments within a current range of 0 to 4000 A and an energy range of 0 to 50 kJ; 3) giving an approximate expression for the optimal capacitance that minimizes the precharged energy; and 4) investigating the variation trends of the optimal capacitance and the corresponding optimal precharged energy with varying inductor current. [ABSTRACT FROM PUBLISHER]

In this paper, the zero sequence circulating current in open winding permanent magnet synchronous machine (OW-PMSM) drives with common dc bus is systematically analyzed for the first time. It is revealed that the zero sequence circulating current is affected by zero sequence back-electromotive force, cross coupling voltages in zero sequence from the machine side, pulse-width modulation induced zero sequence voltage, and inverter nonlinearity from the inverter side. Particularly, the influences from the cross coupling voltages in zero sequence and parasitic effect of inverter nonlinearity are investigated for the first time in this paper. Then, the synthetic model of the equivalent zero sequence circuit is proposed as well. Each cause is studied independently via analytical modeling, finite element analysis, and experiments. Meanwhile, to tackle this issue, the relevant suppression strategy using frequency adaptive proportional resonant controller is presented and tested on the 3 kW OW-PMSM platform. [ABSTRACT FROM AUTHOR]

A three-phase three-level (TPTL) converter is an optimal alternative for high-input and high-power dc/dc conversion system. The voltage stress on the primary switch is only half of the input voltage due to its three-level (TL) structure, and the current rating of power devices can be reduced by the three-phase configuration. To achieve soft switching and improve efficiency, the resonant tank can be introduced to optimize the performance of the converter. In this paper, a novel TPTL LC-type series resonant converter with few switches and simple configuration is proposed. The voltage stress on all switches can be reduced to the half of the input voltage, and the voltage across output rectifiers is clamped to the output voltage; as a result, the proposed converter is suitable for high-input/output applications. Meanwhile, the ripple frequency of the output current can be increased significantly, resulting in a reduced filter requirement. Variable frequency control strategy is adopted in order to obtain zero-voltage switching for all switches and zero-current switching for all rectifier diodes in wide input voltage and load range. In this paper, the comprehensive analysis on the proposed converter is carried out, including the operation mode classification, the operating mechanism under different operation mode, along with the circuit model, and gain characteristics of the converter by the fundamental harmonic analysis. Experimental results from a 440–590 V input and 400 V/5 A output are presented to verify the theoretical analysis and the performance of the converter. [ABSTRACT FROM AUTHOR]

This part of the paper illustrates the use of the expression derived in Part I for predicting subharmonic oscillation in switching regulators. Six case studies with different control schemes from the recent literature are used to validate the novel approach and the new derived expression, which is benchmarked for these case studies against results obtained using the discrete-time modeling approach or Floquet theory combined with Filippov method. Numerical simulations from the circuit-level switched models, implemented in PSIM software, are used to demonstrate the correctness of the derived closed-form condition. A procedure is presented to apply the approach of the paper to power converters with nonlinear sources, such as photovoltaic (PV) arrays or fuel cells. Experimental measurements from a boost converter prototype for PV applications are also provided to validate the theoretical predictions and the numerical simulations showing a remarkable agreement. [ABSTRACT FROM AUTHOR]

In high-voltage applications, the magnitude of total semiconductor losses (on-state and switching) determines the viability of modular-type multilevel converters. Therefore, this paper presents a new cell arrangement that aims to lower total semiconductor loss of the modular multilevel converter (MMC) to less than that of the half-bridge modular multilevel converter (HB-MMC). Additional attributes of the proposed cell are: it eliminates the protective thyristors used in conventional half-bridge cells that deviate part of the dc-fault current away from the antiparallel diode of the main switch when the converter is blocked during a dc short-circuit fault, and it can facilitate continued operation of the MMC during cell failures without the need for a mechanical bypass switch. Thus, the MMC that uses the proposed cell retains all advantages of the HB-MMC such as full modularity of the power circuit and internal fault management. The claimed attributes of the proposed cell are verified using illustrative simulations and reduced scale experimentations. Additionally, this paper provides brief and critical discussions that highlight the attributes and limitations of popular MMC control methods and different MMC cells structures proposed in the literature, considering the power electronic system perspective. [ABSTRACT FROM AUTHOR]

This paper extends the voltage-doubler concept to the single-phase SEPIC rectifier in discontinuous conduction mode and, as a consequence, novel rectifiers are proposed. A comparison with the classic SEPIC rectifier shows that the proposed converters can either provide reduced voltage stress on the semiconductors for the same output voltage level or supply double the gain of the output voltage with the same voltage stress. The proposed voltage-doubler SEPIC rectifiers provide a high power factor with no current control and they can be applied in order to improve the static gain of the structure, which can make the SEPIC rectifier suitable for applications that require a high voltage level. In this paper, the generic structure based on a three-state switch, four different implementations of the proposed concept (including bridgeless structures), steady-state analysis, a dynamic model, system control, and experimental results are presented. The proposed rectifiers were verified by experimental results obtained with a prototype built with the following specifications: 1000 W output power, 220 V input voltage, 400 V output voltage, and 50 kHz switching frequency. Peak efficiency of 95.84%, THD of 2%, and power factor of 0.9997 were obtained and, most importantly, double the gain of the output voltage was verified. [ABSTRACT FROM AUTHOR]

This paper presents the analysis and design of an isolated high-voltage LLC resonant dc–dc full-bridge converter based on symmetrical quadrupler rectifier (SQR). Unlike conventional Cockcroft–Walton and full-bridge diode rectifiers, the SQR circuit provides significant improvement in power density by reducing the transformer turns-ratio without much increase in the output impedance. Moreover, the LLC converter can provide additional voltage boost, if operated, below the series resonant frequency of the LLC tank. The operating region of the converter is chosen in such a way that the converter always operates in ZVS for all line and load conditions with additional voltage boost. A new method based on basic differential equation is proposed for the accurate analysis and design of the converter and subsequently, the key results are compared with a first harmonic approximation based analysis method. A 120 V dc input, 2 kV output, 200 W laboratory prototype has been designed, built, and tested. Simulation and experimental results shown in this paper demonstrate the validity of the analysis and design of the presented converter. [ABSTRACT FROM AUTHOR]

Usually, the high-gain high-efficiency dc–dc converters consist of many passive components, which increases the order of the system. As the order increases, system modeling and control become more complex. Thus, there is a need for the simplification of the small signal modeling process of such converters. This paper presents a generalized small signal model and equivalent circuit for an $n$ th-order coupled-inductor-based high-voltage gain converters (CIHVGC) that can be conveniently used for the control design. The state variable representation of a generalized coupled inductor with p windings is included. A simplified step by step procedure to obtain small signal model using visual inspection is presented. Analysis is included and verified using simulations and experiments for the output voltage regulation of high-voltage gain converters. The usefulness and versatility of the proposed model is verified with three examples of high gain converters belonging to the CIHVGC family. All the analytical, simulation, and experimental details of this paper are presented. [ABSTRACT FROM AUTHOR]

For the conventional PFC rectifiers, the high efficiency cannot be achieved over a wide input range, and the efficiency will be greatly decreased at low-input voltages. In order to overcome the efficiency bottleneck under low-line input, a flexible mode bridgeless boost power factor correction (PFC) rectifier is proposed in this paper. According to the input voltage, the proposed rectifier can be flexibly adapted to the suitable operating mode to obtain the maximum efficiency. Meanwhile, the circuit components can be reused by different operating modes, so the extra cost is low. In the proposed rectifier, a back-to-back bridgeless boost PFC topology is adopted at high-line conditions and a three-level bridgeless boost PFC topology is rebuilt to reduce the switching losses at low-line conditions. Compared with the traditional bridgeless boost PFC rectifier, an extra low-voltage bidirectional switch (usually composed of two switches) is added, so the increased cost is low. In addition, the low common-mode noise can be achieved at both high- and low-line conditions due to the direct connection between the input mains and the output electrolytic capacitor. The detailed principle analysis about the proposed rectifier is presented in this paper. Finally, an experimental prototype is built to verify the feasibility and the effectiveness of the proposed topology. [ABSTRACT FROM AUTHOR]

The degradation in power quality causes adverse economical impact on the utilities and customers. Harmonics in current and voltage are one of the most commonly known power quality issues and are solved by the use of a hybrid series active power filter (HSAPF). In this paper, a new controller design using sliding-mode controller-2 is proposed to make the HSAPF more robust and stable. An accurate averaged model of a three-phase HSAPF is also derived in this paper. The design concept of the robust HSAPF has been verified through simulation and experimental studies, and the results obtained are discussed. [ABSTRACT FROM AUTHOR]

This paper presents a single-switch isolated dc–dc converter suited for a very high-frequency switching operation, especially above 10 MHz. The converter features a small number of passive components, low-switching loss, and low-voltage stress on the switch. In order to achieve low-voltage stress while maintaining zero voltage switching, the voltage waveform across the switch is shaped by designing the resonant network of the converter. The resonant network includes main parasitic components, such as leakage inductances of the transformer and the junction capacitance of the switch. Furthermore, some resonant elements are entirely replaced by these parasitic components under the specific condition. This paper derives the conditions and then minimizes the number of passive components. To validate the design procedure and the performance of the proposed converter, a GaN-based prototype was implemented. It operates at 10 MHz and provides the output power of 10 W from the dc input voltage of 50 V. The output voltage is regulated to 20 V by the ON–OFF control. Experimental results show that the peak voltage on the switch is reduced to 2.2–2.3 times the dc-input voltage and the efficiency of 69% is achieved under the full load. [ABSTRACT FROM AUTHOR]

This paper studies pulse width modulation (PWM) techniques suitable for a four-level five-phase open-end winding (OeW) drive. The drive comprises a five-phase induction machine, supplied using two two-level voltage source inverters with isolated and unequal dc-link voltages, in the ratio 2:1. A decoupled carrier-based (CB) PWM modulation strategy, based on unequal voltage reference sharing between the two converters, is introduced in this paper. The stability of dc-link voltages in OeW drives is investigated next, using a novel analysis technique. Several modulation methods are analyzed and the results show that application of the coupled PWM technique, with carriers having in-phase disposition, leads to overcharging of the capacitor in the dc-link of the inverter intended to operate with the lower dc-link voltage. On the other hand, the proposed decoupled CB PWM scheme naturally eliminates the dc-link capacitor overcharging problem. These findings are verified experimentally, using open-loop V/f control. Two different decoupled CB modulation methods are compared and the best performing modulation method is selected and incorporated further into an OeW drive with field-oriented control. The presented steady state and transient experimental results demonstrate that the decoupled CB PWM technique is suitable for high-performance variable speed drive applications. [ABSTRACT FROM AUTHOR]

This paper presents a novel family of single-switch resonant dc–dc converters with low switch voltage stress. The single-switch resonant converter which has a ground-referenced switch is advantageous for implementing the gate drive circuit and operating at several-MHz switching frequency. However, the conventional ones mostly have high voltage stress on the switch, roughly 4–5 times the input voltage. In this paper, we propose the single-switch converter topologies derived from the drain-source impedance networks consisting of two inductors and two capacitors. The switch voltage of the proposed converters is shaped into a near trapezoid by designing the resonant networks to have the desired drain-source impedance. Furthermore, a simple and specific design scheme is presented here so that the peak switch voltage is lowered to 2.2–2.5 times the input voltage while zero voltage switching is achieved. Experimental results from a 20-W GaN-based prototype operating at 10 MHz demonstrate the feasibility of the proposed converter topologies and the design method. [ABSTRACT FROM AUTHOR]

This paper proposes a multilevel series compensator (MSC) to deal with voltage sags/swells, harmonic compensation, or reactive power compensation. Such a device can be considered as a dynamic voltage restorer or a series active power filter (Series-APF). The MSC can improve the power quality of loads located in stiff systems. The configuration is based on three-phase bridge (TPB) converters connected by means of cascaded single-phase transformers. This arrangement permits the use of a single dc-link. A generalization for $K$ -stages in which $K$ -transformers are coupled with $K$-TPB converters is presented. The topology permits generating a high number of levels in the voltage waveforms with a low number of power switches in comparison with a classic topology. The multilevel waveforms are generated by the converters through a suitable pulsewidth modulation (PWM) strategy that takes into consideration the transformer turns ratios. Modularity and simple maintenance make the proposed MSC an attractive solution compared with some conventional configurations. Model, PWM strategy, and overall control are discussed in this paper. Simulation and experimental results are presented as well. [ABSTRACT FROM PUBLISHER]

One of the main challenges of the solid-state transformer (SST) lies in the implementation of the dc–dc stage. In this paper, a quadruple-active-bridge (QAB) dc–dc converter is investigated to be used as a basic module of a modular three-stage SST. Besides the feature of high power density and soft-switching operation (also found in others converters), the QAB converter provides a solution with reduced number of high-frequency transformers, since more bridges are connected to the same multiwinding transformer. To ensure soft switching for the entire operation range of the QAB converter, the triangular current-mode modulation strategy, previously adopted for the dual-active-bridge converter, is extended to the QAB converter. The theoretical analysis is developed considering balanced (equal power processed by the medium-voltage (MV) cells) and unbalanced (unequal power processed by the MV cells) conditions. In order to validate the theoretical analysis developed in the paper, a 2-kW prototype is built and experimented. [ABSTRACT FROM PUBLISHER]

A family of bidirectional switched-capacitor (SC) converters with high-gain ratio of any positive integer is proposed in this paper for distributed energy resources applications. As compared with other existing SC converters achieving a same conversion gain, the main advantages of the proposed converters are that they require a relatively lower number of switches and capacitors, have a relatively lower switch's and capacitor's stress, and that their associated driver circuits are simpler to realize. Importantly, with the achievable conversion ratio being flexible and that the input and output of the proposed converters are of common ground, the proposed converters are widely suitable for many applications. Moreover, as the proposed converters do not possess magnetic component or any component that can severely degrade the converters’ performance at high temperature, they are especially useful for high-temperature applications. Besides, the proposed converters are capable of delivering bidirectional power, which is a key requirement for emerging applications with battery storages. Different aspects of the proposed converters, including a simple auxiliary power supply circuit for the MOSFETs’ drivers, will be discussed in this paper. A nine-time SC converter prototype that operates with 20-V input voltage, 100-W output, and at 75 kHz, is constructed and tested. Experiment results show that the maximum efficiency achievable with this prototype is over 98% (without driver's loss) and the efficiency over the entire load range between 25 and 100 W is over 95.5% including the driver's loss. The output voltage ripple of the SC converter is less than 1%. When the SC converter is open-loop controlled, the load voltage regulation is relatively well kept at less than 5% between full load and no load conditions. [ABSTRACT FROM PUBLISHER]

This paper presents a pulse width modulation (PWM) technique for the minimization of the leakage current in the grid-connected/stand-alone transformerless photovoltaic (PV)-cascaded multilevel inverter (CMLI). The proposed PWM technique is integrated with the MPPT algorithm and is applied to the five-level CMLI. Furthermore, using the proposed PWM technique the high-frequency voltage transitions in the terminal and common mode voltages are minimized. Thus, the proposed PWM technique minimizes the leakage current of the PV array and electromagnetic interference filter requirement in the system without addition of any extra switches. Furthermore, this paper also presents the analysis for the terminal voltage across the PV array and the common mode voltage of the inverter based on the switching function. Using the given analysis, the effect of the PWM technique can be analyzed, as it directly links the switching function with the common mode voltage and leakage current. Also, the proposed PWM technique requires reduced number of carrier waves compared to the conventional sinusoidal pulse width modulation technique for the given CMLI. Complete details of the working principle and analysis with the support of simulation and experimental results of the proposed PWM technique are presented in this paper. [ABSTRACT FROM PUBLISHER]

This paper proposes a dual-space vector control scheme for the open-end winding permanent magnet synchronous motor (OEW-PMSM) drive fed by the dual inverter with a single dc supply. Potential zero-sequence current in the open-end winding drive system has to be considered since it causes circulating current in the winding and leads to high current stress of power semiconductor devices and high losses. Zero-sequence current in open-end winding ac motor drives is usually caused by the zero-sequence voltage, and therefore switching combinations which do not produce zero-sequence voltage are used to synthesize the reference voltage in existing methods. But even so, the zero-sequence voltage can also be produced by the dead time of the inverter. In order to suppress zero-sequence current in the OEW-PMSM drive, a dual-space vector control scheme is proposed and a novel dual-inverter space vector pulse width modulation (PWM) with the zero-sequence voltage reference is employed to regulate system zero-sequence voltage in this paper. Compared with existing dual inverter PWM strategies, the novel algorithm build a regulation mechanism for the zero-sequence voltage. The proposed method is compared with the conventional vector control by simulations and experiments, and the results shown that the proposed scheme can suppress zero-sequence current effectively. [ABSTRACT FROM AUTHOR]

In this paper, a new structure for symmetric and cascade multilevel converter is presented. This structure requires the least power electronic components, gate driver circuits, power diode, and dc voltage source. The number of output levels is high. Reduction of the number of power electronic switches against voltage levels is an important factor in multilevel converters due to safety in switches, circuit size, cost, installation area, and complexity in control. To maximize the number of output level in the proposed optimized structure in order to attain different goals, such as reduction of stress on switches, the result of comparing the proposed structure and other structures present. The proposed method is robust against the switching faults in multilevel converter for dc source and the equipment. The simulation and experimental results presented in this paper show the performance of the proposed method. [ABSTRACT FROM AUTHOR]

The large number of semiconductors typically implemented in multilevel converters generates large stray inductances in their commutation loops. As a consequence, high-voltage overshoots appear in the semiconductors during commutation which may limit the operation of the converter. The paper analyzes these overvoltages in the five-level active neutral-point-clamped (5L­ANPC) converter, one of the most popular five level converters and employed by ABB in its ACS­2000 drive. Experimental results show overvoltages almost three times higher than those corresponding to a two-level converter. In order to overcome this problem, the paper presents a new 5L­ANPC with the same characteristics (number of semiconductors, output waveform, switching frequency, efficiency, etc.), but with smaller overvoltages. This is achieved by adding some small capacitors to the busbar that behave like lossless snubbers but with a much simpler implementation. The experimental results illustrate the working principle of these capacitors and demonstrate the reduction of the overvoltages. As a result, the new converter can reach a higher output current or speed-up the commutations reducing, therefore, the losses and increasing the efficiency compared with the previous 5L­ANPC. [ABSTRACT FROM AUTHOR]

Resistive switching memory (RRAM) features many optimal properties for future memory applications that make RRAM a strong candidate for storage-class memory and embedded nonvolatile memory. This paper addresses the cycling-induced degradation of RRAM devices based on a HfO2 switching layer. We show that the cycling degradation results in the decrease of several RRAM parameters, such as the resistance of the low-resistance state, the set voltage V\mathrm{ set} , the reset voltage V\mathrm{ reset} , and others. The degradation with cycling is further attributed to enhanced ion mobility due to defect generation within the active filament area in the RRAM device. A distributed-energy model is developed to simulate the degradation kinetics and support our physical interpretation. This paper provides an efficient methodology to predict device degradation after any arbitrary number of cycles and allows for wear leveling in memory array. [ABSTRACT FROM AUTHOR]

In this paper, the Z-source converter is introduced to power factor correction (PFC) applications. The concept is demonstrated through a wireless power transfer (WPT) system for electric vehicle battery charging, namely Z-source resonant converter (ZSRC). Due to the Z-source network (ZSN), the ZSRC inherently performs PFC and regulate the system output voltage simultaneously, without adding extra semiconductor devices and control circuitry to the conventional WPT system such as conventional PFC converters do. In other words, the ZSN can be categorized as a family of the single-stage PFC converters. In addition, the ZSN is suitable for high-power applications since it is immune to shoot-through states, which increases reliability and adds a boost feature to the system. The ZSRC-based WPT system operating principle is described and analyzed in this paper. Simulations and experimental results based on a 1-kW prototype with 20-cm air gap between the system primary and secondary sides are presented to validate the analysis and demonstrate the effectiveness of the ZSN in the PFC of the WPT system. [ABSTRACT FROM PUBLISHER]

Magnetically coupled impedance-source (MCIS) networks are recently introduced impedance networks intended for various high-boost applications. It employs coupled magnetic in the circuit to achieve higher voltage gain. Various MCIS networks have been proposed in the literature for myriad applications; however, due to effective role of system modeling in the closed-loop controller design, this paper is allocated to small-signal modeling and analysis of MCIS converters. The modeling is performed by means of the circuit averaging and averaged switch technique. A generalized small-signal derivation is demonstrated for pulse width modulation (PWM) MCIS converters and it is shown that the derived transfer functions can simply be applied to Y-source, Γ-source, and T-source impedance networks. Various transfer functions for capacitor voltage, output voltage, magnetizing current, input and output impedance are derived and have been validated through frequency and dynamic responses of computer simulation results. In addition, a comprehensive analysis has been done for all mentioned PWM MCIS converters regarding their circuit parameters. Furthermore, the effect of considering the equivalent series resistances of capacitor and inductor on the stability margin of MCIS converters is revealed in this paper. Finally, in order to validate the derived transfer functions and to consolidate the perfumed analysis, experimental results are presented for all mentioned MCIS converters. [ABSTRACT FROM PUBLISHER]

Based on the Z-source inverter, this paper proposes a novel commutation torque ripple reduction strategy for brushless DC motor (BLDCM). The proposed strategy employs the same modulation mode in both the normal conduction period and the commutation period, and the commutation torque ripple is reduced by regulating the shoot-through vector and active vector duty cycles. The proposed detection method acquires the end point of commutation by comparing the clamped terminal voltages with reference zero level, and the signal-noise-ratio of the detection is improved by avoiding the attenuation of the terminal voltages. Furthermore, a certain pulse width of the shoot-through vector can not only reduce the commutation torque ripple but also provide a new opportunity to detect the end point of commutation. Moreover, Z-source inverter provides the buck–boost ability for BLDCM drive system, then the dc voltage utilization can be improved, and the safety of the drive system can also be improved. In addition, this paper analyzes the terminal voltages during each vector. The experimental results verify the correctness of the theories and the effectiveness of the proposed approach. [ABSTRACT FROM PUBLISHER]

Various magnetically coupled impedance source (MCIS) networks have been proposed in the literature for increasing voltage gain and modulation index simultaneously while reducing the number of passive components used in the converter. However, applications of such networks have been limited by their discontinuous currents drawn from the sources and/or high stresses experienced by their components. This paper thus proposes three new MCIS networks named, respectively, as quasi-Y-source, quasi-Γ-Z-source, and quasi-T-source or quasi-trans-Z-source networks. These new networks inherit all advantages of the existing MCIS networks. In addition, they demonstrate advantages like continuous input currents, reduced source stresses, and lower component ratings that are not achievable by other existing networks. Further, dc-current-blocking capacitors used in the networks help to avoid saturation of magnetic core. Derivations of all two-winding MCIS networks, including existing and new networks, from the generalized three-winding MCIS networks are then systematically illustrated, before comparing them. Operational principles, mathematical derivations, simulation, and experimental results of all studied networks have been presented in the paper. [ABSTRACT FROM PUBLISHER]

This paper proposes an active resonance circuit based on multiple series gaps (MSG) with voltage-dividing network and self-charging trigger device. The working principle of active resonance circuit, MSG, and triggering device is described in detail. To determine the optimal parameter setting of MSG, the effects of the voltage frequency, equalizing resistance, and voltage-dividing capacitance on the voltage distribution of MSG are analyzed by simulation. To realize the interrupting process of short fault current and determine the operation requirements of the main devices of precharge direct current (dc) circuit breaker, a simulation model of interrupting short fault current is performed. Furthermore, an experiment of four-series gaps is presented to verify the turn-on characteristic of the MSG and an experiment of artificial current zero is set up to testify the feasibility of the active resonance circuit. The simulation and experimental results show that the active resonance circuit proposed in this paper can generate an artificial zero current and is suitable for precharge dc circuit breaker. [ABSTRACT FROM AUTHOR]

Bipolar junction transistors (BJTs) have been widely studied and used in nanosecond high-voltage pulse generators due to the advantages of fast switching speed and high repetitive frequency. Usually the Marx-type circuit is used to raise the peak value of output pulses. In this paper, a traditional BJT-Marx circuit using charging resistors is analyzed theoretically and experimentally. Based on the results, the structure of a circuit is changed to decrease the isolation voltage across the resistors, and diodes are used to replace charging resistors to block capacitors discharging to resistors. Experimental results showed that the three Marx generators proposed in this paper output pulses with higher voltage amplitude, and the last improved circuit outputs pulses with faster fall times at a higher efficiency. [ABSTRACT FROM AUTHOR]