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The number of applicable carrier-based pulsewidth modulation (PWM) patterns increases with the growth of output levels in scalable multilevel topologies, such as active-neutral-point-clamped (ANPC) converters. Therefore, it is hard to optimize PWM for such topology, especially with large output levels. In this paper, a simplified and modular carrier-based PWM design approach for multilevel ANPC converters is proposed. Inspired by the decomposition theory, the topology decomposition is introduced in this paper to decompose an N-level ANPC converter into low-level subtopologies. Then, the complete set of applicable PWM patterns is derived based on ANPC operation principles, which makes it possible to optimize the performance based on the various requirements in applications. Meanwhile, the carrier-based PWM is implemented through the utilization of subtopologies with low-level modulation schemes, such that the design process of carrier-based PWM is greatly simplified and modularly realized. Both the complete PWM patterns and PWM design examples with experimental results of several ANPC converters are provided to show the feasibility and modularity of the proposed method. [ABSTRACT FROM AUTHOR]

The use of electronic equipment and other dc-compatible appliances in homes and offices is increasing at a very fast rate, as well as the distributed generation of energy. These two statements will most likely trigger, in a near future, the adoption of district-scale dc grids, connecting dc microgeneration plants and consumers, in an effort to cut the number of conversion steps required to deliver power to dc appliances. DC–DC converters will be fundamental in these systems, allowing the establishment of several voltage levels. The reliability of these converters plays a critical role, ensuring service continuity of the loads connected to them. With the increment of reliability in mind, this paper proposes a simple yet effective open-circuit fault diagnostic method suitable for interleaved dc–dc boost converters, but equally functional for other dc–dc converter topologies. The improvements introduced in this paper greatly simplify the diagnostic action, while making the correct diagnostic of faults independent of the switching duty cycle. Moreover, an alternative reconfiguration scheme is proposed to mitigate the adverse impacts of such faults. To prove the effectiveness of these strategies, a three-phase interleaved boost converter prototype was used in the experiments. [ABSTRACT FROM AUTHOR]

Reduced switch active phase converters (APC) are cost-effective solutions for running three-phase loads from single-phase grids. This paper proposes a novel auxiliary-capacitor-based APC (AC-APC) for this application. The combination of the topological location of the auxiliary capacitor and the control of the AC-APC reduces current stress on the semiconductor devices. In this paper, a selection criterion for the optimal auxiliary capacitor value is formulated to reduce the device currents in such a way that the overall efficiency is enhanced. This paper presents a comparative analysis of converter volt-ampere (VA) rating and device power loss for conventional H-bridge active front-end and inverter-based topology, APC, and AC-APC. To evaluate the efficacy of the proposed AC-APC, an experimental study is conducted on the APC and the AC-APC feeding a 3-hp three-phase induction motor. At a full load of $\text{2.5}\,\text{kW}$ and $\text{0.8 } \text{power factor}$ , the measured maximum efficiency of the AC-APC is $2\%$ higher than that of the APC. Analytical evaluation of converter currents and device power loss are in close agreement with experimental observations. [ABSTRACT FROM AUTHOR]

This paper presents a balancing algorithm for the so-called Director Switch, a controlled, reverse conducting, self-powered, high-voltage switch, using series-connected insulated gate bipolar transistors (IGBTs). This is a key component on two new voltage-source, high-voltage direct current (HVDC) converter topologies. These, which promise efficiency, cost, and size reductions, are an alternate arm converter and a series bridge converter. One of the main design challenges of the director switch is how to supply the IGBT gate drivers, and other auxiliary electronics while overcoming the high-voltage insulation barrier to ground level. In this paper, this is achieved by using the energy stored in a capacitive clamp snubber circuit, which also helps with the overvoltage mitigation during rare hard-switching events. However, the clamp capacitor and by proxy the IGBT voltages become highly unbalanced during operation, compromising the integrity of the switch. This paper presents a balancing strategy that consists in applying a controlled delay in the switching of the IGBT levels, in a way that forces a voltage balance on all the switch levels. The paper explains the unbalance. Then, the balancing strategy is explained and validated on simulation and on a high-voltage experimental rig, on switches comprising two and three series-connected IGBTs, respectively. [ABSTRACT FROM AUTHOR]

This paper proposes a new class of topologies of single-stage high-frequency ac-link power converters, which is capable of providing both voltage step up/down within a wide frequency and voltage ranges. The proposed family, which supports bidirectional power flow, can interface various single/multi-port dc and/or single/multi-phase ac systems to provide dc–dc, dc–ac, ac–dc, or ac–ac power conversion. In this family of converter, which offers a very modular structure, a small inductor that forms the link exchanges power entirely or partially between the source and load. The proposed family can function in buck, boost, and/or buck–boost modes of operation, and a combination of these modes of operation is also feasible. In comparison to the parallel inductive four-quadrant link converters, the proposed family features a significantly reduced link peak current, reduced switch ratings, and reduced total number of power switches. These features enhance the efficiency, reduce the total cost, and increase the power density of the system. In order to further improve the overall efficiency of the system, minimize the current/voltage stress over all utilized semiconductor devices, and lower electromagnetic interference (EMI), a small capacitor is placed in parallel with the link inductor to realize soft-switching operation for the proposed configurations. Moreover, the proposed converters have the potential to incorporate a lightweight single-phase high-frequency transformer for electrical isolation. The proposed circuit topologies prevent reverse recovery issues and eliminate losses corresponding to body diodes of power switching devices via utilizing power switches in conjunction with external fast recovery diodes. The proposed family offers a very high level of reliability owing to its immunity from short circuit of input and output terminals and open circuit of the link inductor, which may occur in other power converters due to commutation problem resulting from a short deadtime or an overlap time between switches, unwanted control command, delay in electronic circuits, or EMI noise's misgating on or off, in addition to the absence of electrolytic capacitors in the power circuit. A control approach is also developed to regulate input and output currents in one stage of power conversion. A detailed theoretical analysis, operation, design methodology, and control strategy of the proposed family are provided in this paper, and the effectiveness and performance of the proposed converter family are verified via simulation results and experimentally. [ABSTRACT FROM AUTHOR]

In low-power applications of photovoltaic (PV) systems, the transformerless grid-connected inverters have been preferred to increase the efficiency and reduce the cost, size, and power losses when they are compared to the ones with the transformer. A transformerless single-phase inverter topology with a single dc-link capacitor for the grid-connected PV systems is proposed in this paper. The proposed inverter has been simulated by using a cooperation process of the MATLAB and SPICE package programs and it has been implemented for experimental verification. The proposed inverter reduces the high-frequency common-mode leakage current caused by parasitic capacitances of PV panels, whereas it is controlled with the unipolar sinusoidal pulsewidth modulation. Also, the results show that the common-mode voltage remains constant. The efficiency of the proposed inverter has been compared to that of the most common topologies having the dc-link decoupling during the zero voltage states. This paper is accompanied by a video file demonstrating the power loss distribution in the inverter. [ABSTRACT FROM AUTHOR]

In this paper, a new class of bidirectional partial-resonance power converters is presented. The proposed family can be configured to interface single- or multi-port dc, single- or multi-phase ac systems at input-side and/or output-side. The proposed family offers a very modular structure, which can lead to cost reduction from a common designed module. In this converter, which accomplishes power conversion in a single stage, a small inductor placed in series with the input and output switch-bridges forms the link. This small link inductor is responsible for transferring power between different ports of the system. The proposed topologies can operate in buck, boost, and buck–boost modes of operation to step up and/or step down the voltage. In buck–boost mode of operation, the converter is controlled such that the power is entirely transferred through the link inductor; whereas, in buck or boost modes of operation only a fraction of the power is transferred through the link inductor, and the remaining power is directly transferred from input phases to the output phases. Galvanic isolation, which is typically a prominent factor contributing to power density of a converter, can be provided by means of a compact and lightweight single-phase high-frequency transformer added to the link. In comparison with earlier generations of partial-resonance inductive-link power converters, in the proposed converter, the level of link peak current and consequently power-loss, as well as voltage and current stress of switches are dramatically decreased. A very small film capacitor can be placed in parallel with the link inductor to facilitate zero-voltage-switching (ZVS) operation for all the switches/diodes. Apart from increasing the overall efficiency, minimized dv/dt stress and improvement in power density are achieved by adding the link capacitor. The proposed converter employs four-quadrant switches, i.e., bidirectional-conducting bidirectional-blocking switches, and charges the link inductor in both positive and negative directions in each cycle. In view of this, better utilization of the link inductor and lower total harmonic distortion (THD) are offered. Furthermore, two distinct switching algorithms are developed for the proposed family of converters. In this paper, the detailed behavior of the proposed family is investigated analytically, and simulation and experimental results are presented to evaluate the performance and effectiveness of the proposed converter. A low-power proof-of-concept prototype with input voltage of 59 V/161 V, load voltage of 178 V/73.5 V, maximum switching frequency of 4.9 kHz/3.65 kHz at 215 W/450 W in a step-up/step-down operation is considered for the experimental verification. [ABSTRACT FROM AUTHOR]

This paper describes a dc-link voltage control method of a single-phase back-to-back cascaded H-bridge inverter (SBCI) for a medium-voltage motor drive system. The main advantage of the SBCI topology over the conventional regenerative cascaded H-bridge topology with a three-phase active front-end (AFE) is a simple system structure, which is composed of an input transformer, a power cell, a current sensor, etc. However, the challenging points of the SBCI are larger voltage ripple in the dc-link capacitor and imbalance of dc-link voltages of each phase. The asymmetric dc-link voltage of each power cells could cause unstable operation such as over-modulation due to the lack of the dc-link voltage of a particular phase and result in over-voltage or under-voltage faults. In this paper, the control strategy of the dc-link voltage for the SBCI that uses the negative-sequence voltage of the converter is described. The proposed control method is verified with a computer simulation whose target is a 6.6-kV–1.25-MW medium-voltage drive system. Also, through the experimental setup with the prototype SBCI whose power rating is 16.2 kVA, the dc-link voltage of each AFE has been controlled within a 0.5% error of its reference value at the full load. [ABSTRACT FROM AUTHOR]

Data center networks typically adopt multi-rooted tree topologies to provide high bisection bandwidth. Various fine-grained load balancing schemes have been proposed to split flows across multiple paths. However, data center networks suffer from many uncertainties such as highly dynamic traffic. These uncertainties easily make network become asymmetric, resulting in significant packet reordering. Unfortunately, existing solutions passively deal with packet reordering based on a threshold and hardly adapt to asymmetric networks because of lacking the explicit reordering feedback. These solutions either fail to quickly respond to packet loss or cause unnecessary fast retransmission, which reduces link utilization and increases flow completion time. In this paper, we propose a fine-grained load balancing scheme RMC to eliminate the impact of packet reordering and handle uncertainties in asymmetric networks. To avoid unnecessary fast retransmission, the switch proactively identifies reordered packet according to local queue length and global path latency. Furthermore, we employ a coding technique with redundancy optimization to reduce long-tailed flow completion time under network asymmetry. Through a series of large-scale NS2 simulations and testbed experiments, we demonstrate that RMC effectively avoids unnecessary fast retransmission under different network scenarios and reduces flow completion time by up to 72% compared with state-of-the-art schemes. [ABSTRACT FROM AUTHOR]

This paper presents an isolated single-stage on-board electric vehicle charger without an intermediate DC-link. Based on an isolated current-source topology, the converter features soft-switching in semiconductors regardless of load variation for the full AC line voltage range. Moreover, it requires no external snubber or clamp circuits. The power factor correction and voltage regulation are provided by a relatively simple phase shift modulation, while the amount of circulating energy is kept at minimum. The charger is distinguished by its efficiency characteristic – the maximum is achieved in the constant power charging mode. The control method, component stresses, and design constraints of the topology are analyzed. The concept is verified using a 3 kW experimental SiC-based prototype, which reaches a peak efficiency of 96.4%. Moreover, the charger has demonstrated efficiencies above 95% with the THD of 4.1% when operating in constant power mode at the maximal power. [ABSTRACT FROM AUTHOR]

This paper presents a new single-source three-phase seven-level inverter with an inherent three-time voltage boosting capability for medium-voltage applications. The proposed topology is comprised of series connection of two switched-capacitor (SC) networks with an added half-bridge module per phase. Each of such integrated SC networks requires a single capacitor associated with three active power switches. The three-time voltage boosting feature of the proposed topology can reduce the dc-link voltage requirements by 50% in comparison to the traditional neutral point clamped (NPC), flying capacitors, active NPC (ANPC), hybrid clamped ANPC, and cascaded H-bridge topologies, and 75% to advanced ANPC topologies. It can also reduce the number of required switches and capacitors as well as their voltage stresses compared to those state-of-the-art topologies reported in the literature. By integrating “n” number of added SC networks in the proposed seven-level basic topology, the number of output voltage levels can be extended to 2n+3 per phase. A finite control set model predictive control algorithm is also derived to control the converter in both the active and reactive power exchanges modes without distorting the generated grid current quality. The capacitor voltage balancing is inherent in the proposed topology, and thus, there is no need for any additional voltage balancing circuit, which further reduces the control complexity. The performance of the proposed topology and its control algorithm are validated by several measurement results. [ABSTRACT FROM AUTHOR]

This paper introduces a network topology identification (TI) method based on deep neural networks (DNNs) for online applications. The proposed TI DNN utilizes the set of measurements used for state estimation to predict the actual network topology and offers low computational times along with high accuracy under a wide variety of testing scenarios. The training process of the TI DNN is duly discussed, and several deep learning heuristics that may be useful for similar implementations are provided. Simulations on the IEEE 14-bus and IEEE 39-bus test systems are reported to demonstrate the effectiveness and the small computational cost of the proposed methodology. [ABSTRACT FROM AUTHOR]

In this paper, we propose a topology-cognizant optimal power flow (OPF) paradigm with additional safety constraints for multi-terminal direct current (MTDC) grids. The resulting formulation is concerned with the optimization of controller set-points, i.e., voltage and power levels at each bus, and the switching status of transmission lines that collectively referred to as grid topology. A pair of additional safety constraints are integrated into the problem formulation to prevent voltage violations caused by power fluctuations in between two controller set-point updates. Searching for a grid topology that offers more efficient operation leads to a mixed-integer nonlinear program (MINLP) which is computationally challenging due to: i) Non-convex power flow equations, (ii) Non-convex converter loss equations, and iii) Binary variables accounting for the operational status of transmission lines. Non-convexities of power flows and converter loss equations are tackled by means of a mixed-integer second-order cone programming (MISOCP) relaxation, while the optimal switching status of transmission lines are determined via a branch-and-bound search. Numerical results for the modified IEEE 14, 30, and 57-bus systems are used to verify the merits of the proposed method. Furthermore, this method is experimentally validated using the CIGRE B4 DC grid benchmark in a real-time hardware-in-the-loop platform. [ABSTRACT FROM AUTHOR]

Conventionally, the converter of switched reluctance motor (SRM) is fed by the uncontrollable diode bridge rectifier (DBR), which leads to a low grid-side power factor (PF) and high current total harmonic distortion (THD). In this paper, an alternative solution for the grid-connected high-speed SRM drive system with improved PF is proposed. In the proposed drive system, the three-level active front end (AFE) is connected in cascade with the midpoint converter for SRM operation. A centralized strategy, which controls the AFE and SRM together, is proposed to govern the motor speed and grid-side PF by regulating the real power and reactive power of the system, respectively. Specifically, the real power, reactive power, and the voltage balancing of split capacitors are controlled by the model predictive directed power control (MP-DPC) algorithm, which significantly reduces the control complexity and guarantees the fast dynamic response. Consequently, satisfying speed regulation, high PF, low current THD, and bi-directional power-transfer capability are achieved. An idea-proofed testbench is constructed in laboratory, and the applicability of the proposed drive system is verified by a series of experimental results. [ABSTRACT FROM AUTHOR]

Network topology identification (TI) is an essential function for distributed energy resources management systems (DERMS) to organize and operate widespread distributed energy resources (DERs). In this paper, discriminant analysis (DA) is deployed to develop a network TI function that relies only on the measurements available to DERMS. The propounded method is able to identify the network switching configuration, as well as the status of protective devices. Following, to improve the TI resiliency against the interruption of communication channels, a quadratic programming optimization approach is proposed to recover the missing signals. By deploying the propounded data recovery approach and Bayes’ theorem together, a benchmark is developed afterward to identify anomalous measurements. This benchmark can make the TI function resilient against cyber-attacks. Having a low computational burden, this approach is fast-track and can be applied in real-time applications. Sensitivity analysis is performed to assess the contribution of different measurements and the impact of the system load type and loading level on the performance of the proposed approach. [ABSTRACT FROM AUTHOR]

Isolated, zero-voltage-switching dc–dc converter topologies represent attractive solutions in the continuous run toward higher switching frequencies, allowing more compact power supplies. Among them, the asymmetrical half-bridge flyback converter represents an interesting option, featuring simple duty-cycle control at constant switching frequency, as opposed to the popular LLC converter. The majority of papers dealing with this topology consider an approximated voltage gain similar to that of an isolated buck converter operating in continuous conduction mode, i.e., proportional to the duty cycle and, practically, load independent. On the contrary, the true voltage gain is nonmonotonic at high duty-cycle values. Anytime the converter is designed for a resonant operation, as is advisable to eliminate any reverse recovery problem of the rectifier diode, the voltage gain not only increases, but also becomes a function of the switching frequency. This article investigates the converter's voltage gain in detail, deriving a theoretical framework capable of capturing its real behavior and dependencies. The proposed analytical model has been verified through simulations as well as experimental measurements taken on a 160-W prototype working at 400 kHz. [ABSTRACT FROM AUTHOR]

DC transformer is an essential equipment for formation of multi-voltage-level DC grid. This paper proposes a novel non-isolated Boost-type alternate arm DC transformer (Boost-AADCT) for medium- and high-voltage level DC grid application. The Boost-AADCT is comprised of three submodule-cascaded arms, two thyristor-cascaded director switches, and two buffer capacitors. Bidirectional power transmission is achieved by alternatively charging and discharging of the intermediate arm following the Boost principle, while the pulsating power component caused by intermittent transmission is actively smoothened by grid-side buffer subcircuits formed by the buffer capacitors and grid-side arms. The active power buffering method increases the tolerance range of voltage ripple of the buffer capacitor, and the required energy storage capacity is resultantly reduced. Circuit configuration, operation principle, and mathematical model are first introduced. Then, the control strategy is proposed, the main circuit parameters are designed, and bidirectional fault-blocking capability is analyzed. Comparison with other DC-DC converters shows that the Boost-AADCT significantly reduces the requirement of semiconductors and has relatively lower synthetic cost. At last, performance of the Boost-AADCT and the proposed control strategies are evaluated by simulation tests conducted in MATLAB/Simulink environment. [ABSTRACT FROM AUTHOR]

The hybrid modular multilevel converter (HMMC), consisting of half-bridge and full-bridge submodules (SMs), has become a competitive topology due to the DC fault ride-through capability (FRTC). Redundancy schemes need to be employed to improve the reliability, including fixed-level and voltage-sharing active schemes, as well as passive scheme. However, different schemes affect reliability differently, which entails specific models. The contributions of this paper involve that analytical reliability models of HMMCs are proposed with considerations of voltage stress in active scheme, as well as imperfect bypass switch in passive scheme, and the comparison of different schemes is conducted to help the redundancy design. The reliability of HMMCs is divided into basic and extra components by the requirement of FRTC, which are modeled through the Markov chain and iteration method. A case study is conducted to validate the feasibility and accuracy of the proposed models, and the reliability analysis is presented, together with comparisons of different redundancy schemes. The results illustrate that reliability improvements of both fixed-level mode and passive scheme are prone to suffer saturation effect with the increase of redundant half-bridge SMs, which may even cause reliability decline in voltage-sharing mode. [ABSTRACT FROM AUTHOR]

In the domain of data parallel computation, most works focus on data flow optimization inside the PE array and favorable memory hierarchy to pursue the maximum parallelism and efficiency, while the importance of data contents has been overlooked for a long time. As we observe, for structured data, insights on the contents (i.e., their values and locations within a structured form) can greatly benefit the computation performance, as fine-grained data manipulation can be performed. In this paper, we claim that by providing a flexible and adaptive data path, an efficient architecture with capability of fine-grained data manipulation can be built. Specifically, we design SOM, a portable and highly-adaptive data transmission network, with the capability of operand sorting, non-blocking self-route ordering and multicasting. Based on SOM, we propose the processing-in-transmission architecture (PITA), which extends the traditional SIMD architecture to perform some fundamental data processing during its transmission, by embedding multiple levels of SOM networks on the data path. We evaluate the performance of PITA in two irregular computation problems. We first map the matrix inversion task onto PITA and show considerable performance gain can be achieved, resulting in 3×-20× speedup against Intel MKL, and 20×-40× against cuBLAS. Then we evaluate our PITA on sparse CNNs. The results indicate that PITA can greatly improve computation efficiency and reduce memory bandwidth pressure. We achieved 2×-9× speedup against several state-of-art accelerators on sparse CNN, where nearly 100 percent PE efficiency is maintained under high sparsity. We believe the concept of PIT is a promising computing paradigm that can enlarge the capability of traditional parallel architecture. [ABSTRACT FROM AUTHOR]

This paper investigates the cluster event-triggered tracking cooperative and formation control for multivehicle systems with nonlinear vehicles dynamics under switching directed communication topologies and safety missions. By employing the cluster event-triggered control strategy, the assumption of continuous feedback control gains and the condition of information exchange limited in a small domain can be relaxed. By constructing an appropriate tracking cooperative condition, a class of cluster event-triggered tracking cooperative control law with an extended magnification region condition is proposed based on bounded parameters and intermittent event samples. When the safety tasks are activated, it is displayed in terms of linear matrix inequalities that the tracking cooperative control for closed-loop multivehicle systems subject to nonlinear vehicles dynamics will be achieved, if the constructed sampling condition and the dwell time constraint of switching communication scenarios can be held. Furthermore, the proposed method is extended to formation control problem for the multivehicle systems. Simulations are presented to demonstrate the effectiveness of the proposed approaches. [ABSTRACT FROM AUTHOR]

This paper proposes a capacitor voltage regulation method for the dual converter with a floating bridge for aerospace applications. This topology has previously been reported, but with a constrained voltage utilization factor due to the need for capacitor voltage regulations. In this paper, the effect of switching states on the voltage variation of capacitor is quantitatively modeled and an enhanced space vector modulation scheme with current feedback is proposed to achieve an active control of the floating capacitor voltages. This proposed method also allows further exploitation and utilization of converter voltage. The relationship between the allowed modulation index of dual converter and load power factor is obtained and expressed using a fitted polynomial equation. The advantages of the proposed method include boosted voltage utilization and superior performance in term of capacitor voltage balance. These advantages have been proven through simulation and experimental results on RL loads as well as with an open-end winding induction motor. The proposed modulation scheme can boost the converter voltage utilization by at least 10% while achieving full four-level operation. More importantly, the higher available voltage allows extending the constant torque region of the motor, the further beginning of field weakening operation could be postponed. [ABSTRACT FROM AUTHOR]

A trinary multilevel converter uses a few heterogeneous H-bridge submodules (SMs) to synthesize an output voltage with multiple levels. Two major limitations of this converter are that it needs multiple dc sources and it cannot operate under pulsewidth modulation (PWM). This paper addresses these limitations by adding a low-voltage H-bridge SM to this converter and proposing a new switching algorithm. The resulting PWM-based asymmetric cascaded H-bridge converter uses only one dc source and synthesizes a high-quality output voltage. This improved converter can be a potential choice for real and reactive power support in power system applications. This paper also proposes methods for stability analysis and design of this converter. Experimental case studies evaluate the performance of the proposed converter for both standalone and grid-connected modes of operation. [ABSTRACT FROM AUTHOR]

This paper studies the driving of white light emitting diodes (LEDs) from very low voltages in the 1.2 to 2 V range. The proposed idea is based on replacing the standard Schottky diode used in conventional converter topologies (i.e., buck, buck–boost, and boost) with an LED while shortcutting the output of the converter. In this configuration, the LED works both as the load and the rectifier diode of the converter, hence switching the LED at high frequencies (>100 kHz). Moreover, a thorough analytical study is carried out for the two topologies proposed in this paper, emphasizing in particular their static analysis and the obtaining of the boundaries between the different conduction modes. Finally, the idea is experimentally validated by means of the boost converter variation (i.e., the DL//S ac-LED driver). The DL//S ac-LED driver was also compared with a dc–dc boost converter, showing a better luminous efficacy while disposing of the Schottky diode and the output capacitor. The analysis was carried out when connected to a Li-ion battery using a simple control and integrated circuit for its development. [ABSTRACT FROM AUTHOR]

This paper presents research results of voltage gain number control methods of a power electronic resonant zero-current switching dc–dc switched-capacitor (SC) voltage multiplier (SCVM) in a topology with fault tolerance capability (FSCVM). The converters operated under the basic switching patterns are constant-voltage-gain dc–dc series-parallel resonant SC converters. However, this paper presents a method for the output voltage regulation by a special switching strategy. A variable voltage gain is made possible by selecting the number of active switching cells, using an appropriate control method. This creates a set of voltage ratio ranges. In addition, the proposed topology and method of control enable a fault-tolerant operation of the FSCVM under various failures of the device. The paper presents an analysis of the concept, simulation results and an experimental verification in a three-cell FSCVM dc–dc resonant boost converter operating at a 200-watt charge. Issues regarding the selection of components related to the problem of inrush currents that can occur during the voltage ratio increase are also analyzed in this paper, and the design for low inrush currents is demonstrated. [ABSTRACT FROM AUTHOR]

This paper proposes a new developed switched-capacitor converter to achieve high-voltage pulses with adjustable voltage level and frequency. The proposed topology generates repetitive high-voltage pulses by using low-voltage power supply with reduced number of components, including power semiconductors and capacitor. Therefore, a converter based on switched-capacitor units with high voltage gain and high efficiency can be achieved. Operation principles and design steps of the converter as well as comparative study with conventional converters are described in this paper. Finally, simulation and experimental results of a two-stage structure of the proposed circuit validate the operation principles and features of this topology. [ABSTRACT FROM AUTHOR]

A modular multilevel converter (MMC) is regarded as a promising topology in high-voltage direct current systems. However, the MMC consists of numerous submodules (SMs) and switching devices, which lead to a considerable switching loss, and increased cost and size of the heat sink. To mitigate these issues, this paper presents a novel modulation method composed of fundamental frequency modulation (FFM) and multicarrier-based sinusoidal pulsewidth modulation schemes. The main purpose of this modulation method is the reduction of switching loss while maintaining good harmonic performance. However, the FFM scheme leads to the unbalanced capacitor voltage of each SM in the MMC. Accordingly, this paper additionally proposes the rotation method and selective voltage balancing control for SMs to ensure effective performance of the method. Simulation and experimental results verify the effectiveness and performance of the proposed modulation scheme through switching loss and spectral analyses. [ABSTRACT FROM AUTHOR]

This paper presents two capacitor voltage balancing (CVB) strategies for modular multilevel converter (MMC) applications. Both balancing schemes are based on model predictive control and are designed to efficiently solve a constrained optimal control problem, where the predicted capacitor voltage errors are included in the cost function with the demanded output voltage of a cluster being forced through an equality constraint. The first method proposed in this paper computes specific modulation indexes for each module using the explicit solution of a relaxed version of the original optimization problem. The second approach proposed in this paper reduces the complexity of the original problem by linearizing the objective function and using an optimal sorting network based on a greedy algorithm to solve this approximation. Considering the structures of both solution approaches, they are integrated into modulation schemes based on phase-shifted and level-shifted pulsewidth modulation algorithms, respectively. Experimental results obtained from a nine-cell single-phase MMC prototype demonstrate the good performance achieved with the proposed methodologies, as well as the implementation simplicity offered by the proposed CVB algorithms. [ABSTRACT FROM AUTHOR]

This paper proposes a novel dc power electronic transformer (DCPET) topology for locomotive, ac/dc hybrid grid, dc distribution grid, and other isolated medium-voltage and high-power applications. Compared with conventional PET topology, the proposed DCPET has fewer power semiconductor devices and high-frequency isolation transformers, which can improve the power density and reliability. Fault handling or redundancy design can be achieved to further improve the reliability when some dc–dc modules break down. Also, input voltage sharing control can be omitted to simplify the control system and improve the stability. Meanwhile, soft switching is guaranteed for all the switches, which is beneficial to increase switching frequency and improve power density. In this paper, the principle, evolution, and control of the proposed DCPET are respectively presented and studied in detail. Finally, a prototype of the proposed DCPET is built and the experimental results verify the validity and superiority of the proposed topology. [ABSTRACT FROM AUTHOR]

Enhancement of dc bus voltage utilization for a five-level inverter with single dc source and capacitor-fed H-bridge (CHB) units is investigated in this paper. A carrier-based modulation technique is used for boosting the dc bus utilization, which is established by providing detailed mathematical analysis. The five-level inverter used here is realized by cascading a CHB unit to each phase of a three-level neutral point clamped inverter. The increase in dc bus voltage utilization owes to the pole voltage redundancies offered by CHB units. The floating capacitors of H-bridge units are balanced within a quarter fundamental cycle using the switching state redundancies of pole voltage levels. The aforementioned modulation technique allows the inverter to enhance the dc bus utilization from 0.577 $\text{V}_{\text{dc}}$ to 0.63 $\text{V}_{\text{dc}}$ under unity power factor. This enhancement is obtained in the linear modulation range without increasing the dc bus voltage, and thus, the inverter can operate without the presence of low-order harmonics in its phase voltages. The strength of this paper lies in its detailed mathematical analysis for finding out the limiting modulation index and power factor condition in the light of floating capacitor voltage balancing issue. Simulation as well as experimental verification of the modulation scheme is carried out on an induction motor drive under various operating conditions. It is shown that this carrier-based modulation technique is suitable for any single source inverter topology with one CHB unit per phase. [ABSTRACT FROM AUTHOR]

This paper presents a new six-level flying capacitor based (FC-based) multilevel converter with one dc source and the capability of operating in all power factors and modulation indexes. Multilevel converters with one dc voltage source are attractive in many applications as they do not need rather expensive and bulky multiwinding input transformer connection at the dc side. On the other hand, not all classic multilevel converters with one dc source can produce any desirable number of output voltage levels at all power factors and/or modulation indexes. In this paper, a hybrid structure is proposed in which six voltage levels can be realized at the ac terminals. The modulation technique and the control strategy for the FC voltage balancing are presented. To show the advantages of the proposed converter, different performance criteria, such as switch count and rating, the size of capacitors, switching frequency, and power losses, are compared with other existing six-level topologies. The results indicate that the proposed structure is superior to other six-level converters from different standpoints. Simulation results are used to further evaluate the performance of the proposed converter. A laboratory-type experimental setup is used to validate the theoretical results. [ABSTRACT FROM AUTHOR]

A single-stage three-phase ac–ac converter benefiting from a high-frequency alternating link voltage is proposed in this paper. In this converter, a very small film capacitor can transfer the energy from the input to the output, owing to the high-frequency alternating voltage of the link. This eliminates the need for large electrolytic capacitors that are typically used in dc-link ac–ac converters. Moreover, a compact high-frequency transformer at the link can replace the bulky low-frequency transformers, in case isolation is required. These features increase the power density as well as reliability of the proposed converter in comparison with the conventional dc-link converters. The number of required switches in the proposed converter is 12, which is less than the number of switches needed in matrix converters, leading to lower switching and conduction losses. Despite being single-stage, the proposed ac–ac converter is capable of both stepping up and stepping down the voltage and also frequency transformation. This eliminates the need for using cascaded power converters. In this paper, the operation principles of the proposed ac–ac converter are investigated, and variable switching frequency and fixed switching frequency control methods for operating this converter are introduced. The performance of the converter is verified through simulation and experiment. [ABSTRACT FROM AUTHOR]

In this paper, a new structure for a nonisolated boost dc–dc converter is proposed. The proposed converter generates higher voltage gain than some conventional nonisolated boost dc–dc converters. In this paper, the voltage and current equations of the elements and voltage gain in continuous conduction mode and discontinuous conduction mode are extracted. Then, the critical inductance converter is extracted and the current stresses in the switches are calculated. To achieve high voltage gain, a generalized structure based on the proposed structure generates for dc–dc converters. Meanwhile, the root mean square current relations of devices are obtained for an extended structure. Finally, the results of PSCAD/EMTDC software and laboratory prototype are used to reconfirm theoretical concept. [ABSTRACT FROM AUTHOR]

This paper proposes a novel method for instantaneous balancing of neutral-point (NP) voltages with stacked multilevel inverters (MLIs) for variable-speed drives. The stacked MLI uses series-connected dc sources and NPs (connecting points of dc sources) to obtain the desired levels. The balancing of NP voltages are obtained by using a low-voltage-capacitor-fed cascaded H-bridge (CHB) per phase of a symmetrical six-phase induction machine (IM), which ensures zero current drawn from NPs (at any given instant). Since no current is drawn from NPs, the single dc-link operation with stacked capacitors is also possible. The scheme is suitable for applications, where low-voltage dc sources and batteries are stacked to form a dc link. A variable-speed operation is done using a seven-level inverter scheme for a symmetrical six-phase IM, which is formed by three dc-link stacked capacitors cascaded with two low-voltage-capacitor-fed CHBs per phase. Furthermore, the method is extended for an open-end IM to obtain a seven-level common-mode eliminated space vector structure using a single dc link. The generalization of this method for any stacked $n$ -level inverter without NP voltage deviation is also presented in this paper. The experimental results and analysis are included to validate the proposed method. [ABSTRACT FROM AUTHOR]

Nonregenerative pulsewidth-modulated (PWM) rectifiers are increasingly being considered for applications, where the power flow is unidirectional, such as power supplies for telecommunications, X-ray, the machine-side converter for wind energy conversion systems, etc. They use fewer active switches, which increase their power density and reduce cost. This paper proposes a novel reduced switch topology for a multilevel (five-level or higher) nonregenerative PWM rectifier. It uses only four controlled switches and eight diodes per phase for a five-level rectifier. Half of the diodes are naturally commutated (zero current switching) at the line frequency, which reduces switching losses. This topology has several other advantages compared to similar topologies reported in the literature, such as minimum voltage stress across the devices, elimination of transient voltage-balancing snubbers, no extra hardware for balancing the flying capacitors, the dc-link mid-point voltage, etc. In this paper, switching cycle average modeling and the carrier-based modulation strategy for this rectifier are also presented to maintain a balanced dc link and to regulate flying capacitor voltages, while achieving unity displacement factor at the rectifier input terminals. The overall performance of the rectifier is verified by experimental results. [ABSTRACT FROM AUTHOR]

This paper presents a novel single-stage soft-switched high-frequency-link three-phase dc–ac converter topology. The topology supports unidirectional dc to ac power flow and is targeted for applications like grid integration of photovoltaic sources, fuel cell, etc. The high frequency magnetic isolation results in reduction of system volume, weight, and cost. Sine-wave pulsewidth modulation is implemented in dc-side converter. Though high-frequency switched, dc-side converter is soft switched for most part of the line cycle. The ac-side converter active switches are line frequency switched incurring negligible switching loss. The line frequency switching of ac-side converter facilitates use of high voltage blocking inherently slow semiconductor devices to generate high voltage ac output. In addition, a cascaded multilevel structure is presented in this paper for direct medium-voltage ac grid integration. A detailed circuit analysis considering nonidealities like transformer leakage and switch capacitances, is presented in this paper. A 6-kW three-phase laboratory prototype is built. The presented simulation and experimental results verify the operation of the proposed topologies. [ABSTRACT FROM AUTHOR]

Three-level neutral-point clamped voltage source converter (3L-NPC-VSC) is widely used in high-power and medium-voltage (MV) applications and the most used multilevel VSC topology. 3L-Active-NPC-VSC (3L-ANPC-VSC) was introduced to overcome the unequal losses distribution as main structural drawback of the 3L-NPC-VSC. During the switching event of semiconductor devices, the stray inductance takes a special role in the commutation path of the switching current. Mutual coupling inductance between the components participating in the commutation path has to be considered for a theoretical assessment of the total stray inductance of each commutation path. Besides, the measurement of the commutation path stray inductance has to be carried out during the turn-on of the semiconductor device, instead of during the turn-off, to consider the reverse blocking voltage of the opposite switching semiconductor device. This paper shows how a dual 3L-ANPC-VSC phase-leg has been carefully designed and assembled to build a ±10 MVAr five-level VSC for MV-static synchronous compensator applications. The minimization of the stray inductance, the equalization of the total switching power losses for all commutation paths and power density maximization with snubberless operation are within the main technical design requisites. On the basis of the theoretical analysis, the stray inductance of all the commutation paths has been extracted, considering mutual coupling effect, by means of three-dimensional finite-element-analysis simulations. Once the design concept is theoretically validated, the estimated values have been compared with the experimental results obtained from the performance of double-pulse tests for each commutation path. This paper presents, for the first time, all the analysis details of the 3L-ANPC-VSC commutation behavior using 4.5-kV and 1.5-kA trench high-voltage insulated-gate bipolar transistor modules. [ABSTRACT FROM AUTHOR]

This paper studies the optimal transmission switching (OTS) problem for power systems, where certain lines are fixed (uncontrollable) and the remaining ones are controllable via on/off switches. The goal is to identify a topology of the power grid that minimizes the cost of the system operation while satisfying the physical and operational constraints. Most of the existing methods for the problem are based on first converting the OTS into a mixed-integer linear program (MILP) or mixed-integer quadratic program (MIQP), and then iteratively solving a series of its convex relaxations. The performance of these methods depends heavily on the strength of the MILP or MIQP formulations. In this paper, it is shown that finding the strongest variable upper and lower bounds to be used in an MILP or MIQP formulation of the OTS based on the big- $M$ or McCormick inequalities is NP-hard. Furthermore, it is proven that unless $P=NP$ , there is no constant-factor approximation algorithm for constructing these variable bounds. Despite the inherent difficulty of obtaining the strongest bounds in general, a simple bound strengthening method is presented to strengthen the convex relaxation of the problem when there exists a connected spanning subnetwork of the system with fixed lines. With the proposed bound strengthening method, remarkable improvements in the runtime of the mixed-integer solvers and the optimality gaps of the solutions are achieved for medium- and large-scale real-world systems. [ABSTRACT FROM AUTHOR]

Multioutput converters with single input source are currently studied as an alternative to conventional dc–dc topologies in order to improve power density in low-power multiload applications. This paper reviews three different ways in which a boost topology can be customized to supply multiple outputs. The first way uses a charge-sharing approach using individual switches to distribute inductor energy to different capacitors. The second method of creating a multiport converter (MPC) combines two converters with similar front end to generate two outputs using only one controlled switch. Using this method, a boost converter can be combined with single–ended primary–inductor converter (SEPIC), Cuk, and current source converter topologies. The third method uses time multiplexing of switches to produce two regulated ports and is referred to as switched-boost action. This method uses relatively less number of switches and allows regulation and control of all the outputs. Practical utility of switched-boost action based MPC is reported in this paper. This switched-boost MPC is applied to a renewable power converter system to interface a solar panel, a battery, and home loads to produce a 12-V and a 48-V bus. The 12-V bus is interfaced to battery and capable of optimally charging the battery in constant current–constant voltage (CC-CV) mode. The converter is demonstrated to operate with solar panel as it supplies a 12-V battery and a 48-V load bus. When the solar power is not available, the converter automatically goes into a mode in which the 12-V battery supplies the loads on the 48-V bus. [ABSTRACT FROM AUTHOR]

This paper proposes a new dc–ac converter with a reduced number of semiconductor switches and gate drive and control circuit components. A salient feature of this inverter is its pure sinusoidal line-to-line voltages with no need for output filter. Also, the proposed inverter improves the voltage utilization factor of the input dc supply compared to the four-switch three-phase inverter (first best topology in the literature from the number of switches point of view) and standard six-switch inverter with sine pulsewidth modulation. The proposed inverter is capable of operating with a wide range of output voltages from zero to the full value of the dc input voltage by appropriately altering the instantaneous duty cycle. A three-phase universal inverter with only three power switch has been proposed in this paper for the first time ever, to our knowledge. For the purpose of providing a good compromise between fast transient response and stability, a model predictive controller is proposed. All the design expressions have been derived. A comparison with other dc–ac converters is given to show the merits of the proposed converter. Finally, satisfactory circuit operation is confirmed by experimental results from a laboratory prototype. [ABSTRACT FROM AUTHOR]