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In this paper, a single-inductor dual-output (SIDO) dc–dc converter is proposed. The significant feature of the proposed converter is feeding a constant power load in low-voltage side (LVS) port, where even feeding a variable load at LVS does not have any cross regulation to high-voltage side port with the desired approximation. Magnificently, both merits are obtained in open-loop manner, which is an outstanding characteristic in comparison with that of the existed converters. In this paper, soft commutation and soft switching of switches and diodes are investigated along with the aforementioned main novelty. Moreover, detailed theoretical analyses of the proposed SIDO dc–dc converter in continuous conduction mode are presented besides the comparisons with some other structures. Finally, theoretical analyses are verified through a 1500 W experimental prototype results. [ABSTRACT FROM AUTHOR]

In this paper, a series-capacitor-based interleaving buck power factor correction (PFC) converter is proposed, the intermediate energy storage capacitance of which is operated at discontinuous capacitor voltage mode (DCVM), and automatic power factor (PF) correction for this converter is obtained. Moreover, the voltage across the series capacitor of the proposed PFC converter is clamped at the input voltage, and thus peak voltage stress existed in the traditional DCVM buck PFC could be relieved. By effectively regulating the charge/discharge time for the series capacitor, ultrahigh step-down conversion ratio of the proposed converter is achieved, the conversion ratio of which is independent of the duty cycle and only related to the switching frequency and circuit parameters. Therefore, high PF can be obtained due to very narrow deadtime of the input current. Meanwhile, the proposed PFC converter can realize the soft turn-on of part power switch and soft turn-off of part power diodes. In addition, comparing with the traditional discontinuous inductor current mode PFC, the input current of the proposed PFC converter is continuous so that the peak value and root-mean-square value of input current can be reduced. The operational principle, performance analysis, and parameter design principle are given in this paper. The analysis results show that the PF and total harmonic distortion are also independent of the duty cycle. Finally, a 220-Vac input, 60 W/15 V output experimental prototype is built to verify the validity of the theoretical analysis. [ABSTRACT FROM AUTHOR]

This paper proposes a novel dc power electronic transformer (DCPET) topology for locomotive, ac/dc hybrid grid, dc distribution grid, and other isolated medium-voltage and high-power applications. Compared with conventional PET topology, the proposed DCPET has fewer power semiconductor devices and high-frequency isolation transformers, which can improve the power density and reliability. Fault handling or redundancy design can be achieved to further improve the reliability when some dc–dc modules break down. Also, input voltage sharing control can be omitted to simplify the control system and improve the stability. Meanwhile, soft switching is guaranteed for all the switches, which is beneficial to increase switching frequency and improve power density. In this paper, the principle, evolution, and control of the proposed DCPET are respectively presented and studied in detail. Finally, a prototype of the proposed DCPET is built and the experimental results verify the validity and superiority of the proposed topology. [ABSTRACT FROM AUTHOR]

In this paper, a new soft-switching bridgeless single-phase power factor correction (PFC) converter is presented and analyzed. Employing an auxiliary switch, the input current dead angle that is the main drawback of the existing buck-type PFCs is omitted, and thus, the power factor (PF) is improved, which is the main contribution of the paper. Proposed PFC converter operates under discontinuous conduction mode (DCM) and draws sinusoidal input current from power supply inherently. All switches and diodes are turnedonandoffunder soft switching, which leads to low switching losses and elimination of diode reverse recovery problems. Also, minimum numbers of semiconductor devices are in the power flow path that reduce the conduction losses. A 120-W laboratory prototype is implemented and experimental results verify the validity of theoretical analysis and show efficiency of 92.1%. In addition, total harmonic distortion (THD) of 3.3% is achieved and the input current harmonics complies with IEC61000-3-2 Class D requirements. [ABSTRACT FROM AUTHOR]

A high step-up dc–dc converter is proposed in this paper. The presented converter benefits from some advantages such as high voltage gain and continuous input current, which makes it suitable for the renewable energy applications. The presented converter is based on the SEPIC converter. However, the converter voltage gain is improved by employing a coupled inductor and two voltage multipliers. A passive clamp circuit is also added to the proposed converter that increases the voltage gain and reduces the voltage stress on the main switch. Thus, a switch with low $R_{{\text{DS(on)}}}$ will be needed that decreases the conduction loss. Besides, the voltage stress on the output diode in the proposed converter is reduced, which alleviates reverse recovery problem. The steady-state analysis of the proposed converter is discussed in this paper. The analysis is verified with experimental results under the output power of 245 W. [ABSTRACT FROM AUTHOR]

In this paper, a new structure of nonisolated boost dc–dc converters based on voltage-lift technique is proposed. In comparison with conventional nonisolated boost dc–dc converters, the proposed converter generates higher voltage gain. In this paper, the relations between voltage and current of all elements in continuous conduction mode and discontinuous conduction mode are calculated as well as voltage gain in each mode. Then, the critical inductance and stress of switch current are extracted. Finally, the validity of given theories is examined by using the experimental results. [ABSTRACT FROM PUBLISHER]

When providing ac output, modular multilevel converters (MMCs) experience power fluctuation in the phase arms. The power fluctuation causes voltage ripple on the module capacitors, which grows with the output power and inversely to the output frequency. Thus, low-frequency operations of MMCs, e.g., for motor drives, require injecting common-mode voltages and circulating currents, and strict dc voltage output relative to ground is impossible. To address this problem, this paper introduces a novel module topology that allows parallel module connectivity in addition to the series and bypass states. The parallel state directly transfers power across the modules and arms to cancel the power fluctuations and hence suppresses the capacitor voltage ripple. The proposed series/parallel converter can operate at a wide frequency range down to dc without common-mode voltages or circulating currents; it also allows sensorless operation and full utilization of the components at higher output frequencies. We present detailed simulation and experiment results to characterize the advantages and limitations of the proposed solution. [ABSTRACT FROM AUTHOR]

This paper proposes two coupled-inductors-based Z-source networks, called the modified series and tapped switched-coupled-inductors quasi-Z-source networks (mSSCL-qZSN and mTSCL-qZSN, respectively). These networks offer high voltage gains with less-than-unity winding turn ratios $(n < {\text{1)}}$ , resulting in a reduced inductive element size. Other advantages include a less number of active components and their lower ratings and a higher efficiency. In addition, a lower magnetic core size is required for the proposed ZSNs due to the lower peak magnetizing current. The performance principles and detailed comparative analysis are provided and confirmed through experiments on a 200-W dc–dc converter. [ABSTRACT FROM AUTHOR]

In high-voltage applications, the magnitude of total semiconductor losses (on-state and switching) determines the viability of modular-type multilevel converters. Therefore, this paper presents a new cell arrangement that aims to lower total semiconductor loss of the modular multilevel converter (MMC) to less than that of the half-bridge modular multilevel converter (HB-MMC). Additional attributes of the proposed cell are: it eliminates the protective thyristors used in conventional half-bridge cells that deviate part of the dc-fault current away from the antiparallel diode of the main switch when the converter is blocked during a dc short-circuit fault, and it can facilitate continued operation of the MMC during cell failures without the need for a mechanical bypass switch. Thus, the MMC that uses the proposed cell retains all advantages of the HB-MMC such as full modularity of the power circuit and internal fault management. The claimed attributes of the proposed cell are verified using illustrative simulations and reduced scale experimentations. Additionally, this paper provides brief and critical discussions that highlight the attributes and limitations of popular MMC control methods and different MMC cells structures proposed in the literature, considering the power electronic system perspective. [ABSTRACT FROM AUTHOR]

This paper presents the analysis and design of an isolated high-voltage LLC resonant dc–dc full-bridge converter based on symmetrical quadrupler rectifier (SQR). Unlike conventional Cockcroft–Walton and full-bridge diode rectifiers, the SQR circuit provides significant improvement in power density by reducing the transformer turns-ratio without much increase in the output impedance. Moreover, the LLC converter can provide additional voltage boost, if operated, below the series resonant frequency of the LLC tank. The operating region of the converter is chosen in such a way that the converter always operates in ZVS for all line and load conditions with additional voltage boost. A new method based on basic differential equation is proposed for the accurate analysis and design of the converter and subsequently, the key results are compared with a first harmonic approximation based analysis method. A 120 V dc input, 2 kV output, 200 W laboratory prototype has been designed, built, and tested. Simulation and experimental results shown in this paper demonstrate the validity of the analysis and design of the presented converter. [ABSTRACT FROM AUTHOR]

This paper proposes a multilevel series compensator (MSC) to deal with voltage sags/swells, harmonic compensation, or reactive power compensation. Such a device can be considered as a dynamic voltage restorer or a series active power filter (Series-APF). The MSC can improve the power quality of loads located in stiff systems. The configuration is based on three-phase bridge (TPB) converters connected by means of cascaded single-phase transformers. This arrangement permits the use of a single dc-link. A generalization for $K$ -stages in which $K$ -transformers are coupled with $K$-TPB converters is presented. The topology permits generating a high number of levels in the voltage waveforms with a low number of power switches in comparison with a classic topology. The multilevel waveforms are generated by the converters through a suitable pulsewidth modulation (PWM) strategy that takes into consideration the transformer turns ratios. Modularity and simple maintenance make the proposed MSC an attractive solution compared with some conventional configurations. Model, PWM strategy, and overall control are discussed in this paper. Simulation and experimental results are presented as well. [ABSTRACT FROM PUBLISHER]

Various magnetically coupled impedance source (MCIS) networks have been proposed in the literature for increasing voltage gain and modulation index simultaneously while reducing the number of passive components used in the converter. However, applications of such networks have been limited by their discontinuous currents drawn from the sources and/or high stresses experienced by their components. This paper thus proposes three new MCIS networks named, respectively, as quasi-Y-source, quasi-Γ-Z-source, and quasi-T-source or quasi-trans-Z-source networks. These new networks inherit all advantages of the existing MCIS networks. In addition, they demonstrate advantages like continuous input currents, reduced source stresses, and lower component ratings that are not achievable by other existing networks. Further, dc-current-blocking capacitors used in the networks help to avoid saturation of magnetic core. Derivations of all two-winding MCIS networks, including existing and new networks, from the generalized three-winding MCIS networks are then systematically illustrated, before comparing them. Operational principles, mathematical derivations, simulation, and experimental results of all studied networks have been presented in the paper. [ABSTRACT FROM PUBLISHER]

Modular multilevel converters (MMCs) are being developed for the grid connection of offshore wind or tidal farms. In order to reduce the construction and maintenance costs, it is desirable to reduce the weight and volume of the system. In current MMC submodule designs, the reservoir capacitor usually accounts for over 50% of the total volume and 80% of weight. This paper presents a new design concept and control principle for a submodule using the stacked switched capacitor (SSC) architecture that can significantly reduce the capacitor size in an MMC. Practical considerations for a high-voltage high-power SSC-based MMC submodule are presented in this paper, through the design of a 21-level, 40-kV (pole-pole dc), 19.1-MW, grid-connected system, and the concept is demonstrated experimenttally on a scaled-down 400-V, 12.3-Apeak laboratory prototype submodule. It is shown that with the proposed SSC architecture, the total volume of capacitors in each submodule can be reduced by more than 40% without significantly increasing the power loss. [ABSTRACT FROM AUTHOR]

In recent years, modular multilevel converter (MMC) is considered for medium-voltage variable speed drives (VSD) due to its modularity and higher reliability. However, the major drawback of the MMC-based VSD is the higher capacitor ripple voltage at lower operating speeds. In literature, this ripple voltage is reduced by injecting a high-frequency circulating current into each arm. This additional circulating current increases the overall current rating of the devices, inductors, and capacitors. Alternatively, the capacitor ripple voltage can be reduced at the lower output frequency by reducing the dc-bus voltage. This paper proposes a new configuration using a multipulse diode-bridge rectifier to reduce the dc-bus voltage when the drive is operated at lower speeds. Therefore, the capacitor ripple voltage decreases without injecting any circulating current. In addition, a new technique is proposed to maintain the peak-to-peak value of the submodule capacitor ripple voltage constant at near-zero speed. The proposed converter with 24-pulse rectifier configuration is simulated in MATLAB/Simulink, and the experimental validation is carried out on a prototype with 12-pulse rectifier. [ABSTRACT FROM AUTHOR]

The modular multilevel converter (MMC) is attractive for medium- or high-power applications because of the advantages of its high modularity, availability, and high power quality. Reliability is one of the most important challenges for the MMC consisting of a large number of submodules (SMs). The capacitor monitoring is one of the important issues in the MMC. This paper proposed a reference submodule (RSM)-based capacitor monitoring strategy for the capacitance estimation in the MMC, where the capacitances in the monitoring SMs can be estimated based on the capacitor voltage relationship between the RSM and the monitoring SMs. The proposed monitoring strategy does not rely on the information of all capacitor voltage and current, which effectively simplifies the algorithm for capacitance estimation. The simulation studies with the time-domain professional tool PSCAD/EMTDC are conducted and a down-scale MMC prototype is also tested in the laboratory with the proposed capacitor monitoring strategy. The study results confirm the effectiveness of the proposed capacitor monitoring strategy. [ABSTRACT FROM AUTHOR]

A simple buck–boost LED driver suitable for battery operated applications with limited input voltage level is presented in this paper. Soft switching performance is provided for the main switch via a resonant circuit to improve the converter efficiency. The incorporated auxiliary switch also performs under zero voltage switching condition. Both power switches can be driven with a simple gate drive circuit, so, the additional switch does not add any driving complexity. In addition, only one magnetic element is utilized in the proposed LED driver which contributes to circuit simplicity and lower weight and size. Also, all diodes turn off at zero current switching which eliminates the reverse recovery losses and improves efficiency. A laboratory prototype converting 12 V input voltage to 32 V output operating at 26 W output power is implemented and tested to verify the effectiveness of the proposed LED driver. [ABSTRACT FROM AUTHOR]

High step-down voltage conversion is necessary to bridge the voltage gap between main power converters and low-voltage auxiliary electronics in power conversion systems. Switched capacitor converters (SCCs) are an attractive candidate as a high step-down converter, but their poor voltage regulation capability may limit their applications. Pulsewidth modulation (PWM) SCCs with adjustable high step-down voltage conversion are proposed in this paper. The proposed PWM SCCs can be derived from traditional SCCs by replacing an energy transfer capacitor with a switched-capacitor-inductor (SCL) cell that comprises inductors, capacitors, and diodes to realize PWM-controllable voltage conversion. The voltage step-down ratio of the proposed PWM SCCs is not only PWM controllable but also adjustable with structures of SCCs and SCL cells. Two representative PWM SCCs were taken as examples to perform the operational analysis. The prototypes of both representative PWM SCCs were built and tested to demonstrate the proposed concept. [ABSTRACT FROM AUTHOR]

This paper proposes a Class-DEMtuned power amplifier. The proposed amplifier achieves zero-voltage switching (ZVS), zero-voltage derivative switching (ZVDS), and zero-current switching (ZCS) at turning-on, and ZVS, ZVDS, ZCS, and zero-current derivative switching at turning-off. Therefore, the switching losses are extremely low, which is suitable for high-frequency operation. Moreover, the switch voltage stress is low, which is no more than its input voltage. A proposed amplifier was designed, built, and tested. The measured power conversion efficiency was 93.2% under the condition of the main input voltage of 46.8 V, the operating frequency of 1 MHz, and the output power of 4.87 W. [ABSTRACT FROM AUTHOR]

The three-phase four-wire inverter with split dc-link capacitors can supply unbalanced loads. For the purpose of reducing the filter inductors, a neutral inductor could be introduced into the neutral line. This paper analyzes the operation principle of the three-phase four-wire inverter with split dc-link capacitors when a neutral inductor is introduced. It is illustrated that the neutral inductor can reduce the zero-sequence switching harmonics in the voltages between the phase-leg midpoints and the output neutral point, thus the filter inductors can be reduced. The optimized design of the neutral inductor and filter inductors is proposed with the considerations of the inductor current ripple, the ability of supplying unbalanced loads, and the total energy stored in the inductors. The equivalent circuits of the three-phase four-wire inverter with split dc-link capacitors and neutral inductor is derived in the α–β–0 frame, and the zero-axis voltage regulator is modified to suppress the third-order harmonic in the zero-sequence current caused by the deadtime of the drive signals for the power switches. Finally, the experimental results from a 9-kW prototype are provided to prove the effectiveness of the proposed optimized design of the neutral inductor and filter inductors and the control strategy of the inverter. [ABSTRACT FROM AUTHOR]

In this paper, a family of step-up resonant switched-capacitor converters (RSCs) with a continuously adjustable conversion ratio is proposed based on the Cuk dual-resonance core (DRC) featuring two resonant paths. By adopting the on-time fixed frequency modulation, the two resonant paths can conduct simultaneously and satisfy the charge balance of the flying capacitor during the overlapping period. As a result, the conversion ratio—upper bounded by two determined by the circuit configuration—can vary continuously and efficiently even at the light load condition (1/10 of the rated power). A comprehensive analysis—the operation principle, voltage-gain curve, and voltage/current stresses—about the DRC is given. In addition, the Cuk DRC was extended to the series–parallel switched-capacitor converter (SCC), Fibonacci SCC, and voltage doubler to form a family of step-up RSCs, whose voltage-gain curves of different topologies are derived. Moreover, a characteristic comparison between the Cuk DRC and the traditional “direct” and “indirect” resonant core is given. Then, a 48 to 62–94.6 V resonant core with peak efficiency 97.8% and maximum power 120 W under the open loop condition was built. The analyses were verified by both experimental and simulation results. [ABSTRACT FROM AUTHOR]

The five-level nested neutral-point-clamped (5L-NNPC) converter is one of the most promising topologies for medium-voltage (2.3–7.2 kV) high-power applications such as medium-voltage drives, wind energy conversion systems, and grid-connected systems. The 5L-NNPC requires a fewer number of switching devices, freewheeling and clamping diodes, and flying capacitors compared to the existing five-level multilevel converters. In the 5L-NNPC topology, each flying capacitor voltage is regulated at one-fourth of the dc-bus voltage to obtain the five-level operation. Due to the lack of redundant switching states, it is difficult to control the flying capacitor voltages by using the pulse-width-modulation-based classical control methods. This paper proposes a model-predictive current control (MPCC) approach to control the flying capacitor voltages along with the output currents of the 5L-NNPC converter. The discrete-time model of 5L-NNPC is developed to implement the MPCC scheme. The simulation and experimental studies are conducted to verify the dynamic and steady-state performance of 5L-NNPC with the MPCC scheme. The performance of the proposed MPCC approach is compared with the conventional space-vector-modulation-based voltage-balancing approach. Furthermore, the flying capacitor voltage control capability of MPCC is verified at different load power factors. [ABSTRACT FROM AUTHOR]

This paper presents an overview of resonant and hybrid switched-capacitor converters with a particular focus on multimode operation. The multimode approach is discussed as a tool to affect high efficiency and power density across a wide load range, provide variable regulation, and, as a general framework, to conceptualize the advantages and opportunities of the approach compared to more traditional dc–dc converters. A general analysis is provided to quantify the advantage of hybrid and resonant converters that factors in the tradeoffs between size and loss in the magnetic component and voltage stress on the active devices. A broader set of operating modes is presented that spans continuous and discontinuous conduction and includes resonant, quasi-resonant, and more traditional buck- or boost-like operation. A prototype flying-capacitor multilevel converter is presented to demonstrate the variety of operating modes and motivate important considerations such as voltage balance on the flying capacitors. [ABSTRACT FROM AUTHOR]

In this paper, a novel buck–boost dc–dc converter with continuous input current is proposed. The voltage gain of the presented converter is higher than conventional converters, such as buck–boost, single-ended primary-inductance converter, Cuk, and Zeta converters. This converter works only by one switch and voltage stress across the switch is low. Input current of the proposed converter is continuous so a large filter at the input is not needed. Furthermore, continuous input current has made this converter suitable for renewable energy and fuel cell applications. In this converter, noninverting output voltage is obtained and high gain of voltage is achieved as well. So it can operate at wide output voltage range only by changing the duty cycle of the power switch pulse. The presented converter can easily controlled in continuous conduction mode operation, because of using only one power switch. In the following, the principle of operation and the mathematical analyses of the proposed converter are explained, finally, validity of the proposed dc–dc converter is verified by the experimental results. [ABSTRACT FROM AUTHOR]

Owing to low cost, small size, and low weight, transformerless inverters became prominent in single-phase grid connected photovoltaic (PV) systems. Key issues pertaining to these inverters include suppression of common mode (CM) leakage current and improvement of conversion efficiency. Achieving higher efficiency in single-phase grid-connected photovoltaic systems depends on the number of stages involved in feeding power to the grid, predominantly, if the PV array voltage is less than the peak value of the grid voltage. In this paper, an integrated dc–dc converter based grid-connected transformerless PV inverter is proposed which is aimed at maintaining high efficiency, even if the PV array voltage falls below the peak value of grid voltage (efficient operation at an extended input voltage range). A modulation strategy is discussed in order to minimize the flow of CM leakage current. Further, the efficiencies of certain transformerless inverter topologies are analyzed and compared with that of the proposed topology. Detailed simulation studies are carried out in MATLAB/Simulink environment to verify the analysis. Experimental results for a scaled down laboratory prototype are included as a proof-of-concept to validate the claims. [ABSTRACT FROM AUTHOR]

In this paper, a novel transformerless interleaved high step-down conversion ratio dc–dc converter with low switch voltage stress is proposed. In the proposed converter, two input capacitors are series-charged by the input voltage and parallel-discharged by a new two-phase interleaved buck converter for providing a much higher step-down conversion ratio without adopting an extreme short duty cycle. Based on the capacitive voltage division, the main objectives of the new voltage-divider circuit in the converter are for both storing energy in the blocking capacitors for increasing the step-down conversion ratio and reducing voltage stresses of active switches. As a result, the proposed converter topology possesses the low switch voltage stress characteristic. This will allow one to choose lower voltage rating MOSFETs to reduce both switching and conduction losses, and the overall efficiency is consequently improved. Moreover, due to the charge balance of the blocking capacitor, the converter features automatic uniform current sharing characteristic of the interleaved phases without adding extra circuitry or complex control methods. The operation principles and relevant analysis of the proposed converter are presented in this paper. Finally, a 400-V input voltage, 25-V output voltage, and 400-W output power prototype circuit is implemented in the laboratory to verify the performance. [ABSTRACT FROM PUBLISHER]

The noninverting buck–boost converter has attracted significant attention in the photovoltaic (PV) module integrated application, as it offers high efficiency while maintaining a low cost and a simple topology. When this converter is employed, special care must be taken at the transition between buck and boost operating modes, as a dead-zone in the voltage transfer function can cause abrupt perturbations in the controlled voltage, decreasing the regulation quality and ultimately lowering the power conversion efficiency. In this paper, a new dead-zone compensation technique is proposed with the scope of smoothing the transition between operating modes, eliminating the voltage ripple and improving the regulation performance, while maintaining high efficiency. The converter under analysis is studied together with its gate driving circuit, which is based on a bootstrap capacitor power supply for the high-side switches. The proposed dead-zone compensation technique is deduced by using the principle of maintaining the ideal voltage gain function across the converter operating range. The technique is analyzed, implemented and tested on a purposely built PV module integrated noninverting buck–boost converter. The experiments reveal a sensible improvement of the voltage regulation during mode transition, confirming the effectiveness of the proposed technique and its fitness for the PV application. [ABSTRACT FROM AUTHOR]

Five-level hybrid-clamped (5L-HC) converter is a newly proposed topology which is suitable for high-performance medium-voltage high-power conversions without switches directly connected in series. The critical issue of this converter is that two flying capacitor voltages of each phase and two neutral-point potentials of the dc-link need to be balanced. This paper presents a decoupled voltage balancing method for this 5L-HC converter based on modified phase-shifted pulse width modulation (PS-PWM) and optimal zero-sequence voltage injection. The voltages across the central dc-link capacitor and two flying capacitors are balanced first by adjusting the width of four PWM signals. Second, the relationship between the neutral-point currents and the output phase voltage is studied and the upper and lower dc-link capacitor voltages are balanced by zero-sequence voltage injection. Both steady-state and dynamic-state simulation and experimental results are presented to confirm the validity of this method. [ABSTRACT FROM AUTHOR]

Direct current voltages unbalance of respective power cells is an inherent and critical problem in a cascaded multilevel converter, which is widely used in the solid-state transformer. In this paper, an n -dimension space vector pulse width modulation is presented to address this issue in a three-level H-bridge-based cascaded multilevel converter. This algorithm utilizes the redundant switching pairs of the inner cell and the redundant vectors of mutual cells to balance capacitors’ and cells’ voltages. Meanwhile, a smooth vector transition strategy is included in this algorithm to avoid the level-skip phenomenon. The calculation processes are analyzed in one-cell, two-cells, and three-cells modes, respectively. It is simple, calculable, and flexible to extend in n-cells mode. Finally, the voltage balancing capacity of the inner cell and mutual cells with smooth level transition are verified by simulations and experiments not only at startup but also with unbalanced loads. [ABSTRACT FROM PUBLISHER]

Presently, the neutral-point potential offset is an inherent problem for three-level converters on three-phase four-wire active power filters. The conventional three-dimensional space vector pulse width modulation (3-D-SVPWM) strategy is adopted as a normal solution to the problem, but the selection of space vector sectors for four-wire converter is both abstract and complicated in practice. This paper proposes a new PWM strategy accordingly to simplify the selection process and the calculation of duration. Compared to the conventional 3D-SVPWM, the proposed method locates the sector of optimal vector directly with the polarity of three-phase reference voltage. Then, by applying voltage–second balance rule, it can perform a fast calculation of the duration and generate PWM signals to control the switching devices’ on/off. As an approach to correct the imbalance dc-link capacitor voltage, this strategy reconstructs the switching sequence. A portion of state O duration is disassembled into states P and N to suppress the neutral-point potential offset. The proposed strategy is validated with a range of experiments. The results indicate that this simplified PWM strategy can effectively reduce the computational burden, and also the dc-link capacitor voltage is well controlled. [ABSTRACT FROM PUBLISHER]

This paper proposes a new control method of a direct ac-to-ac converter consisting of two half-bridge converters and a series-resonant circuit. This circuit converts the ac input power from the utility grid to a high-frequency ac output without any dc stage. This circuit does not require a diode bridge rectifier and, thus, makes it possible to reduce forward voltage drops and power losses in the diodes. A new switching sequence for phase-shift control is proposed to regulate the capacitor voltage in each half-bridge converter and to achieve both zero-voltage switching and synchronous rectification. The proposed phase-shift control is theoretically discussed and is also verified by experimental setup using superjunction power MOSFETs. As a result, the proposed direct ac-to-ac converter exhibits a good power conversion efficiency as high as 97.7% at the rated power of 1.3 kW. [ABSTRACT FROM PUBLISHER]

This paper presents an optimized topology of 3-$\phi$ , multilevel inverter (MLI) configuration for five or higher level operation with reduced switch count. The proposed solution consists of two basic units (BUs) of multilevel converter and a T-structured 3-level inverter (3-LI). Both BUs are equally shared by the three phases maintaining symmetry among the phases. Moreover, for a higher level operation of the proposed MLI, the modifications required are at two BUs only and not at three legs of the inverter. It further helps in reducing the requirement of extra components for higher level operation compared to the conventional solutions. Furthermore, the topology also has the benefits of reduced switching and conduction loss. An algorithm is also devised to generate the switching pulses for the BUs and the 3-LI, using a carrier-based space vector modulation technique. Presented topology is compared with other existing topologies to prove its advantage. All the details regarding the operating modes and pulse width modulation techniques employed for the proposed system are given and supported by the simulation and experimental results. [ABSTRACT FROM AUTHOR]

Adding the auxiliary switches to the conventional H-bridge inverter is an effective way to eliminate the leakage current for transformerless PV systems, such as H5, H6, etc. Inspired by the newly developed embedded-switch H6 topology, a novel embedded-switch inverter (ESI) is proposed in this paper for three-phase transformerless PV systems. First, the operation principle and characteristics of the proposed ESI are analyzed. Second, the common-mode model of the three-phase ESI is established, based on which the main factors that affect the leakage current are discussed. The finding reveals that the switching states with conventional modulation strategy result in high-frequency common-mode voltage, which is the source of leakage current. In order to solve the problem, a new modulation strategy is presented for ESI to eliminate the high-frequency leakage current. Finally, the time-domain simulation and the experimental tests are carried out. The results verify the effectiveness of the proposed solution. [ABSTRACT FROM AUTHOR]

This paper proposes an interleaved-stage ac–dc bidirectional power converter topology feasible to medium-voltage railway systems. It is based on an arrangement that uses input-series-output-parallel configuration with identical power modules. Each module consists of two interleaved legs employing coupled windings so that it is possible to connect a medium-frequency transformer. The topology conception is presented, followed by the adopted control and modulation technique. An estimation of semiconductor losses is also discussed, while a comparative analysis by means of simulation results validates the improved performance of the introduced approach if compared with similar solutions. The topology results are obtainedt through a medium-voltage high-power railway application, demonstrating the converter functionalities and performance under both steady-state and dynamic conditions. It is then possible to state that good performance in terms of efficiency is achieved even though the power stage presents higher component count if compared with the topology that presents the best result, thus making it suitable to high-power ac–dc machine drive applications. [ABSTRACT FROM AUTHOR]

The voltage balancing of the floating capacitors in modular multilevel converter (MMC) is of great importance for the safe operation. However, the existing voltage-balancing algorithms usually suffer from high switching frequency, leading to unnecessary switching losses and device costs. This paper proposes an adaptive capacitor voltage-balancing method for high-power MMCs with reduced switching frequency. The operational characteristics and switching process of the submodules (SMs) are analyzed in detail. And then the relationship between the switching frequency and the capacitor voltage deviation is derived. Based on the analysis, an adaptive method is proposed to make a trade-off between the switching losses and the balancing effect through a closed-loop control of the alternating number of the SMs. The calculation formulas of the switching frequency are also presented. PSCAD/EMTDC simulation and RT-LAB-based real-time control hardware in the loop (HIL) test results demonstrate the effectiveness of the proposed method under different operating conditions. [ABSTRACT FROM PUBLISHER]

In this paper, a power factor correction (PFC)-based switched reluctance motor (SRM) drive is proposed. Generally, the SRM drive is fed with a simple diode bridge rectifier followed by a bulky capacitor, which draws peaky current at low power factor and high-input-current total harmonic distortion (THD). Here, a dual output converter is proposed to control the SRM and to provide power quality improvement as well. This converter is a combination of Cuk and SEPIC converters, which produces two equal output voltages with neutral point N, to feed a midpoint converter of the SRM drive. The converter is designed to operate in discontinuous conduction mode of operation to obtain inherent PFC at supply side. The motor control is attained by regulating dc link voltage over a wide range. Test results on a prototype of the SRM drive demonstrate the excellent performance with high power factor and reduced input current THD. The observed power quality indices depict the improved power quality as per the standard IEC 61000-3-2. [ABSTRACT FROM PUBLISHER]

This paper presents a novel fully integrated step-up dc/dc converter containing circuits to improve electromagnetic emissions. This design utilizes current sources to limit the impulsive current flow into the integrated flying capacitors. This reduces the discontinuous pulse currents normally associated with capacitive converters causing electromagnetic interference (EMI). A variable reference current enables the converter to operate with the lowest possible emissions through the entire operating range and is used to regulate the output voltage. The inclusion of low EMI techniques enables fully integrated power converters to be implemented in systems where noise produced by converters currently restricts or prohibits their use. The proposed 3.2 mW voltage doubler was fabricated in a 0.18 $\mu$m CMOS process. With an input voltage range of 1–1.8 V, the converter produces a 1.6–3.3 V output. Experimental results verify the reduction of emissions to meet IEC 61967-4 Class L using current control with a reduction of noise voltage when compared with the circuit without the proposed techniques. [ABSTRACT FROM AUTHOR]

In this paper, a new type of matrix converter (MC) also called a single-phase high-frequency transformer isolated (HFTI) buck MC is proposed. The proposed converter can provide step-down operation of the input voltage with various types of output voltages such as in-phase and out-of-phase output voltages, rectified (or positive) output voltage, and output voltage with step-changed frequency. By incorporating HFT isolation, the proposed MC saves an extra bulky line frequency transformer, which is required for the conventional MCs to provide electrical isolation and safety, when used in application such as dynamic voltage restorers, etc. Two different circuit variations of the proposed HFTI MC are presented with and without continuous output currents, with the latter having less passive components. The safe-commutation strategy is also employed for the proposed HFTI MC to provide current path for the inductor during dead-time, which avoids switch voltage spikes without adding any snubber circuits. The operation principle and circuit analysis of the proposed MC are presented, and switching strategies are also developed to obtain various output voltages. Moreover, a prototype of the proposed MC is fabricated, and experiments are performed to produce in-phase/out-of-phase and rectified output voltages, and output voltage with step-changed frequency. [ABSTRACT FROM PUBLISHER]

The three-level flying capacitor (3L-FC) submodule significantly reduces the magnitude of circulating currents, voltage ripple, and footprint size and improves the efficiency of the modular multilevel converter (MMC). Due to the above advantages, the 3L-FC submodule becomes an alternative for the conventional half-bridge submodule in the MMC. Each 3L-FC submodule consists of two floating capacitors with different nominal voltage rating. The precharging of floating capacitors without inrush current is one of the major challenges in the 3L-FC-based MMC. This paper proposes a sequence of design steps to precharge the floating capacitors in the 3L-FC-based MMC. The proposed approach is highly effective to charge the outer and inner capacitors of each 3L-FC submodule to their nominal value. The superiority of the proposed approach is verified through the MATLAB simulations and dSPACE/DS1103 experiments on a laboratory prototype of the 3L-FC-based MMC. [ABSTRACT FROM AUTHOR]

This paper presents a transformerless static synchronous compensator (STATCOM) system based on hybrid multilevel H-bridge converter with delta configuration. This hybrid multilevel STATCOM is characterized by per-phase series connection of a high-voltage H-bridge converter operating at fundamental frequency and a low-voltage H-bridge converter operating at 5 kHz without any other circuit for dc voltage control. A new control strategy is proposed in this paper with focus on dc voltage regulation. Clustered balancing control is realized by injecting a zero-sequence current to the delta-loop, while individual voltage control is achieved by adjusting the fundamental content of ac quasi-square-waveform voltage of high-voltage converter. A downscaled experimental prototype rated at 100 V and 3 kVA is constructed in author's laboratory. Experimental results show that the hybrid multilevel STATCOM performs satisfactory not only improving efficiency and waveform quality, but also compensating reactive power and negative-sequence current while maintaining dc voltage at the given value. [ABSTRACT FROM AUTHOR]

This paper proposes a pulse-width modulation three-level converter with reduced filter size using two transformers. The proposed converter has many advantages. All switches sustain only the half of the input voltage and since the secondary rectified voltage is a three-level waveform, the output filter inductor can be reduced. Also, because of the power sharing of transformer and reduced output inductor, high efficiency can be obtained. The operational principle, analysis, and design considerations of the proposed converter are presented in this paper. The validity of this study is confirmed by the experimental results from a prototype with 600 W, 500-600 V input, and 60 V output. [ABSTRACT FROM AUTHOR]

In a modular multilevel converter (MMC), the zero-sequence currents at twice the fundamental frequency and its multiples flow through the dc bus and cause dc-bus power fluctuations during unbalanced conditions. These fluctuations appear in dc-bus current, considering that the dc-bus voltage is stiff. In this paper, a model-predictive control is proposed to minimize the ripple in dc-bus current. The proposed approach takes the advantage of internally generated zero-sequence voltage to mitigate the zero-sequence current during unbalanced conditions. To implement the proposed approach, a generalized mathematical model of the MMC, which includes the zero-sequence voltage, is presented. The performance of the proposed approach is verified through MATLAB/Simulink simulations on a 4.16-kV/5-MW system and dSPACE/DS1103-based experiments on a 208-V/3-kW laboratory prototype. [ABSTRACT FROM AUTHOR]

This paper addresses the inverter nonlinearity of a three-level T-type inverter. The main causes of the nonlinearity are pulse shaping, pulse skipping due to narrow pulses for the dead time, and voltage drop of the switching devices. Although the same causes have existed in two-level inverters, the pulse skipping phenomenon and results are quite different in the case of the three-level T-type inverter. The effects of pulse shaping and skipping have been investigated and discussed. In addition, the voltage drop of the switching devices has been considered in conjunction with the conduction path of the T-type inverter. Compensation methods based on the pulse width modulation (PWM) of T-type inverter to alleviate the inverter nonlinearity have been proposed from research results. The proposed methods could be easily implemented by adding appropriate offset voltages to the voltage references of the inverter in PWM. Furthermore, a neutral voltage balancing method of a three-level T-type inverter has been proposed in conjunction with the proposed PWM methods using offset voltage. Through extensive experimental tests, the fifth- and seventh-harmonic components of the current are conspicuously reduced along with the even harmonics. The neutral voltage of the inverter can be balanced effectively with the proposed offset voltage adjustments as well. [ABSTRACT FROM AUTHOR]

A novel isolated dc–dc converter is proposed, using the T-Type topology with zero voltage switching and pulse width modulated with a capacitive output filter. It uses four switches, two of which are subjected to the input voltage, and the other two to half the input voltage. All switches commutate under zero voltage over a wide load range. The proposed converter has the following features: (a) symmetrical operation of the isolation transformer, (b) modulation by pulse width with constant frequency, (c) zero voltage switching, and (d) three-level voltage applied to the primary winding of the transformer. Theoretical analysis, design example, and experimental data for a 2 kW, 400 VDC input, 400 VDC output, and 50 kHz switching frequency laboratory prototype, working in two operating points are included in this paper. The measured efficiency was 95% at 950 W. [ABSTRACT FROM AUTHOR]

The recently-developed nested neutral-point clamped (NNPC) converter is a four-level converter for medium-voltage high-power applications. It has some merits such as operating over wide voltage ranges (2.4–7.2 kV) without switching devices in series and less diodes or capacitors when compared with classical four-level topologies. But it has severe voltage balancing problems under low output frequency conditions when conventional space vector modulation (SVM) or sinusoidal pulse width modulation (SPWM) is applied, which limits its wide applications. In order to solve this issue, a space virtual-vector modulation (SVVM) along with a voltage balance control (VBC) algorithm is proposed in this paper. It helps reduce the voltage ripples greatly and maintain them within an acceptable region under low output frequency conditions. Therefore, it guarantees even voltage stresses among switching devices and extends the NNPC converter's applications. Principles of the proposed SVVM and VBC algorithms are elaborated in detail, and the voltage balancing performance is investigated and compared with the cases where conventional SVM and SPWM with the same VBC are applied. The relationship curves between voltage ripples and flying capacitance, output power, and output frequency have been explored and compared for both conventional SVM and proposed SVVM. Simulation and experimental results are presented to verify the effectiveness of the proposed method. [ABSTRACT FROM AUTHOR]

A new low-power single-stage ac-dc converter is proposed in the paper. The outstanding feature of the converter is that it can operate with a sinusoidal input current and a low primary-side dc bus voltage that is much less variable than that found in other single-stage converters. The operation of the converter is discussed in the paper and its various modes of operation are explained in detail. An analysis of the converter's steady-state characteristics is performed and the results are used in the design of the converter. Experimental results obtained from a prototype converter are also presented. [ABSTRACT FROM AUTHOR]

Linear small-signal models of a dc–dc converter often ignore switching dynamics; thus such models are insufficient to fully explore the performance objective under large signal transients. Linear/nonlinear hybrid controllers are promising alternatives; however, they require structurally different hardware resources along with extra antiwindup arrangements. This paper proposes a geometric tuning method in a digitally current-mode-controlled buck converter under continuous-conduction mode. This considers a proportional-integral voltage controller along with a load current feedforward in the digital domain, while the inductor current has a traditional analog implementation. This resembles a first-order switching surface with near load-invariant regulation; thus a (fixed) small integral gain is sufficient to minimize the steady-state error. Using phase-plane geometry, the objective is to tune the controller gain in a way to achieve proximate time optimal recovery using a fixed-frequency pulse-width modulator and also to retain the large-signal stability. The effects of parameter variation and finite sampling are analyzed. The proposed tuning is implemented using an FPGA device. [ABSTRACT FROM AUTHOR]

In this paper, a single-phase converter consisting of two legs with four switches, called the $\theta$-converter, is proposed. It has a common ac and dc ground, which reduces common mode currents and removes the need for an isolation transformer, and two capacitors: one across the whole dc bus and the other across the output. The dc bus capacitor provides a direct path for the double-frequency ripple current inherently existing in single-phase converters to return continuously so the output capacitor can be sized very small, only to filter out switching ripples. Moreover, the dc bus capacitor is intentionally designed to store the system ripple energy with large voltage ripples, which reduces its capacitance. Hence, the total capacitance needed and the output voltage ripples are reduced at the same time. This makes it cost-effective to use highly reliable film capacitors instead of bulky and vulnerable electrolytic capacitors. Because of the removed isolation transformers and bulky electrolytic capacitors, the power density and system reliability are improved. In order to properly operate the converter, two independent controllers are designed for the two legs, respectively, to achieve the desired functions and other normal objectives, such as the unity power factor. Experimental results are presented to demonstrate the high performance of the proposed converter. [ABSTRACT FROM AUTHOR]

Differential-mode buck-boost inverters have merits such as reduced switch number, ability to provide voltages higher or lower than the input voltage magnitude, improved efficiency, reduced cost and size, and increased power density, especially in low-power applications. There are five buck-boost inverters that can provide flexible output voltage without the need of a large electrolytic input side capacitor, which degrades the reliability of inverters. The continuous input current of these inverters is appropriate for maximum power point tracking operation in photovoltaic and fuel cells applications. Three of the five inverters can be isolated with high-frequency-link transformers where the common-mode leakage current can be mitigated. However, the performance and control of such converters have not been discussed in detail. In this paper, the five possible single-stage three-phase differential-mode buck-boost inverters with continuous input current are investigated and compared in terms of total losses, maximum ripple current, total harmonic distortion, and device and passive element ratings. In addition, the possible methods are presented for eliminating the input third-order harmonic current, resulting from the stored energy in the passive elements, as well as the output second-order harmonic currents. The ability for isolating the input and output sides of the inverters with a small–high frequency transformers is discussed. A changeable-terminal 2.5-kW bidirectional inverter is used to validate the design flexibility of the inverter topologies, when digital signal processor-controlled. [ABSTRACT FROM AUTHOR]

This paper presents a new formulation of a finite control set model-predictive control (FCS-MPC) algorithm, allowing to determine the best commutation instant in order to optimize the converter current tracking. This algorithm, mixing properties of FCS-MPC method and time resolution related to pulse width modulation schemes, is illustrated in a parallel flying capacitor converter. The parallel association of classical commutation cells is a good solution for increasing the output current driven by the converters, while the standard semiconductor technology is used. The control strategy used with this type of connection must be able to ensure not only a good distribution of the output current among the different legs, but also the balancing of the floating capacitor voltages. [ABSTRACT FROM PUBLISHER]

Phase-shifted carrier modulation is an industry standard in its application to multilevel H-bridge converters. The major advantage of this scheme over level-shifted and space vector modulation schemes is its inherent ability to evenly distribute losses between semiconductor devices. However, phase-shifted schemes suffer from harmonic degradation when operated at the low carrier frequencies required in high-power high-level number applications. This paper develops a model predictive modulation (MPM) scheme that achieves superior harmonic performance, compared to phase-shifted modulation, while ensuring equal semiconductor loss distribution. With respect to complete-enumeration-based predictive techniques, the proposed modulation significantly reduces the number of times the system cost function is evaluated. Reducing the number of calculations by several orders of magnitude ensures computational feasibility. Simulation and experimental results are presented, which confirm correct operation of the modulation strategy. [ABSTRACT FROM PUBLISHER]