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Due to the relatively low output voltage of photovoltaic (PV) source, a high step-up converter with high efficiency is needed when the PV source is connected to the power grid. A novel high step-up converter based on two switched capacitors and a coupled inductor is proposed in this paper. The operating principle is analyzed and the voltage gain is derived. A 100-W prototype is fabricated in the laboratory to verify the theoretical analysis, and the highest efficiency is 96.4%. [ABSTRACT FROM PUBLISHER]

Generally, single-stage buck–boost inverters consist of distinct circuits operating individually in buck/boost or positive/negative modes, the latter definitely leading to crossover distortion in the output current. This paper proposes a switching strategy that changes the bimodal operation of a single-stage buck–boost topology to a single-mode inverter. This is due to the consequent voltage gain that ensures that the output voltage polarity, apart from its magnitude, is an exclusive function of the duty ratio. Operational principle and salient hardware design are explained with the help of equivalent circuits. Details about the dynamic model are presented, based on which controller design is carried out for both stand-alone and grid-connected operation. Experimental results obtained from a 300-W, 110-V laboratory prototype are presented to validate the performance of the proposed switching strategy. [ABSTRACT FROM PUBLISHER]

The flying-capacitor modular multilevel converter (FC-MMC) overcomes the low/zero-speed operation issues of conventional MMC-based drive. The FC-MMC injects no common-mode voltage (CMV) to the drive system. However, the pulse width modulator (PWM) introduces switching ripples, which appear as CMV on motor stator windings. To completely get rid of the CMV, an elimination method based on a new modulation scheme is proposed in this paper. The modulation algorithm places the switching pulses end to end for upper and lower arms, respectively. The consistent switching positions between upper and lower arms lead to the complete CMV elimination for FC-MMC-based drive system in entire speed range. Although the proposed method slightly increases the switching frequency as compared to conventional phase-shifted PWM, it is still acceptable in medium-voltage applications. The validation of the proposal is proved by simulations and experiments. [ABSTRACT FROM PUBLISHER]

This paper proposes a multiloop framework for current control of grid-connected voltage source inverters (VSIs) with LCL output filter. The discrete-time model is of third-order with a nonminimum phase zero when controlling the grid side current. This poses some difficulties on the design of most types of controllers. Motivated by this problem, the inner loop is implemented by a discrete-time sliding mode control law to ensure the tracking of the converter side current. This can be achieved regardless the grid impedance and voltage, making the converter to behave like a current source inverter with a capacitive+inductive (CL) filter. Thus, the problem of current control falls from a third-order system to a second-order system. Several types of controllers can be designed to implement the outer loop based on the equivalent CL circuit. In this work, a resonant controller with a virtual resistor was applied. Simulations and experimental results are presented to validate the proposal. [ABSTRACT FROM PUBLISHER]

This paper extends the trans-Z-source concept to ac–ac power conversion and proposes a novel single-phase trans-Z-source ac–ac converter. The proposed converter retains the advantages of its existing Z-source/quasi-Z-source counterparts in which the output voltage can be boosted and in-phase with the input voltage or bucked/boosted and out-of-phase with the input voltage. Meanwhile, a coupled inductor is introduced into the proposed converter, and the turns ratio of the coupled inductor become another control variable beside the duty cycle to obtain extreme voltage gain. Importantly, the input voltage and output voltage share the same ground, and the input current could be continuous, which is a benefit for reducing input current harmonics. Most important of all, the safe-commutation strategy for the proposed converter is deep developed, and analytic expression between the switches state and loop circuit voltage/current condition is derived out. Hence, the current/voltage ripple can be avoided without a loss snubber circuit, which benefits a reduced cost and enhanced reliability. The performance analysis is discussed in consideration of parasitic resistance, and system parameter design is optimized based on theoretic calculation. A laboratory prototype is fabricated, and experiments are performed to verify the validation of the proposed converter. [ABSTRACT FROM PUBLISHER]

A common ground switched-quasi-Z-source bidirectional dc–dc converter is proposed for electric vehicles with hybrid energy sources. The proposed converter is based on the traditional two-level quasi- Z-source bidirectional dc–dc converter, changing the position of the main power switch. It has the advantages of a wide-voltage-gain range, a lower voltage stress across the power switches, and an absolute common ground. The operating principle, the voltage and current stresses on the power switches, the comparisons with the other converters, the small signal analysis, and the controller design are presented in this paper. Finally, a 300 W prototype with $U_{{\rm{high}}}= {240 \ \rm{V}}$ and $U_{{\rm{low}}}= {40\sim 120\ \rm{V}}$ is developed, and the experimental results validate the performance and the feasibility of the proposed converter. [ABSTRACT FROM PUBLISHER]

The model of a modular multilevel converter (MMC) determines the extent of critical circuit information that electromagnetic transient simulations can reveal. In this paper, two MMC models are proposed for efficient real-time hardware-in-the-loop (HIL) emulation on the field-programmable-gate-arrays (FPGA). The nonlinear switch-based model employing the insulated-gate bipolar transistor (IGBT) dynamic curve-fitting model considers factors affecting its transient performance so that device-level behavior such as power loss and junction temperature can be reproduced accurately in the electro-magnetic-thermal simulation of a power converter for its design evaluation. Meanwhile, regarding the MMC submodule as a transmission line stub achieves faster computation speed and enables the formation of a hybrid arm to save FPGA hardware resources. As the large network that the MMC presents is burdensome for real-time execution with a small time-step, circuit simplification based on partitioning and merging is conducted. Hardware implementation of a three-terminal high-voltage direct-current system containing an MMC-based dc–dc converter is carried out and the efficacy of proposed models is validated by comparing HIL emulation results with the offline simulation tool PSCAD/EMTDC. [ABSTRACT FROM AUTHOR]

The noninverting buck–boost converter has attracted significant attention in the photovoltaic (PV) module integrated application, as it offers high efficiency while maintaining a low cost and a simple topology. When this converter is employed, special care must be taken at the transition between buck and boost operating modes, as a dead-zone in the voltage transfer function can cause abrupt perturbations in the controlled voltage, decreasing the regulation quality and ultimately lowering the power conversion efficiency. In this paper, a new dead-zone compensation technique is proposed with the scope of smoothing the transition between operating modes, eliminating the voltage ripple and improving the regulation performance, while maintaining high efficiency. The converter under analysis is studied together with its gate driving circuit, which is based on a bootstrap capacitor power supply for the high-side switches. The proposed dead-zone compensation technique is deduced by using the principle of maintaining the ideal voltage gain function across the converter operating range. The technique is analyzed, implemented and tested on a purposely built PV module integrated noninverting buck–boost converter. The experiments reveal a sensible improvement of the voltage regulation during mode transition, confirming the effectiveness of the proposed technique and its fitness for the PV application. [ABSTRACT FROM AUTHOR]

Five-level hybrid-clamped (5L-HC) converter is a newly proposed topology which is suitable for high-performance medium-voltage high-power conversions without switches directly connected in series. The critical issue of this converter is that two flying capacitor voltages of each phase and two neutral-point potentials of the dc-link need to be balanced. This paper presents a decoupled voltage balancing method for this 5L-HC converter based on modified phase-shifted pulse width modulation (PS-PWM) and optimal zero-sequence voltage injection. The voltages across the central dc-link capacitor and two flying capacitors are balanced first by adjusting the width of four PWM signals. Second, the relationship between the neutral-point currents and the output phase voltage is studied and the upper and lower dc-link capacitor voltages are balanced by zero-sequence voltage injection. Both steady-state and dynamic-state simulation and experimental results are presented to confirm the validity of this method. [ABSTRACT FROM AUTHOR]

Direct current voltages unbalance of respective power cells is an inherent and critical problem in a cascaded multilevel converter, which is widely used in the solid-state transformer. In this paper, an n -dimension space vector pulse width modulation is presented to address this issue in a three-level H-bridge-based cascaded multilevel converter. This algorithm utilizes the redundant switching pairs of the inner cell and the redundant vectors of mutual cells to balance capacitors’ and cells’ voltages. Meanwhile, a smooth vector transition strategy is included in this algorithm to avoid the level-skip phenomenon. The calculation processes are analyzed in one-cell, two-cells, and three-cells modes, respectively. It is simple, calculable, and flexible to extend in n-cells mode. Finally, the voltage balancing capacity of the inner cell and mutual cells with smooth level transition are verified by simulations and experiments not only at startup but also with unbalanced loads. [ABSTRACT FROM PUBLISHER]

Presently, the neutral-point potential offset is an inherent problem for three-level converters on three-phase four-wire active power filters. The conventional three-dimensional space vector pulse width modulation (3-D-SVPWM) strategy is adopted as a normal solution to the problem, but the selection of space vector sectors for four-wire converter is both abstract and complicated in practice. This paper proposes a new PWM strategy accordingly to simplify the selection process and the calculation of duration. Compared to the conventional 3D-SVPWM, the proposed method locates the sector of optimal vector directly with the polarity of three-phase reference voltage. Then, by applying voltage–second balance rule, it can perform a fast calculation of the duration and generate PWM signals to control the switching devices’ on/off. As an approach to correct the imbalance dc-link capacitor voltage, this strategy reconstructs the switching sequence. A portion of state O duration is disassembled into states P and N to suppress the neutral-point potential offset. The proposed strategy is validated with a range of experiments. The results indicate that this simplified PWM strategy can effectively reduce the computational burden, and also the dc-link capacitor voltage is well controlled. [ABSTRACT FROM PUBLISHER]

This paper proposes a new control method of a direct ac-to-ac converter consisting of two half-bridge converters and a series-resonant circuit. This circuit converts the ac input power from the utility grid to a high-frequency ac output without any dc stage. This circuit does not require a diode bridge rectifier and, thus, makes it possible to reduce forward voltage drops and power losses in the diodes. A new switching sequence for phase-shift control is proposed to regulate the capacitor voltage in each half-bridge converter and to achieve both zero-voltage switching and synchronous rectification. The proposed phase-shift control is theoretically discussed and is also verified by experimental setup using superjunction power MOSFETs. As a result, the proposed direct ac-to-ac converter exhibits a good power conversion efficiency as high as 97.7% at the rated power of 1.3 kW. [ABSTRACT FROM PUBLISHER]

This paper presents an optimized topology of 3-$\phi$ , multilevel inverter (MLI) configuration for five or higher level operation with reduced switch count. The proposed solution consists of two basic units (BUs) of multilevel converter and a T-structured 3-level inverter (3-LI). Both BUs are equally shared by the three phases maintaining symmetry among the phases. Moreover, for a higher level operation of the proposed MLI, the modifications required are at two BUs only and not at three legs of the inverter. It further helps in reducing the requirement of extra components for higher level operation compared to the conventional solutions. Furthermore, the topology also has the benefits of reduced switching and conduction loss. An algorithm is also devised to generate the switching pulses for the BUs and the 3-LI, using a carrier-based space vector modulation technique. Presented topology is compared with other existing topologies to prove its advantage. All the details regarding the operating modes and pulse width modulation techniques employed for the proposed system are given and supported by the simulation and experimental results. [ABSTRACT FROM AUTHOR]

Adding the auxiliary switches to the conventional H-bridge inverter is an effective way to eliminate the leakage current for transformerless PV systems, such as H5, H6, etc. Inspired by the newly developed embedded-switch H6 topology, a novel embedded-switch inverter (ESI) is proposed in this paper for three-phase transformerless PV systems. First, the operation principle and characteristics of the proposed ESI are analyzed. Second, the common-mode model of the three-phase ESI is established, based on which the main factors that affect the leakage current are discussed. The finding reveals that the switching states with conventional modulation strategy result in high-frequency common-mode voltage, which is the source of leakage current. In order to solve the problem, a new modulation strategy is presented for ESI to eliminate the high-frequency leakage current. Finally, the time-domain simulation and the experimental tests are carried out. The results verify the effectiveness of the proposed solution. [ABSTRACT FROM AUTHOR]

This paper proposes an interleaved-stage ac–dc bidirectional power converter topology feasible to medium-voltage railway systems. It is based on an arrangement that uses input-series-output-parallel configuration with identical power modules. Each module consists of two interleaved legs employing coupled windings so that it is possible to connect a medium-frequency transformer. The topology conception is presented, followed by the adopted control and modulation technique. An estimation of semiconductor losses is also discussed, while a comparative analysis by means of simulation results validates the improved performance of the introduced approach if compared with similar solutions. The topology results are obtainedt through a medium-voltage high-power railway application, demonstrating the converter functionalities and performance under both steady-state and dynamic conditions. It is then possible to state that good performance in terms of efficiency is achieved even though the power stage presents higher component count if compared with the topology that presents the best result, thus making it suitable to high-power ac–dc machine drive applications. [ABSTRACT FROM AUTHOR]

The battery energy-stored quasi-Z-source (BES-qZS)-based photovoltaic (PV) power generation system combines advantages of the qZS inverter and the battery energy storage system. However, the second-harmonic ( \text2\omega ) power ripple degrades the system's performance and affects the system's design. An accurate model to analyze the \text2\omega ripple is very important. The existing models did not consider the battery, or assumed a symmetric qZS network with $L_{{1}}= L_{{2}}$ and $C_{{1}}= C_{{2}}$, which limits the design freedom and causes oversized impedance parameters. This paper proposes a comprehensive model for the single-phase BES-qZS-PV inverter system, where the battery is considered and there is no restriction of $L_{{1}}= L_{{2}}$ and $C_{{1}}= C_{{2}}$ . Based on the built model, a BES-qZS impedance design method is proposed to mitigate the \text2\omega ripple with asymmetric qZS network. Simulation and experimental results verify the proposed \text2\omega ripple model and impedance design method. [ABSTRACT FROM AUTHOR]

A capacitor voltage balancing method for a modular multilevel dc (MMDC) converter is proposed. The MMDC inherits the desirable features of both a modular multilevel converter (MMC) and a dual active bridge, namely high voltage capability, fault tolerance, zero-voltage switching-on of all the power devices, and a wide operating range. These features are ideal for a dc transformer in any dc distribution system. One key MMDC control issue is balancing of submodule capacitor voltages. Conventional MMC balancing techniques cannot be used as arm currents of an MMDC change direction within each switching cycle. This paper establishes that the average capacitor voltage of each arm is self-balanced and proposes a method to balance voltages within an arm by assigning the gate signals with higher charge difference to the submodules with lower voltages and vice versa. Charge difference is obtained by the voltage difference, hence only the SM capacitor voltages are required for balancing control. Different from the existed methods, the proposed technique is not limited by voltage gain or load conditions. Simulation and experimental results show that capacitor voltages are balanced under different voltage gains, different output power, and also when the MMDC starts up, hence ensuring the stable MMDC operation. [ABSTRACT FROM PUBLISHER]

The voltage balancing of the floating capacitors in modular multilevel converter (MMC) is of great importance for the safe operation. However, the existing voltage-balancing algorithms usually suffer from high switching frequency, leading to unnecessary switching losses and device costs. This paper proposes an adaptive capacitor voltage-balancing method for high-power MMCs with reduced switching frequency. The operational characteristics and switching process of the submodules (SMs) are analyzed in detail. And then the relationship between the switching frequency and the capacitor voltage deviation is derived. Based on the analysis, an adaptive method is proposed to make a trade-off between the switching losses and the balancing effect through a closed-loop control of the alternating number of the SMs. The calculation formulas of the switching frequency are also presented. PSCAD/EMTDC simulation and RT-LAB-based real-time control hardware in the loop (HIL) test results demonstrate the effectiveness of the proposed method under different operating conditions. [ABSTRACT FROM PUBLISHER]

This paper presents a variable switching point predictive current control (VSP $^2$CC) for the quasi-Z-source inverter (qZSI). The proposed VSP $^2$CC aims to remove the output current error on the ac side, as well as the inductor current and capacitor voltage errors of the quasi-Z-source network on the dc side of the converter. Unlike the previously presented direct model predictive control (MPC) strategies for the qZSI, the proposed control scheme can directly apply the switching signals not only at the discrete time instants, but at any time instant within the sampling interval. Consequently, the shoot-through state can be applied for a shorter time than the sampling interval, resulting in lower output and inductor currents ripples. Experimental results based on field programmable gate array are provided to verify the effectiveness of the introduced control method. As it is shown, the proposed method leads to lower inductor current ripples and less output current total harmonic distortion when compared with the conventional direct MPC. [ABSTRACT FROM AUTHOR]

DC microgrids are popular due to the integration of renewable energy sources such as solar photovoltaics and fuel cells. Owing to the low output voltage of these dc power generators, high efficient high gain dc–dc converters are in need to connect the dc microgrid. In this paper, a nonisolated high gain dc–dc converter is proposed without using the voltage multiplier cell and/or hybrid switched-capacitor technique. The proposed topology utilizes two nonisolated inductors that are connected in series/parallel during discharging/charging mode. The operation of switches with two different duty ratios is the main advantage of the converter to achieve high voltage gain without using extreme duty ratio. The steady-state analysis of the proposed converter using two different duty ratios is discussed in detail. In addition, a 100 W, 20/200 V prototype circuit of the high gain dc–dc converter is developed, and the performance is validated using experimental results. [ABSTRACT FROM PUBLISHER]

In this paper, a single-phase multilevel ac/ac converter with reduced number of power semiconductor devices is proposed. For the simple case of a three-level converter, only three bidirectional switches and two capacitors are required. The proposed converter provides a highly sinusoidal and regulated output voltage with a simple topology. The efficiency is high because in each state of operation only one semiconductor conducts. The converter can be easily extended to any desired levels in the output voltage to even more reduce the output total harmonics distortion. Another advantage of the proposed converter is that by increasing the voltage levels, the stress on the switches will decrease. The proper performance of the proposed converter is confirmed through extensive simulation and experimental tests. [ABSTRACT FROM PUBLISHER]

In this paper, a power factor correction (PFC)-based switched reluctance motor (SRM) drive is proposed. Generally, the SRM drive is fed with a simple diode bridge rectifier followed by a bulky capacitor, which draws peaky current at low power factor and high-input-current total harmonic distortion (THD). Here, a dual output converter is proposed to control the SRM and to provide power quality improvement as well. This converter is a combination of Cuk and SEPIC converters, which produces two equal output voltages with neutral point N, to feed a midpoint converter of the SRM drive. The converter is designed to operate in discontinuous conduction mode of operation to obtain inherent PFC at supply side. The motor control is attained by regulating dc link voltage over a wide range. Test results on a prototype of the SRM drive demonstrate the excellent performance with high power factor and reduced input current THD. The observed power quality indices depict the improved power quality as per the standard IEC 61000-3-2. [ABSTRACT FROM PUBLISHER]

In this paper, a class of single-phase Z-source (ZS) ac–ac converters is proposed with high-frequency transformer (HFT) isolation. The proposed HFT isolated (HFTI) ZS ac–ac converters possess all the features of their nonisolated counterparts, such as providing wide range of buck-boost output voltage with reversing or maintaining the phase angle, suppressing the in-rush and harmonic currents, and improved reliability. In addition, the proposed converters incorporate HFT for electrical isolation and safety, and therefore can save an external bulky line frequency transformer, for applications such as dynamic voltage restorers, etc. The proposed HFTI ZS converters are obtained from conventional (nonisolated) ZS ac–ac converters by adding only one extra bidirectional switch, and replacing two inductors with an HFT, thus saving one magnetic core. The switching signals for buck and boost modes are presented with safe-commutation strategy to remove the switch voltage spikes. A quasi-ZS-based HFTI ac–ac is used to discuss the operation principle and circuit analysis of the proposed class of HFTI ZS ac–ac converters. Various ZS-based HFTI proposed ac–ac converters are also presented thereafter. Moreover, a laboratory prototype of the proposed converter is constructed and experiments are conducted to produce output voltage of 110 Vrms / 60 Hz, which verify the operation of the proposed converters. [ABSTRACT FROM AUTHOR]

This paper presents a novel fully integrated step-up dc/dc converter containing circuits to improve electromagnetic emissions. This design utilizes current sources to limit the impulsive current flow into the integrated flying capacitors. This reduces the discontinuous pulse currents normally associated with capacitive converters causing electromagnetic interference (EMI). A variable reference current enables the converter to operate with the lowest possible emissions through the entire operating range and is used to regulate the output voltage. The inclusion of low EMI techniques enables fully integrated power converters to be implemented in systems where noise produced by converters currently restricts or prohibits their use. The proposed 3.2 mW voltage doubler was fabricated in a 0.18 $\mu$m CMOS process. With an input voltage range of 1–1.8 V, the converter produces a 1.6–3.3 V output. Experimental results verify the reduction of emissions to meet IEC 61967-4 Class L using current control with a reduction of noise voltage when compared with the circuit without the proposed techniques. [ABSTRACT FROM AUTHOR]

In this paper, an input-series two-transistor forward converter is proposed and investigated, which is aimed at high-input voltage multiple-output applications. In this converter, all of the switches are operating synchronously, and the input voltage sharing (IVS) of each series-module is achieved automatically by the coupling of primary windings of the common forward integrated transformer. The active IVS processes are analyzed based on the model of the forward integrated transformer. Through the influence analysis when the mismatches in various series-modules are considered, design principles of the key parameters in each series-module are discussed to suppress the input voltage difference. Finally, a 96-W laboratory-made prototype composed of two forward series-modules is built, and the feasibility of the proposed method and the theoretical analysis are verified by the experimental results. [ABSTRACT FROM PUBLISHER]

This paper proposes a new bridge modular switched-capacitor-based ac–ac converter, which is intended to replace conventional transformers in commercial and residential applications, especially for microgrids. The main advantages of the proposed converter lie in high efficiency and power factor, bidirectional operation, and capacitor voltage self-balancing ability. Another distinct merit is its symmetric construction, with which the voltage ripple of charge/pump capacitors can be cancelled out, and the output voltage will be smooth with significant ripple reduction. It is also noteworthy that the symmetric construction ensures that the two symmetric parts can work independently under a simplified control strategy. In addition, the modular configuration contributes to convenient voltage extension. Compared with the reported flying-capacitor switched-capacitor ac–ac converter, the proposed converter requires fewer switches and capacitors per unit of voltage conversion, thus suffering lower voltage stress. To demonstrate the performance of the converter, a prototype with 600-W 220-Vrms high-side voltage, 55-Vrms low-side voltage, and a switching frequency of 100 kHz was designed and fabricated. The relevant experimental results are reported herein. The maximum and rated power efficiency obtained were 95.9% and 94.4%, respectively. [ABSTRACT FROM PUBLISHER]

In this paper, a novel converter is presented to improve the excitation process in switched reluctance generators (SRGs). Accumulator capacitor converter (ACC) is based on a singular scheme of flyback converters. ACC performs two main roles. First, in an initial step, it charges an accumulator capacitor with a determined value of voltage; then, during the magnetizing period, it discharges the stored energy into machine coils. Therefore, ACC provides the SRG with a determined magnetizing energy and uses the forced magnetizing phenomenon to magnetize its coils. The processes yield some outstanding superiority such as excellent operation at high speeds, simple controlling scheme, lower stress on the excitation source, etc., over conventional converters. To analyze the performance of ACC, the required analytical expressions for charging the capacitor and discharging it into the coils are developed and the constraints for switching periods are demonstrated in detail. Afterward, through MATLAB/Simulink and finite-element analysis (FEA) simulations, its operation is evaluated and compared to conventional asymmetric bridge and bifilar converters (BFCs); moreover, its test bed is assembled and tested experimentally, and its results, along with the simulation ones, validates ACC performance. [ABSTRACT FROM PUBLISHER]

DC–DC converters with voltage boost capability are widely used in a large number of power conversion applications, from fraction-of-volt to tens of thousands of volts at power levels from milliwatts to megawatts. The literature has reported on various voltage-boosting techniques, in which fundamental energy storing elements (inductors and capacitors) and/or transformers in conjunction with switch(es) and diode(s) are utilized in the circuit. These techniques include switched capacitor (charge pump), voltage multiplier, switched inductor/voltage lift, magnetic coupling, and multistage/-level, and each has its own merits and demerits depending on application, in terms of cost, complexity, power density, reliability, and efficiency. To meet the growing demand for such applications, new power converter topologies that use the above voltage-boosting techniques, as well as some active and passive components, are continuously being proposed. The permutations and combinations of the various voltage-boosting techniques with additional components in a circuit allow for numerous new topologies and configurations, which are often confusing and difficult to follow. Therefore, to present a clear picture on the general law and framework of the development of next-generation step-up dc–dc converters, this paper aims to comprehensively review and classify various step-up dc–dc converters based on their characteristics and voltage-boosting techniques. In addition, the advantages and disadvantages of these voltage-boosting techniques and associated converters are discussed in detail. Finally, broad applications of dc–dc converters are presented and summarized with comparative study of different voltage-boosting techniques. [ABSTRACT FROM AUTHOR]

High-voltage wide bandgap semiconductor devices such as the 15 kV SiC mosfet have attracted great attention because of their potential applications in high-voltage and high-frequency power converters. However, these devices are not commercially available at the moment, and their high cost due to expensive material growth and fabrication may limit their widespread adoption in the future. In this paper, a 15-kV 40-A SiC three-terminal power switch, the Future Renewable Electric Energy Delivery and Management (FREEDM) supercascode, is reported for the first time, which is based on a series connection of 1.2-kV SiC power devices. Compared with the monolithic 15-kV SiC mosfet, the FREEDM supercascode demonstrates obvious advantages in cost and thermal conductivity. The design and voltage-balancing mechanism of the FREEDM supercascode are introduced, and the performance including the voltage balancing, conduction characteristics over a wide range of temperatures, and dynamic switching performance, is analyzed. The FREEDM supercascode's low cost and excellent thermal dissipation capability will facilitate early applications of SiC in very high voltage and high frequency power converters. [ABSTRACT FROM AUTHOR]

Power systems for exploration rovers tend to be complex as three separate converters are necessary; in addition to a main dc–dc converter and cell equalizer for rechargeable energy storage cells, an equalizer for photovoltaic (PV) modules is desirably equipped in order to preclude negative impacts of partial shading. This paper proposes the pulse width modulation (PWM) converter integrating voltage equalizers for PV modules and energy storage cells. The proposed integrated converter comprises a switched capacitor converter, PWM buck converter, and series-resonant voltage multiplier that perform PV equalization, power conversion from the PV modules to the load, and cell equalization, respectively. Three converters can be integrated into a single unit with reducing the total switch counts, achieving not only system-level but also circuit-level simplifications. The derivation procedure of the integrated converter is explained, followed by the operation analysis. Experimental tests were performed using series-connected supercapacitor (SC) modules and solar array simulators to emulate a partial shading condition. With the integrated converter, the extractable maximum power from the PV modules significantly increased while voltage imbalance of SC modules was adequately eliminated, demonstrating the integrated performance of the proposed converter. [ABSTRACT FROM AUTHOR]

Dynamic voltage restorer (DVR) technology has become a mature power quality product. In high-power applications, DVR using a multilevel converter is commonly used. However, DVR using a multilevel direct pulse width modulation (PWM) ac–ac converter has not been well studied. This paper presents a new DVR topology using a cascaded multilevel direct PWM ac–ac converter. In the proposed scheme, the unit cell of the multilevel converter consists of a single-phase PWM ac-ac converter using switching cell structure with coupled inductors. Therefore, the multilevel converter can be short- and open-circuited without damaging the switching devices. Neither lossy RC snubber nor a dedicated soft commutation strategy is required in the proposed DVR. This improves the reliability of the DVR system. The output voltage levels of the multilevel converter increase with the number of cascaded unit cells, and a high ac output voltage is obtained by using low-voltage-rating switching devices. Furthermore, a phase-shifted PWM technique is applied to significantly reduce the size of the output filter inductor. A 1-kW prototype of single-phase DVR is developed, and its performance is experimentally verified. Finally, the simulation results are shown for a three-phase DVR system. [ABSTRACT FROM AUTHOR]

Traditional load regulation methods for a resonant converter mainly rely on frequency modulation. It is always a tradeoff between the design of the resonant network and the range of load. Especially for wireless power transfer (WPT) systems, the resonant network usually has a high quality factor. Small variation on frequency leads to huge drop in gain and efficiency. Due to this problem, many WPT systems are unregulated and they need one or two more front-end stages to regulate the dc bus voltage and perform power factor correction (PFC). In order to lower the cost and complexity of two- or three-stages structure, a single-stage solution with a silicon carbide (SiC) based Z-source resonant converter (ZSRC) was recently proposed. The Z-source network provides high reliability as being immune to shoot-through problems. Additionally, a ZSRC can boost the dc bus voltage while the traditional voltage-source inverter can only produce a lower voltage. However, the load regulation of this new topology has not been addressed. Two effective load regulation methods with constant frequency are presented for this SiC-based ZSRC specifically. Operation principle of the two load regulation methods are described in this paper. Experimental results based on a 200-W scale-down prototype with a full-bridge series resonant dc–dc converter are presented to illustrate the mechanism of these two methods. [ABSTRACT FROM AUTHOR]

A novel circuit with the better performance for the inductive pulsed power supplies in the electromagnetic launch system is proposed in this paper, namely, the meat grinder with capacitive pulse forming unit (CPFU). Its working process is qualitatively analyzed stage by stage. Its practical feasibility is verified through a 7.5-kJ experiment. From the perspectives of circuit structure and working principle, this circuit can be regarded as the combination of a meat grinder and a CPFU. Compared with its preceding circuits, this circuit possesses following advantages: 1) the self-recovery of the capacitor precharged voltage can easily be achieved, which is conducive to continuous operations of the whole circuit and 2) the waveforms of the inductor currents contain no capacitive components, which can promote the energy storage density of the inductors. [ABSTRACT FROM PUBLISHER]

This paper presents an optimized topology for a \text3-\phi three-level inverter with complete elimination of common-mode voltage (CMV). The proposed multilevel inverter (MLI) configuration is realized by modifying a T-structure \text3-\phi inverter. The proposed configuration is an optimized solution with respect to the pulse-width modulation strategy used for CMV elimination. The given three-level inverter structure uses only 16 power semiconductor switches, which is much lower than the existing configurations. A reduced number of power semiconductor devices results in a diminished number of driver circuits, less installation space, and low cost. Further, due to the complete elimination of CMV, the proposed MLI is free from issues such as electromagnetic interference and leakage current with a reduction in filter requirement. The presented topology is also compared with other existing topologies to prove its advantage. It is an optimized solution with respect to the dc bus voltage requirement and the total voltage rating of the devices or the components used in the system. Simulation and experimental results are presented to confirm the capability of the proposed MLI. [ABSTRACT FROM AUTHOR]

A novel hybrid five-level voltage-source converter for high-efficiency applications is investigated in this paper. Compared with traditional multilevel converters, this hybrid multilevel converter generates desired staircase voltage levels with a reduced number of power devices and isolated drivers at higher voltage levels. It has redundant switching state combinations in hybrid multilevel converter, which makes it easy to balance flying capacitor voltages and realize fault-tolerant operation. A voltage-balancing control strategy based on switching state redundancies is presented for the hybrid multilevel converter to generate desired levels and also keep voltage balance of flying capacitors at the same time. The performance of the hybrid multilevel converter under various operating conditions is investigated in MATLAB/Simulink. The effectiveness of the proposed hybrid multilevel converter is validated by experiment results. [ABSTRACT FROM AUTHOR]

In this paper, a new type of matrix converter (MC) also called a single-phase high-frequency transformer isolated (HFTI) buck MC is proposed. The proposed converter can provide step-down operation of the input voltage with various types of output voltages such as in-phase and out-of-phase output voltages, rectified (or positive) output voltage, and output voltage with step-changed frequency. By incorporating HFT isolation, the proposed MC saves an extra bulky line frequency transformer, which is required for the conventional MCs to provide electrical isolation and safety, when used in application such as dynamic voltage restorers, etc. Two different circuit variations of the proposed HFTI MC are presented with and without continuous output currents, with the latter having less passive components. The safe-commutation strategy is also employed for the proposed HFTI MC to provide current path for the inductor during dead-time, which avoids switch voltage spikes without adding any snubber circuits. The operation principle and circuit analysis of the proposed MC are presented, and switching strategies are also developed to obtain various output voltages. Moreover, a prototype of the proposed MC is fabricated, and experiments are performed to produce in-phase/out-of-phase and rectified output voltages, and output voltage with step-changed frequency. [ABSTRACT FROM PUBLISHER]

To solve the problem of the mismatched voltage levels between the dynamic lower voltage of the fuel cell stack and the required constant higher voltage (400 V) of the dc-link bus of the inverter for fuel cell vehicles, a boost three-level dc–dc converter with a diode rectification quasi-Z source (BTL-DRqZ) is presented in this paper, based on the conventional flying-capacitor boost three-level dc–dc converter. The operating principle of a wide range voltage-gain for this topology is discussed according to the effective switching states of the converter and the multiloop energy communication characteristic of the DRqZ source. The relationship between the quasi-Z source net capacitor voltages, the modulation index, and the output voltage is deduced and then the static and dynamic self-balance principle of the flying-capacitor voltage is presented. Furthermore, a boost three-level dc–dc converter with a synchronous rectification quasi-Z source (BTL-SRqZ) is additionally proposed to improve the conversion efficiency. Finally, a scale-down 1.2 kW BTL-SRqZ prototype has been created, and the maximum efficiency is improved up to 95.66% by using synchronous rectification. The experimental results validate the feasibility of the proposed topology and the correctness of its operating principles. It is suitable for the fuel cell vehicles. [ABSTRACT FROM PUBLISHER]

The paper presents a new bridgeless power factor correction (PFC) topology, using a recently proposed controllable LCL filter, namely active virtual ground to achieve efficient power conversion, and high-frequency common mode voltage (CM) reduction. The proposed PFC circuit consists of high-frequency semiconductors for shaping inductor current and low-frequency semiconductors to form two different LCL structures for different conditions. This reduces grid differential mode current ripple or inductance. Besides, the PFC CM voltage, a main problem of bridgeless PFCs, is significantly reduced, since the capacitor in the LCL filter clamps the voltage between the grid and the converter ground. The performance of the proposed PFC is experimentally verified. The results show that the proposed PFC guarantees sinusoidal input current, low high-frequency common-mode voltage noise, and has a good agreement with the theoretical findings. [ABSTRACT FROM AUTHOR]

The three-level flying capacitor (3L-FC) submodule significantly reduces the magnitude of circulating currents, voltage ripple, and footprint size and improves the efficiency of the modular multilevel converter (MMC). Due to the above advantages, the 3L-FC submodule becomes an alternative for the conventional half-bridge submodule in the MMC. Each 3L-FC submodule consists of two floating capacitors with different nominal voltage rating. The precharging of floating capacitors without inrush current is one of the major challenges in the 3L-FC-based MMC. This paper proposes a sequence of design steps to precharge the floating capacitors in the 3L-FC-based MMC. The proposed approach is highly effective to charge the outer and inner capacitors of each 3L-FC submodule to their nominal value. The superiority of the proposed approach is verified through the MATLAB simulations and dSPACE/DS1103 experiments on a laboratory prototype of the 3L-FC-based MMC. [ABSTRACT FROM AUTHOR]

In signal injection sensorless drives, the injection voltage cannot be reduced under a certain value. The lower limit of the injection voltage is mainly enforced by the inverter nonlinearity that causes distortion of the injection voltage and degradation of the position estimation performance. After analyzing the inverter nonlinearity during the voltage injection, it is revealed that parasitic capacitances of insulated-gate bipolar transistors have positive effects on inverter output linearity and sensorless control. Based on this analysis, this paper proposes a method to reduce the injection voltage by connecting additional capacitors to the output terminals of the inverter. Simulation and experimental results are provided to verify the effectiveness of the proposed idea. In the experiments, using the capacitor-integrated inverter, it is shown that the injection voltage can be reduced by more than half without degrading the position estimation performance. [ABSTRACT FROM AUTHOR]

To solve some problems caused by the ac control method used for the existing modular multilevel dc–dc converter (MMDC), this paper has proposed a new MMDC topology with a wide range of output voltage by means of dc control. By reconstructing the submodule structure, the converter has a power branch and an auxiliary balance branch, which are used to transmit dc power and balance the capacitor voltage, respectively. Both dc analysis and control method are adopted to establish a mathematical model so as to deduce the mathematical relationships between the key electrical parameters. Moreover, what have been done include analyzing the self-balancing principle of the capacitor voltage and the mechanism of the auxiliary balance branch, calculating the related parameters of the capacitor voltage fluctuation, and presenting a dc closed-loop control strategy based on a small-signal model. The analyses of the steady and dynamic states in combination with simulation and experiment show that the proposed converter can stably operate in the mode of dc control, with a large adjustable range of output voltage, a small fluctuation in voltage of the capacitor, and the ability of the inductor to suppress the spike of the auxiliary balance current effectively so as to reduce the impact on the device. [ABSTRACT FROM AUTHOR]

Isolated modular multilevel dc–dc converter (IMMDCC), which consists of two modular multilevel converters and a medium-frequency transformer, is attractive for medium-voltage applications because of the following features: the modular structure can handle higher voltage, and synthesizing square-wave voltages toward the alternating current (ac) link increases the dc voltage utilization ratio and achieves the zero-voltage switching operation. However, the asymmetry of arm impedance in practice inevitably leads to power imbalance and divergence of total capacitor voltages in the upper and lower arms of IMMDCC, thereby inducing large ripples in the common-mode arm current and adding a dc bias to the synthesized ac voltage. To compensate for the power imbalance and maintain the stable operation, the interarm phase-shift modulation (IAPSM) scheme and arm voltage-balancing control strategy based on this scheme are presented in this paper. Combining the IAPSM scheme with the intersubmodule phase-shift modulation scheme, deep rising and falling edges of the synthesized square-wave voltage in each phase leg are modified into staircase waveforms with 2N + 1 steps, dv/dt in the ac-link is thus significantly reduced. Simulation and experimental results validate the theoretical analysis and control strategy. [ABSTRACT FROM AUTHOR]

This paper proposes a zero-ripple input-current high-step-up boost–single ended primary inductor converter (SEPIC) dc–dc converter with reduced switch-voltage stress to overcome some drawbacks of the conventional cascaded boost–SEPIC dc–dc converter. In the proposed converter, the input current ripple is significantly removed by the auxiliary circuit at the boost stage and the voltage gain is more increased by using turn ratio of a coupled inductor at the SEPIC stage. Additional, the switch-voltage stress is reduced due to the clamping circuit, and the reverse-recovery problem of the output diode is alleviated by the leakage inductor. Hence, the low-voltage-rating MOSFET, which has low $R_{{{\rm ds(on)}}}$, can be utilized as a main switch device. Therefore, the total power efficiency is improved. The theoretical analysis of the proposed converter is verified on an output 200-V to 200-W prototype. [ABSTRACT FROM AUTHOR]

This paper proposes a soft-switched interleaved boost converter with minimal conduction loss increment and removed reverse-recovery problem. The soft-switching operation is enabled by a soft-switching cell composed of passive components in which an auxiliary coupled inductor and a dc-link capacitor are connected between the switch legs of the interleaved boost modules and output stage. Every MOSFET switch of the proposed boost converter operates with zero-voltage switching turn-on using the coupled inductor current. Consequently, the switching loss of the proposed interleaved boost converter is greatly reduced. In addition, the reduced circulating current in the auxiliary circuit minimizes the increment of the conduction loss. The proposed soft-switched interleaved boost converter operation is verified with 500-W experimental results. [ABSTRACT FROM AUTHOR]

This paper presents a single-phase ac power supply circuit that based on modified voltage-fed quasi-Z-source inverter topology; it suits to the light or the heavy load and is fit for the resistive, inductive, or capacitive load. The topology, operating principle, voltage gain, control method, and its realization by DSP are described in this paper. The feasibility and rationality of the system is verified by the simulation and experimental results. [ABSTRACT FROM PUBLISHER]

As penetration of distributed generation increases, the electrical distribution networks may encounter several challenges mainly related to voltage control. The situation may deteriorate in case of a weak grid connected to an intermittent source such as photovoltaic (PV) generation. Fast varying solar irradiance can cause unacceptable voltage variations that may not be easily compensated by slow-responding utility equipment. The PV inverter can be used to control the grid voltage by injecting/absorbing reactive power. A small-signal model is derived in order to study the stability of a PV inverter exchanging reactive power with the grid. This paper also proposes a method that utilizes the available capacity of the PV inverter to support the grid voltage without violating the rating of the inverter and the maximum voltage that the inverter's switching device can withstand. The method proposed in this paper is validated using PSCAD/EMTDC simulations. [ABSTRACT FROM PUBLISHER]

Full-bridge single-stage (FBSS) ac-dc converters allow to regulate both the output voltage and the input current that achieves a near sinusoidal waveform using only the four bridge transistors. Independent of this feature, these converters still need to be optimized in order to become an interesting and attractive solution for modern switch mode power supplies with power factor corrector (PFC) function. One of the most important improvements needed is the downsizing of the dc bus capacitor C b with the inherent cost reduction. However, this action introduces complex issues in the regulation of the input current and it is also responsible for the generation of high output voltage ripple. The new contribution of this paper consists in the introduction of a set of power circuit optimizations and control techniques in a FBSS PFC converter that solves the referred issues in order to enable the reduction of the dc bus capacitor's size and cost. These procedures are based in the use of a free wheeling circuit that improves the light load operation and in the application of one shot nonlinear modulator, in order reduce the output voltage ripple even when the dc bus ripple is high. The possibility of using, in the proposed topology, a reduced ratio capacitance/watt lower than the typical values used in commercial applications (0.7-0.5 μF/W for 385-450 V, respectively), while maintaining the accurate input current regulation, is also theoretically proved. The developed concepts, solutions and design criteria are detailed described in the paper. The correspondent theoretical study is verified trough experimental results token in an optimized FBSS topology prototype. [ABSTRACT FROM AUTHOR]

The five-level active neutral-point-clamped (5L-ANPC) converter has been widely studied for its excellent performance in high-power medium-voltage applications. This paper analyzes the space vector pulse width modulation (SVPWM) strategy of the 5L-ANPC converter in the virtual coordinate, and presents an optimized control strategy which can balance the neutral point (NP) voltage and avoid the dead-time effects for the first time. In this strategy, on one hand, the 125 space vectors are combined by 96 triangles in the seven-segment vector synthesis method, then the triangles are divided into seven categories which have different characteristics of balancing the NP voltage, and every category has its own principles to choose the vector sequence and compute the vector durations. On the other hand, the dead-time effects of the 5L-ANPC converter are studied in detail and the transitions between different switching states are constrained in the optimized control strategy to avoid the dead-time effects that cannot be compensated by traditional pulse-based dead-time compensation methods. Finally, the optimized SVPWM strategy is experimentally verified in this paper. [ABSTRACT FROM AUTHOR]

The Z-source inverter (ZSI) employs an LC impedance network between the main inverter bridge and the power source. The unique feature of the ZSI is that it can operate either in buck or boost mode with a wide range of obtainable output voltages from a given input voltage. This topology also exhibits better electromagnetic-interference noise immunity when compared to a traditional voltage-source inverter (VSI). However, the LC impedance network of ZSI significantly increases the size and cost of the power converter and can make it unsuitable for low-power applications. This paper proposes a novel topology called switched boost inverter (SBI) which exhibits similar advantages of ZSI with lower number of passive components and more active components compared to ZSI. The steady-state and small-signal analyses of SBI, along with its pulsewidth modulation (PWM) control strategies, have been discussed in this paper. This paper also presents a comparison of SBI and ZSI with the same input and output parameters. The theoretical analysis given in this paper has been validated using a laboratory prototype of SBI, and the experimental results are presented for verification. The experimental harmonic spectrum of the inverter's output voltage with the proposed PWM technique is also plotted and compared with that of a traditional VSI. All the experimental results show good correlation between theory and experiments. [ABSTRACT FROM PUBLISHER]

This paper investigates the problem of low-frequency voltage oscillations that appear at the neutral point (NP) of a three-level neutral-point-clamped (NPC) converter. Starting with a detailed analysis of their origin, the paper derives the minimum amplitude of these oscillations that can be achieved by nearest-vector (NV) modulation strategies. It then proves that the criterion of the direction of dc-link capacitor imbalance, which is commonly adopted by NV strategies for performing the task of capacitor balancing, poses a barrier in achieving this minimum. A new criterion is proposed instead, together with an algorithm that incorporates it into existing NV strategies. For the case of NPC inverters operating as motor drives, the resulting reduction in the amplitude of NP voltage oscillations ranges from 30% to 50%. The approach has the advantage of avoiding the significant increment in switching losses and output voltage harmonic distortion, caused by other methods. Simulations in MATLAB-Simulink are used to illustrate its operation and verify that it offers the claimed benefit. [ABSTRACT FROM AUTHOR]