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This paper proposes a novel dual input nine-level inverter (DINLI) topology which requires only seven controllable devices. The dual inputs are un-identical DC voltage sources in the ratio 1:3. A simple control scheme is derived by appropriately modifying the phase disposition pulse width modulation technique to generate high-quality 9-level output from the DINLI topology. At any given instant, a maximum of four switches conduct out of which only a maximum of two switches operate at high frequency, bringing down the switching and conduction losses significantly and improving the overall system efficiency. The bidirectional DINLI (BDINLI) topology with reactive power capability can be realized by replacing the unidirectional devices with the controlled switches (i.e., total nine switches). In addition, the proposed DINLI topology does not require extra voltage balancing circuits which further improves the efficiency. The DINLI operation is verified through MATLAB simulations for grid-connected applications and its extension to an n-level, 3-phase application is also investigated. Experiments performed on a 1KVA laboratory prototype to validate the theoretical claims. [ABSTRACT FROM AUTHOR]

Two-stage AC-DC converters are considered as a prominent solution for DC-type electric vehicle (EV) chargers. However, this kind of architecture suffers from high switching losses with large heatsink and DC-link capacitor volume. To relieve this issue, this paper presents a new hybrid modulation for DC-type EV chargers, where a two-phase clamped discontinuous pulse-width-modulation (DPWM) in the front-end circuit is cooperated with the variable frequency triangular-current-mode (TCM) zero voltage switching (ZVS) or its simplified implementation, i.e., boundary-ZVS (B-ZVS) strategy, in the back-end circuit. The former can stop the switching actions in the front-end stage during two-thirds of the grid period, while the AC currents are at their highest values, which can yield to the best switching loss reduction and deliver high power factor operation. Besides, TCM-ZVS or B-ZVS modulations can achieve ZVS turn-on action for all semiconductors during all operating range in the DC-DC stage to further reduce the power losses on the semiconductors. With such characteristics, the proposed strategies can reduce the switching losses of the system to the best extent, and thus allow an enhancement of the system power density by improving the power conversion efficiency. The proposed strategy is described, analyzed, validated, and benchmarked in a 5 kW SMD SiC MOSFET-based two-stage AC-DC converter. A 99% power efficiency can be achieved with the solution implementing the TCM-ZVS strategy at an output voltage of 400 V and rated power. [ABSTRACT FROM AUTHOR]

Four-level hybrid-clamped inverter is a newly proposed topology that can operate under a wide voltage range without switches connected in series. However, when it is applied in medium voltage high power conversions, the flying capacitors in each phase will occupy a huge volume and a high switching frequency is required to restrain the voltage ripples. In order to overcome this drawback, a four-level active neutral-point clamped inverter is discussed in this paper, which consists of only six switches and no diodes or flying capacitors are required. In order to balance the neutral-point voltages under the full power factor and modulation index range, a capacitor voltage balance method based on carrier-overlapped pulsewidth modulation is proposed in this paper. The upper and lower dc-link capacitor voltages are balanced by zero-sequence voltage injection and the central dc-link capacitor voltage is balanced by adjusting the duty cycles of switching signals slightly. Simulation and experimental results are presented to confirm the validity of this method. [ABSTRACT FROM AUTHOR]

This paper presents a 5-level inverter topology for open-end induction motor drives by using a single dc source. The open stator windings of the drive are supplied with a 3-level flying capacitor inverter from one end and capacitor-fed 2-level inverter from another end. The voltage ratio of the dc link to the capacitor in 2-level inverter is maintained at 4:1 ratio to generate five-level voltage output. The capacitor in 2-level inverter is balanced by the switching redundant vector combinations from both the inverters while the floating capacitors in the 3-level inverter are balanced by using redundant switching states. The proposed topology gives 5-level operation with less number of floating capacitors and power semiconductor switches compared to other existing topologies. Also, the balancing of the capacitors is independent of load power factor and modulation index. Further, the generalization of the proposed dual inverter scheme for any n-level inverter is also included in this paper. The experimental results and required analysis are also presented to validate the inverter scheme. [ABSTRACT FROM AUTHOR]

A new single stage three-phase ac–dc converter with four switches and galvanic isolation is proposed in this paper. The new converter is simple and uses fewer switches than previously proposed ac–dc converters of the same type. It is a bridgeless converter that can operate with continuous input current and with any pulsewidth modulated method suitable for a standard three-phase six-switch voltage source rectifier. In this paper, the operation, control, analysis, and design of the proposed converter are explained and its features are discussed. Experimental results obtained from a prototype that confirm the feasibility of the converter are presented as well. [ABSTRACT FROM AUTHOR]

This paper presents a novel seven-level inverter topology for medium-voltage high-power applications. It consists of eight active switches and two inner flying capacitor (FC) units forming a similar structure as in a conventional active neutral-point-clamped (ANPC) inverter. This unique arrangement reduces the number of active and passive components. A simple modulation technique reduces cost and complexity in the control system design without compromising reactive power capability. In addition, compared to major conventional seven-level inverter topologies, such as the neutral point clamped, FC, cascaded H-bridge, and ANPC topologies, the new topology reduces the dc-link voltage requirement by 50%. This recued dc-link voltage makes the new topology appealing for various industrial applications. Experimental results from a 2.2-kVA prototype are presented to support the theoretical analysis presented in this paper. The prototype demonstrates a conversion efficiency of around 97.2% ± 1% for a wide load range. [ABSTRACT FROM AUTHOR]

This paper presents a neutral-point deviation and ripple compensating control method applied to a three-level neutral-point-clamped (NPC) converter. The neutral-point deviation and its harmonic components are analyzed with a focus on the average current flowing through the neutral-point of the dc link. This paper also proposes a control scheme compensating for the neutral-point deviation and dominant harmonic components under generalized unbalanced grid operating conditions. The positive and negative sequence components of the switching functions and ac input currents are employed to accurately explain the behavior of three-level NPC converter. Simulation and experimental results are presented to verify the validity of the proposed method. [ABSTRACT FROM AUTHOR]

This paper proposes a new class of topologies of single-stage high-frequency ac-link power converters, which is capable of providing both voltage step up/down within a wide frequency and voltage ranges. The proposed family, which supports bidirectional power flow, can interface various single/multi-port dc and/or single/multi-phase ac systems to provide dc–dc, dc–ac, ac–dc, or ac–ac power conversion. In this family of converter, which offers a very modular structure, a small inductor that forms the link exchanges power entirely or partially between the source and load. The proposed family can function in buck, boost, and/or buck–boost modes of operation, and a combination of these modes of operation is also feasible. In comparison to the parallel inductive four-quadrant link converters, the proposed family features a significantly reduced link peak current, reduced switch ratings, and reduced total number of power switches. These features enhance the efficiency, reduce the total cost, and increase the power density of the system. In order to further improve the overall efficiency of the system, minimize the current/voltage stress over all utilized semiconductor devices, and lower electromagnetic interference (EMI), a small capacitor is placed in parallel with the link inductor to realize soft-switching operation for the proposed configurations. Moreover, the proposed converters have the potential to incorporate a lightweight single-phase high-frequency transformer for electrical isolation. The proposed circuit topologies prevent reverse recovery issues and eliminate losses corresponding to body diodes of power switching devices via utilizing power switches in conjunction with external fast recovery diodes. The proposed family offers a very high level of reliability owing to its immunity from short circuit of input and output terminals and open circuit of the link inductor, which may occur in other power converters due to commutation problem resulting from a short deadtime or an overlap time between switches, unwanted control command, delay in electronic circuits, or EMI noise's misgating on or off, in addition to the absence of electrolytic capacitors in the power circuit. A control approach is also developed to regulate input and output currents in one stage of power conversion. A detailed theoretical analysis, operation, design methodology, and control strategy of the proposed family are provided in this paper, and the effectiveness and performance of the proposed converter family are verified via simulation results and experimentally. [ABSTRACT FROM AUTHOR]

In this paper, a new class of bidirectional partial-resonance power converters is presented. The proposed family can be configured to interface single- or multi-port dc, single- or multi-phase ac systems at input-side and/or output-side. The proposed family offers a very modular structure, which can lead to cost reduction from a common designed module. In this converter, which accomplishes power conversion in a single stage, a small inductor placed in series with the input and output switch-bridges forms the link. This small link inductor is responsible for transferring power between different ports of the system. The proposed topologies can operate in buck, boost, and buck–boost modes of operation to step up and/or step down the voltage. In buck–boost mode of operation, the converter is controlled such that the power is entirely transferred through the link inductor; whereas, in buck or boost modes of operation only a fraction of the power is transferred through the link inductor, and the remaining power is directly transferred from input phases to the output phases. Galvanic isolation, which is typically a prominent factor contributing to power density of a converter, can be provided by means of a compact and lightweight single-phase high-frequency transformer added to the link. In comparison with earlier generations of partial-resonance inductive-link power converters, in the proposed converter, the level of link peak current and consequently power-loss, as well as voltage and current stress of switches are dramatically decreased. A very small film capacitor can be placed in parallel with the link inductor to facilitate zero-voltage-switching (ZVS) operation for all the switches/diodes. Apart from increasing the overall efficiency, minimized dv/dt stress and improvement in power density are achieved by adding the link capacitor. The proposed converter employs four-quadrant switches, i.e., bidirectional-conducting bidirectional-blocking switches, and charges the link inductor in both positive and negative directions in each cycle. In view of this, better utilization of the link inductor and lower total harmonic distortion (THD) are offered. Furthermore, two distinct switching algorithms are developed for the proposed family of converters. In this paper, the detailed behavior of the proposed family is investigated analytically, and simulation and experimental results are presented to evaluate the performance and effectiveness of the proposed converter. A low-power proof-of-concept prototype with input voltage of 59 V/161 V, load voltage of 178 V/73.5 V, maximum switching frequency of 4.9 kHz/3.65 kHz at 215 W/450 W in a step-up/step-down operation is considered for the experimental verification. [ABSTRACT FROM AUTHOR]

An improved two-stage model predictive current control (MPCC) for three-phase three-level converters in the paper, which can simultaneously achieve common-mode voltage (CMV) reduction, effective dc-link capacitor voltage control, and decreased computational burden, is proposed. Compared to the other current control strategies, it has the capability of handling multiple control objectives and possesses a simple structure. Furthermore, it greatly reduces the CMV since the peak CMVs of all the candidate voltage vectors are constrained to be less than one sixth of the dc-link voltage. In addition, an optimal two-stage voltage vector selection mechanism is employed in the proposed method. It helps to significantly reduce the computational complexity. Simulation and experimental results are provided to verify the effectiveness of the proposed method. [ABSTRACT FROM AUTHOR]

Motors and inverters are increasingly being used in vehicles. As more vehicle components are being adopted, requirement for safety and installation space are increasing. Growing attention is being paid to the use of six-phase permanent magnet synchronous motors (PMSMs) and their parallel control by two inverters, because of their reduced size and enhanced safety. This paper proposes a pulsewidth modulation (PWM) control algorithm for a six-phase PMSM. In low-voltage vehicle components such as electric power steering, the current is usually acquired with resistors placed under the low-side switching devices. In the proposed control algorithm, the neutral voltage of the two inverters is shifted to either a lower or higher voltage within a certain range to allow for the signal conditioning time delay after the switching device turns on or off, and the time taken for the phase current to rise or settle. The paper proposes a novel PWM control algorithm that ensures that the on-time of the low-side switching devices satisfies the restriction on current sensing with resistors and reduces the current in the capacitor at the same time. The work contributes to reducing the current in a practical configuration involving low-voltage vehicle components. [ABSTRACT FROM AUTHOR]

A trinary multilevel converter uses a few heterogeneous H-bridge submodules (SMs) to synthesize an output voltage with multiple levels. Two major limitations of this converter are that it needs multiple dc sources and it cannot operate under pulsewidth modulation (PWM). This paper addresses these limitations by adding a low-voltage H-bridge SM to this converter and proposing a new switching algorithm. The resulting PWM-based asymmetric cascaded H-bridge converter uses only one dc source and synthesizes a high-quality output voltage. This improved converter can be a potential choice for real and reactive power support in power system applications. This paper also proposes methods for stability analysis and design of this converter. Experimental case studies evaluate the performance of the proposed converter for both standalone and grid-connected modes of operation. [ABSTRACT FROM AUTHOR]

A modular multilevel converter (MMC) is regarded as a promising topology in high-voltage direct current systems. However, the MMC consists of numerous submodules (SMs) and switching devices, which lead to a considerable switching loss, and increased cost and size of the heat sink. To mitigate these issues, this paper presents a novel modulation method composed of fundamental frequency modulation (FFM) and multicarrier-based sinusoidal pulsewidth modulation schemes. The main purpose of this modulation method is the reduction of switching loss while maintaining good harmonic performance. However, the FFM scheme leads to the unbalanced capacitor voltage of each SM in the MMC. Accordingly, this paper additionally proposes the rotation method and selective voltage balancing control for SMs to ensure effective performance of the method. Simulation and experimental results verify the effectiveness and performance of the proposed modulation scheme through switching loss and spectral analyses. [ABSTRACT FROM AUTHOR]

This paper develops a modulation based fault-tolerant (FT) strategy for restoring the operation of three-phase modular multilevel converters (MMCs) with faulty switches. This FT strategy is based on a proposed modified space vector modulation (SVM) technique that generates balanced line-to-line (line) voltages even in the case of a fault occurrence. In the postfault operation, the proposed strategy is able to restore the fundamental amplitude of the line to the neutral (load) voltages to that of the normal operation condition with a slightly increased voltage stress over the switches in the faulty phase. In this paper, first a brief background about MMCs and SVM technique is provided. Then, the proposed FT strategy and the modified SVM technique are presented. Finally, several simulation and experimental results are provided to validate operation of the proposed strategy. [ABSTRACT FROM AUTHOR]

This paper presents two capacitor voltage balancing (CVB) strategies for modular multilevel converter (MMC) applications. Both balancing schemes are based on model predictive control and are designed to efficiently solve a constrained optimal control problem, where the predicted capacitor voltage errors are included in the cost function with the demanded output voltage of a cluster being forced through an equality constraint. The first method proposed in this paper computes specific modulation indexes for each module using the explicit solution of a relaxed version of the original optimization problem. The second approach proposed in this paper reduces the complexity of the original problem by linearizing the objective function and using an optimal sorting network based on a greedy algorithm to solve this approximation. Considering the structures of both solution approaches, they are integrated into modulation schemes based on phase-shifted and level-shifted pulsewidth modulation algorithms, respectively. Experimental results obtained from a nine-cell single-phase MMC prototype demonstrate the good performance achieved with the proposed methodologies, as well as the implementation simplicity offered by the proposed CVB algorithms. [ABSTRACT FROM AUTHOR]

This paper presents a new six-level flying capacitor based (FC-based) multilevel converter with one dc source and the capability of operating in all power factors and modulation indexes. Multilevel converters with one dc voltage source are attractive in many applications as they do not need rather expensive and bulky multiwinding input transformer connection at the dc side. On the other hand, not all classic multilevel converters with one dc source can produce any desirable number of output voltage levels at all power factors and/or modulation indexes. In this paper, a hybrid structure is proposed in which six voltage levels can be realized at the ac terminals. The modulation technique and the control strategy for the FC voltage balancing are presented. To show the advantages of the proposed converter, different performance criteria, such as switch count and rating, the size of capacitors, switching frequency, and power losses, are compared with other existing six-level topologies. The results indicate that the proposed structure is superior to other six-level converters from different standpoints. Simulation results are used to further evaluate the performance of the proposed converter. A laboratory-type experimental setup is used to validate the theoretical results. [ABSTRACT FROM AUTHOR]

In this paper, a new structure for a nonisolated boost dc–dc converter is proposed. The proposed converter generates higher voltage gain than some conventional nonisolated boost dc–dc converters. In this paper, the voltage and current equations of the elements and voltage gain in continuous conduction mode and discontinuous conduction mode are extracted. Then, the critical inductance converter is extracted and the current stresses in the switches are calculated. To achieve high voltage gain, a generalized structure based on the proposed structure generates for dc–dc converters. Meanwhile, the root mean square current relations of devices are obtained for an extended structure. Finally, the results of PSCAD/EMTDC software and laboratory prototype are used to reconfirm theoretical concept. [ABSTRACT FROM AUTHOR]

This paper proposes a new single-phase single-stage switched-boost inverter with four switches. Like the quasi-Z-source inverter and quasi-switched boost inverter (qSBI), the proposed inverter has the main features as continuous input current, buck/boost voltage with single-stage conversion, and shoot-through immunity. Compared to the qSBI, the proposed inverter uses one more capacitor and one less switch. This paper presents the operating principles, pulse-width modulation control strategy, parameter design guidelines, and simulation results for the proposed inverter. To verify the performance of the proposed inverter, an 800-W prototype was built with an 110 V/50 Hz output voltage in stand-alone and grid-connected modes. The simulation and experimental results matched those of the theoretical analysis. [ABSTRACT FROM AUTHOR]

Multilevel converters with floating capacitors (FCs) are widely applied in recent years in a wide range of industrial applications from high-voltage direct current systems to high power drives. However, some FC topologies lack complete FC voltage balancing capability due to the inherent topology limitation or the insufficient switching state for capacitor balancing. This will result in large ripples on capacitors at low frequency (such as fundamental frequency), limiting their performance and application, particularly, when the fundamental frequency is very low in low-speed drive operations. Typical examples of those multilevel converters are modular multilevel converters (MMC), nested neutral-point-clamped (NNPC) converter, etc. In order to improve the FC balancing for this kind of multilevel converters, this paper proposes a carrier-based pulse-width modulation (PWM) method, named stair edge PWM method. This method can obtain sufficient redundant switching states for FC voltage balancing by producing multiple levels in one PWM period. The FC voltage balancing is thus achieved at switching frequency, which can greatly reduce the capacitor voltage ripple and therefore enable the use of much smaller FCs. Meanwhile, the voltage stress on each device and low $dv/dt$ feature are still the same as the normal multilevel operation, reserving two of the most salient features of multilevel converters. The proposed method also features much simpler and easier implementation compared with space-vector-based approaches, particularly when high-level converters are considered. An application example using a four-level NNPC converter is provided in this paper. The effectiveness and performance of the proposed method are verified by both simulation and experiment. [ABSTRACT FROM AUTHOR]

In this paper, two structures are proposed for the switched-inductor quasi-Z-source inverter. In the proposed structures to extend the voltage gain of inverter, two new switched-inductor structures are used. In the proposed structures, voltage across the capacitors in the Z-source network and in the switched-inductor is symmetric and small. The other advantage of proposed inverters is known as achieving higher voltage gain per smaller duty cycle ratio (of shoot-through). Compared with a conventional continuous input current switched-inductor quasi-Z-source inverter at the same gain voltage, there is less of a ripple of input current in the proposed inverters. In this paper, at first the both the conventional and the proposed switched-inductor Z-source inventers are thoroughly investigated to find out their governing relations. Then, the proposed Z-source inverters are compared with the conventional ones by simulating them to assess their performance efficiency. Next, applying the simple boost pulse width modulation the simulation is carried out with PSCAD/EMTDC software. After that, to evaluate the obtained results, the prototypes of the proposed inverters with 48 Vdc input voltage are used. [ABSTRACT FROM PUBLISHER]

This paper presents a novel six-pulse low-frequency (LF) fluctuating high-voltage dc-bus-based power system architecture for fuel cell vehicles (FCVs) application. A novel hybrid modulation scheme consisting of six-pulse modulation at LF scale and modified secondary modulation and 33% pulse width modulation at high-frequency (HF) scale is proposed. Three-phase ac waveforms for the propulsion system of FCVs are generated from LF fluctuating high-voltage dc bus. The proposed modulation technique significantly reduces the switching losses of the bidirectional dual-stage inverter: 1) soft-switching of both sides of the front-end current-fed full-bridge converter is realized; and 2) at any moment, only one leg of back-end three-phase inverter is switched at HF, while the other two legs are kept in on or off states. This tremendously reduces the bidirectional inverter's switching losses and improves the system efficiency. The LF fluctuating high-voltage dc bus allows the elimination of large electrolytic dc-link capacitor, which contributes to a more reliable and compact design. This paper presents the operation, analysis, and design of a bidirectional inverter implementing the proposed hybrid modulation technique. Simulation results obtained from power electronics simulation software PSIM and experimental results from the lab prototype clearly validate the effectiveness of the proposed modulation technique. [ABSTRACT FROM PUBLISHER]

This paper proposes an active switching harmonic current reduction method within the dc-link capacitor of two-level, three-phase, back-to-back converters. This method is based on the derived analytical solution for switching harmonic currents in the dc-link. It is shown that by controlling the pulse width modulation carrier waveform's phase angles, the harmonics in the second carrier band of the rectifier and the inverter can be synchronized such that cancellation occurs in the dc-link capacitor. This synchronization is provided by harmonic phase feedback control. The feasibility of the proposed approach has been verified experimentally and results are presented in this paper. [ABSTRACT FROM PUBLISHER]

The modular multilevel converter (MMC) with nearest level modulation (NLM) is widely used in the high voltage applications for low switching frequency and easy implementation. Existing literature has not provided a complete submodule (SM) fault ride-through scheme for MMC with NLM. In this paper, a strategy including fault detection, localization, redundancy, and recovery is proposed to ensure continuous operation of MMC under IGBT open-circuit faults conditions. It only requires a few hardware and software resources. The features of MMC and SMs with three types of failures are studied, respectively. Based on these, the fault detection method is proposed by using a simple hardware circuit, thus high computation complexity is avoided. Since current fault localization schemes are limited to MMC with carrier phase shifted pulse width modulation, this paper further proposes a strategy for MMC with NLM to locate the faulty SM and identify the fault type. After this, the fault redundancy and the proposed fault recovery method are applied to eliminate the fault and then exit the failure state. Therefore, the ability of SM fault ride-through can be realized. Analysis of failure characteristics are verified in simulation. Experimental results based on a single-phase MMC prototype with 11 SMs per arm are presented to demonstrate the validity of the proposed fault ride-through strategy. [ABSTRACT FROM AUTHOR]

This paper presents a novel single source fed isolated gate driver circuit based on the dual-forward converter topology. The two forward converters are paralleled at the secondary side to achieve 0%–100 $\%$ duty cycle range together with galvanic isolation. The gate driver switching frequency is independent of the main pulse-width modulation frequency (PWM). As a result, the gate driver switching devices and magnetics are designed for high frequencies independent of the main PWM frequency. At high frequencies, problems of resonance due to parasitics become significant. This paper discusses this problem and proposes a novel solution to mitigate it. In addition, this paper also presents a novel solution and circuit to produce negative gate pulse for miller clamp. The proposed circuit can be used for any application, irrespective of switching frequency, thus making it a wide band generalized gate driver. The circuit is analyzed and verified experimentally. [ABSTRACT FROM PUBLISHER]

The performance of modular multilevel converters (MMCs) in medium-voltage applications, where the number of required submodules is not high, can be improved utilizing low switching frequency modulations such as (2N+1) selective harmonic elimination-pulse width modulation (SHE-PWM), which provides tight control of lower order harmonics and low switching losses. This paper proposes a calculation method, which is based on a novel formulation, to solve the SHE-PWM problem. In particular, MMCs with (2N+1) phase output voltage levels are considered, obtaining a (2N+1) SHE-PWM waveform. This method utilizes a unique system of equations that is valid for any possible waveform. Therefore, it is able to calculate simultaneously, without predefined waveforms, both the switching patterns and the associated firing angles that solve the (2N+1) SHE-PWM problem. Consequently, the search process is simplified and optimized. Furthermore, this paper also proposes a circulating current control technique, which can be applied along with (2N+1) SHE-PWM without disturbing the phase output voltage. Simulation results and experimental tests obtained with a single-phase laboratory prototype prove the validity of the novel (2N+1) SHE-PWM implementation method and the proposed circulating current control technique. [ABSTRACT FROM PUBLISHER]

This paper presents a hybrid seven-level converter based on T-type converter and H-bridge cascaded suitable for low-voltage and high-power-density applications. The operation principles and conduction paths are analyzed comprehensively. Voltage balance control of the floating capacitors is the key point of this paper. Mathematical expressions of capacitor voltage balance conditions are deduced based on sinusoidal pulse width modulation (SPWM). The results show that floating capacitor voltages are only balanced when the modulation index is below 0.82 under SPWM. In order to enlarge the modulation index ensuring the capacitor voltage balance, space vector modulation (SVM) is also applied to regulate floating capacitor voltages taking advantage of redundant switching vectors. Meanwhile, in SVM, there are no additional control requirements for the capacitor voltage. Taken both SPWM and SVM into consideration, the limit to the range of operation for this seven-level converter is presented, which is a function of the modulation index and the power factor. The merit of dc voltage utilization improvement in this topology is also analyzed based on simulation results. Simulations and experimental results under different modulation index and RL load are presented to verify the modulation strategies illustrated in this paper. [ABSTRACT FROM PUBLISHER]

This paper introduces a novel five-level nested neutral point piloted (NNPP) converter and analyzes the operating principle of five-level NNPP converter. This paper presents a novel space vector pulse width modulation (SVPWM) algorithm based on gh coordinate for five-level NNPP converter. First, the common-mode voltage is reduced by choosing the appropriate redundant switching states. After that, the floating-capacitor voltage balance control strategy is presented. The appropriate switch combinations of each phase are determined by the control requirements of floating-capacitor voltages respectively and the hardware mapping method of the switching states is presented. Furthermore, the neutral-point voltage balance control strategy is presented. In order to balance the dc-link capacitor voltages, the seven-segment switching sequence is selected according to the control requirements of dc-link capacitor voltages and the neutral-point voltage regulatory factor is introduced to regulate the durations of the redundant switching states in a switching cycle. Finally, the validity of the novel SVPWM algorithm with decoupling control strategies of floating-capacitor voltages and dc-link capacitor voltages is verified by the experimental results of five-level NNPP converter under steady-state and dynamic conditions. [ABSTRACT FROM AUTHOR]

This paper proposes a new multilevel inverter (MLI) topology that utilizes trinary sequence for the dc sources. It gives maximum output voltage level with minimum dc source and switch count when compared to other sequences, such as symmetric, natural, binary, and quasi-linear. This is due to the fact that the trinary sequence generates of all additive and subtractive combinations of input dc levels in the output voltage waveform. The concept is implemented on a 9-level asymmetric MLI using only four active devices. Multicarrier unipolar pulsewidth modulation technique is adopted to create the switching pulses. Theoretical calculation of total harmonic distortion in both voltage and current waveforms has been performed using asymptotic time domain formula. These values are compared with simulation and experimental values for different modulation indices. Power loss calculation for proposed topology is discussed with appropriate mathematical equations. [ABSTRACT FROM AUTHOR]

This paper presents a novel fault-tolerant method for active–neutral-point-clamped (ANPC) inverter using a modified carrier-based pulsewidth modulation. At a fault event, the ANPC inverter is divided into subinverters, and the modulating signal is modified to two modulating signals. The modified modulating signals are used to control the subinverters and allow continuous operation of the three-level ANPC inverter during faulty conditions even up to four open-switch faults per phase. This technique provides the fault-tolerant capability of the ANPC inverter without the need to add any additional phase legs or complex control strategies. Furthermore, the proposed technique ensures the voltage balancing of the dc-link capacitors. The performance of the proposed fault-tolerant technique is verified through simulation studies in MATLAB/Simulink under different faulty conditions. The feasibility of the proposed technique is also verified experimentally. [ABSTRACT FROM AUTHOR]

This paper presents a new single-phase ac–dc–ac three-level three-leg converter composed of three coupled-inductors and six active switches. The system model, operation principles, and a control strategy are presented and discussed. Additionally, a space-vector pulsewidth modulation technique is developed to double the effective frequency of the grid and load voltages and to reduce the switching losses. The proposed converter is compared to other similar converters in terms of switch count, harmonic distortion, and power losses. The results show that the proposed topology has improved power quality and uses fewer switches and gate drive circuits. These characteristics can potentially reduce the costs and the complexity of the system. In addition, the proposed converter eliminates the requirement for dead time to prevent short circuit of the dc-link. In order to validate the theoretical analysis, simulated and experimental results are presented and discussed. [ABSTRACT FROM AUTHOR]

Photovoltaic (PV) systems having rechargeable batteries are prone to be complex and costly because multiple converters are necessary to individually regulate a load, PV panel, and battery. This paper proposes novel nonisolated multiport converters (MPCs) integrating a bidirectional pulsewidth modulation (PWM) converter and phase-shift-switched capacitor converter (PS-SCC) for standalone PV systems. A PWM converter and PS-SCC are integrated by reducing the total switch count, realizing the simplified system and circuit. In the proposed MPCs, two control freedoms of duty cycle and phase shift angle are manipulated to individually regulate the load, PV panel, and/or battery. The detailed operation analysis was performed to mathematically derive gain characteristics and zero voltage switching operation boundaries. For the battery discharging mode, in which the PV panel is not available and the MPC behaves as a single-input–single-output converter with two control freedoms available, the optimized control scheme achieving the lowest rms current is also proposed to maximize power conversion efficiencies. Various kinds of experimental verification tests using a 200-W prototype were performed to verify the theoretical analysis and to demonstrate the performance of the proposed MPC. [ABSTRACT FROM AUTHOR]

A novel PWM full bridge (FB) dc–dc converter for large power industrial applications is proposed in this paper. The soft switching mode of the primary switches can be varied under different input and output conditions to achieve optimum system efficiency. In the zero-voltage and zero-current switching (ZVZCS) mode, the turn-on and turn-off switching loss can be optimized because the soft switching conditions of the turn-on and turn-off instants are well decoupled. In the zero-voltage switching (ZVS) mode, the turn-off switching loss can also be optimized because there is no requirement for light load operation in this mode. Four mosfets with ultra-low on-state resistance are used, thus, the added conduction loss is small. The auxiliary mosfets with high switching frequency are turned on with zero-current and off with zero-voltage, hence, the added switching loss can also be neglected. Furthermore, some drawbacks of the conventional ZVS and ZVZCS converters, e.g., narrow ZVS load range, high primary circulating current, incomplete reset of the primary current, and unreasonable VA rating of the added components, have been well solved. The operation principles and soft switching characteristics are discussed. Experimental results from an 18-kW prototype are provided to verify the proposed converter. [ABSTRACT FROM AUTHOR]

This paper deals with the analysis of the input dc-link voltage ripple in multilevel inverter based on H-bridge and level doubling network (LDN). The LDN is basically a half-bridge fed by a floating capacitor, with voltage self-balancing capability, recalling the concept of a flying capacitor configuration. The amplitude of the LDN voltage ripple is analytically determined considering both the low-order and the switching harmonic components. In particular, peak-to-peak distributions of voltage ripples over the fundamental period are analytically determined, making possible the design of dc-link capacitor relying only on the dc-voltage ripple requirements. The case study makes reference to negligible switching ripple in the output current. It well represents either grid connection or passive load having almost sinusoidal currents. Numerical simulations carried out by MATLAB/Simulink and a complete set of experimental verifications are given to confirm the theoretical developments. [ABSTRACT FROM AUTHOR]

This paper proposes a novel pulsewidth modulation cell-level diffusion charge redistribution (DCR) converter based on a switched capacitor converter (SCC) utilizing diffusion capacitance of photovoltaic (PV) cells for PV modules under partial shading. Although a discrete inductor and capacitor are additionally necessary, Joule losses associated with switching operations can be reduced compared to the conventional capacitorless DCR converter. First, ac impedance measurement for a PV cell with 125 × 125 mm was performed, and the diffusion capacitance values were measured to be approximately 6.0 mF at its maximum power point voltage of 0.574 V. Second, the theoretical loss model was derived based on the detailed analysis, and it revealed that an optimal duty cycle achieving the lowest Joule loss was dependent on shading conditions. Third, a dual maximum power point tracking (MPPT) algorithm that controls duty cycles of not only the DCR converter, but a front-end boost converter is also proposed. With the dual MPPT control, the DPP converter operates at its optimal duty cycle to minimize the Joule loss while the boost converter seeks the MPP. The experimental results demonstrated that the maximum power significantly increased, thanks to the DCR converter, and that both the DCR and boost converters operated with respective optimal duty cycles. [ABSTRACT FROM AUTHOR]

In this paper, a generalized switching modification method is proposed to reduce the root-mean-square (rms) current flowing into a dc-link capacitor in a dc–dc–ac structure consisting of a boost converter and a three-phase inverter. To analyze the current flowing into the capacitor, we analyze the currents at the respective converter and inverter sides. Based on this analysis, we derive an analytical method to find the modification time between the converter and inverter pulsewidth modulation (PWM) carriers through a Fourier series and approximation to facilitate real-time implementation. Real-time implementation of the modification time calculated by the derived method is described. To verify the validity of the proposed method, experimental results are presented based on a 1-kVA dc–dc–ac prototype. The proposed method has a better capacitor rms current reduction performance than the conventional method in various inverter power factors and PWM strategies. Especially, it has an excellent performance in mid-power factor level (0.95–0.1). [ABSTRACT FROM AUTHOR]

This paper proposed a new half-bridge (HB) LLC resonant converter family with pulse-width modulated (PWM) auxiliary switch (sLLC converter) for hold-up mode operation. The proposed sLLC converters could operate with synchronous rectifier, which is suitable for low-output voltage applications. In the proposed converters, an auxiliary switch is added at the primary side to provide charging path for the series resonant inductor. For nominal 400-V input, sLLC achieves same performance as conventional LLC converter, and all the good features such as soft switching are naturally retained. For slight input voltage fluctuation, frequency modulation is used to regulate the output voltage. When the input voltage reduces further, HB switches will operate at constant minimum frequency, and the auxiliary switch will operate in the PWM mode to energize the resonant inductor with the bus voltage directly during hold-up period. Thus, the converter achieves higher voltage gain, and the output voltage can be maintained at desired level. To verify the effectiveness of the proposed sLLC converter, operational principle and equivalent circuits will be carefully explained and analyzed in this paper. A 300-W prototype is built for 250–400-V input 12-V output application. [ABSTRACT FROM AUTHOR]

This paper studies pulse width modulation (PWM) techniques suitable for a four-level five-phase open-end winding (OeW) drive. The drive comprises a five-phase induction machine, supplied using two two-level voltage source inverters with isolated and unequal dc-link voltages, in the ratio 2:1. A decoupled carrier-based (CB) PWM modulation strategy, based on unequal voltage reference sharing between the two converters, is introduced in this paper. The stability of dc-link voltages in OeW drives is investigated next, using a novel analysis technique. Several modulation methods are analyzed and the results show that application of the coupled PWM technique, with carriers having in-phase disposition, leads to overcharging of the capacitor in the dc-link of the inverter intended to operate with the lower dc-link voltage. On the other hand, the proposed decoupled CB PWM scheme naturally eliminates the dc-link capacitor overcharging problem. These findings are verified experimentally, using open-loop V/f control. Two different decoupled CB modulation methods are compared and the best performing modulation method is selected and incorporated further into an OeW drive with field-oriented control. The presented steady state and transient experimental results demonstrate that the decoupled CB PWM technique is suitable for high-performance variable speed drive applications. [ABSTRACT FROM AUTHOR]

This paper proposes a multilevel series compensator (MSC) to deal with voltage sags/swells, harmonic compensation, or reactive power compensation. Such a device can be considered as a dynamic voltage restorer or a series active power filter (Series-APF). The MSC can improve the power quality of loads located in stiff systems. The configuration is based on three-phase bridge (TPB) converters connected by means of cascaded single-phase transformers. This arrangement permits the use of a single dc-link. A generalization for $K$ -stages in which $K$ -transformers are coupled with $K$-TPB converters is presented. The topology permits generating a high number of levels in the voltage waveforms with a low number of power switches in comparison with a classic topology. The multilevel waveforms are generated by the converters through a suitable pulsewidth modulation (PWM) strategy that takes into consideration the transformer turns ratios. Modularity and simple maintenance make the proposed MSC an attractive solution compared with some conventional configurations. Model, PWM strategy, and overall control are discussed in this paper. Simulation and experimental results are presented as well. [ABSTRACT FROM PUBLISHER]

This paper proposes unified non-inverting and inverting ac–ac converter (UNI-AC) using pulse width modulation (PWM) for the utility voltage compensation. It offers four effective switching states to regulate the output voltage in bipolar manner, facilitating versatile modes of operation with different number of switching states being modulated. Each mode of the proposed UNI-AC is able to compensate both the grid voltage sag and swell problems due to its bipolar voltage gain. The operational principle and comparison for all these modes are investigated in details. Also, the UNI-AC is reversible and compatible with full range of power factor. Other technical merits offered by the proposed approach include the compact hardware installation, reduced switch voltage stress (also low dv/dt) and decreased control complexity. Detailed analysis and experimental verification are presented in this paper. [ABSTRACT FROM AUTHOR]

In this paper, a new soft switching flyback dc–dc converter with a simple zero-voltage and zero-current switching (ZVZCS) cell is proposed. The auxiliary resonant cell consists of one switch, one diode, one inductor, and two capacitors. It provides ZVZCS not only for the main switch but also for the auxiliary switch at both turn-on and turn-off times. In addition, all the auxiliary diodes and body diodes of the switches operate under full ZVZCS except the output diode which turns off only with zero current switching. This soft switching technique makes the proposed converter have less switching losses which leads the converter to operate in higher frequencies and efficiency. Another outstanding feature of the proposed converter is using the auxiliary resonant cell out of the main power path to have lower voltage stress on the switches. In this paper, pulse width modulation (PWM) is employed to control the main switch. A detailed mode analysis of the proposed converter operation is presented along with design procedure. Finally, the accuracy performance of the converter is verified through a 60 W experimental prototype results. [ABSTRACT FROM AUTHOR]

The paper proposes a method of active switching harmonics current reduction in the dc-link capacitor of a two-level, three-phase, back-to-back converter. Based on the derived analytical solution for switching harmonic currents in the dc-link, it is shown that by specific control over the pulsewidth-modulated (PWM) carriers’ phase angles, the targeted harmonics of the rectifier and the inverter can be synchronized in phase such that their cancellation occurs in the dc-link capacitor. This synchronization is provided by harmonic phase feedback control. A three-step procedure to implement the method is detailed in the paper. The effectiveness of the proposed approach is verified experimentally. [ABSTRACT FROM AUTHOR]

Pulse-width-modulated (PWM) converters have been widely applied for power processing, and they are typically the stems of other types of converters, such as quasi-resonant, Z-source, and switched-inductor hybrid converters. Development of PWM converters has been spanning over a century, starting from the buck converter. The well-known PWM converters include buck, boost, buck–boost, Ćuk, single ended primary inductive converter (SEPIC), zeta, Z-source, quasi-Z source, etc. Many attempts have been proposed to develop these converters based mostly on canonical cell concepts and by introducing extra LC filters to the cells. This paper presents an enhancement to the layer and graft schemes by introducing the ideas of dc voltage/current offsetting, capacitor/inductor component splitting, diode grafting, and inverse operation of PWM converters. The PWM converters, which can be operated in continuous conduction mode (CCM) or discontinuous conduction mode (DCM), therefore can be synthesized systematically according to decoded transfer gains. Decoding and synthesizing PWM converters uniquely bridge transfer gains to converter topologies and provide readers a comprehensive understanding of PWM-converter evolution from the original converter, the buck converter. Additionally, in this paper, the Ćuk, SEPIC, and zeta converters all with the same transfer gain of $D/(1 - D)$ are proved to be equivalent to the buck–boost converter with an extra LC filter. For further illustrating the proposed approaches, various types of Z-source converters, switched-capacitor/switched-inductor hybrid converters, and a single-stage interleaved converter are reviewed, and new PWM converters are developed. [ABSTRACT FROM AUTHOR]

This paper introduces a three-phase grid-connected inverter for commercial-scale photovoltaic systems. The circuit topology combines an ac-inductor-less active bridge with a parallel-connected pulsewidth modulation inverter acting as an instantaneous reactive power compensator. The active bridge, called a 120° conduction inverter, operates at a switching frequency equal to the grid frequency and outputs a 120° rectangular current, while the compensator eliminates the harmonic currents included in the rectangular current. The main advantage of this strategy is the reduction in size of the required ac inductor by a factor of 4, as well as the reduction of power losses in the switching devices. The theoretical analysis clearly shows that the compensator can synthesize a sinusoidal output current by controlling only instantaneous reactive power, thus eliminating the need for electrolytic capacitors. A 5-kW experimental setup validates the operating principle and the control method of the proposed inverter and exhibits an inverter efficiency as high as 99.2% with Si superjunction mosfets. [ABSTRACT FROM AUTHOR]

Model-predictive current control (MPCC) is a promising candidate for modular multilevel converter (MMC) control due to its advantages of direct modeling and fast dynamic response. The conventional MPCC, which obtains the optimal control input by evaluating a cost function for all the possible switching states, may make the MPCC impractical due to the exponentially increasing computation burden with the increasing number of submodules (SMs). On the other hand, the MPCC experiences high load current and circulating current tracking errors, since only one switching state is selected and applied during one control period. To address these issues, this paper proposes an MPCC with phase-shifted pulsewidth modulation (PS-PWM) for improving the steady-state control performance. The arm voltages are considered as a whole to implement the proposed MPCC. The optimal duty cycle is obtained based on the load and circulating current tracking error minimization and applied using the PS-PWM. As a result, the computation burden is unrelated to the number of SMs by avoiding the exhaustive evaluation process for all the possible switching states. A better steady-state performance with smaller tracking errors is achieved with the similar switching frequency, and the tedious tuning process of the weighting factor is eliminated. Experimental results are presented to demonstrate the effectiveness of the proposed MPCC. [ABSTRACT FROM AUTHOR]

Active pulsating power buffering (PPB) function can effectively reduce the twice-line frequency energy storage requirement in a single-phase rectifier. Existing single-phase solutions with active PPB must utilize more than two active switches in their circuits. Compared with conventional single-active-switch solutions without active PPB (e.g., a boost power-factor-correction (PFC) rectifier), the cost of additional semiconductor switches and gate drive circuitry in an active PPB-based rectifier may not be justified for low-power applications. This paper presents a family of single-switch single-phase rectifier with active PPB. Taking advantage of the on-time and off-time of a single switch, the proposed rectifiers are formulated by merging two converters that are duty and frequency controlled. The steady-state characteristics of these converters are analyzed. A step-by-step design procedure is provided, and an active control method for limiting the maximum switching frequency for wide-load-range operation is presented. A 100-W prototype is built for the demonstration of the proposed single-switch rectifier concept. It is envisaged that this concept, when combined with other circuit formulation techniques, e.g., partial power processing, dc-voltage feedback, may lead to new derivatives of single-switch rectifiers with more advanced features. [ABSTRACT FROM AUTHOR]

In this paper, a highly reliable back-to-back (BTB) power converter is proposed for doubly fed induction generator-based wind turbines (DFIG-WTs). When a power switch open-circuit fault is encountered in either the grid-side converter (GSC) or the rotor-side converter (RSC), a four-switch three-phase (FSTP) topology is formed to avoid using redundant bridge arms, which reduces the power circuit complexity and minimizes the conduction and switching losses. A simplified space vector pulsewidth modulation technique is used to eliminate sector identification and complex trigonometric calculations. In addition, the influence of dc-bus capacitor voltage unbalance on the electromagnetic torque is analyzed in detail. The offset current components are calculated, and they are deducted from the reference values in the modified control strategies to suppress the dc-bus voltage deviation. Moreover, the power loss model of a BTB converter is analyzed in detail, and the efficiency study is performed in various post-fault situations. Simulations in MATLAB/Simulink are carried out to verify the performance of a DFIG-WT based on a FSTP BTB converter. Furthermore, the control hardware-in-the-loop setup with RSC and GSC separately simulated in a digital real-time simulator is applied for experimental verification of the proposed control strategy. [ABSTRACT FROM AUTHOR]

A switching-capacitor-based buck–boost converter (with common ground) for point of load applications is proposed in this paper. It is capable of operating in stand-alone buck or boost mode in addition to its primary operation of performing the buck–boost conversion. The striking feature of the proposed converter is low source current ripple content irrespective of its mode of operation (buck–boost, buck, or boost). First, feasible pulsewidth modulation schemes for the proposed converter are identified and thereafter the corresponding circuit performance analysis, steady-state analysis, and state-space modelling is established. Through steady-state analysis, voltage gain expressions are formulated and equations defining L-C components are derived in terms of their ripple quantities. The state-space models are used to formulate small-signal analysis and to obtain the relevant transfer functions required in the controller design. A voltage-mode/current-mode controller is designed, with a tradeoff in bandwidth, to control the proposed converter and transit it from buck to boost mode or vice versa seamlessly. A 30–55 W, 100 kHz, prototype point of load converter with 36-V input dc source is built to supply power at constant load voltage of either 48 or 28 V. The proposed converters’ effectiveness is demonstrated experimentally in terms of reduced source current ripple along with seamless transition from buck to boost mode and vice versa. [ABSTRACT FROM AUTHOR]

Multilevel inverters are now-a-days being applied in electric vehicles (EV). Considering the dynamic operating conditions of an EV propelled by an induction motor, this paper proposes a flexible discontinuous modulation strategy for three-level neutral-point-clamped (NPC) inverter that can shift modulation pattern seamlessly from sinusoidal pulsewidth modulation (SPWM) to discontinuous PWM (DPWM). The modulation scheme is generalized at each degree of discontinuity to ensure minimum switching losses for variable load power factors. Additionally, a hybrid voltage balancing strategy, which comprises two sets of compensating offset signals with complementary features, has been introduced to mitigate voltage deviation problem at neutral point of the inverter. The unique feature of the proposed hybrid balancing approach is that it generates uniform compensating neutral current regardless of the level of discontinuity. This results in identical and predictable voltage balancing dynamics for the entire modulation transition covering SPWM and DPWM. It has been shown that the proposed hybrid balancing strategy does not lose its unbalance compensation strength even during transition from one modulation pattern to another. The effectiveness of the proposed scheme for wide variations in operating conditions is studied through extensive simulation, and validated in experimentation using a prototype NPC inverter with induction motor loads. [ABSTRACT FROM AUTHOR]