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In renewable energy micro-source applications, a wide range of voltage conversion of the step-up converter is an essential part to equalize the typical low voltage of micro-source with DC-bus voltage of Inverter or motor drives. In order to meet this purpose, an ultra-voltage gain step-up DC-DC converter is proposed in this paper. The proposed converter has made an arrangement of the regenerative-boost fed switched inductor and capacitor configurations. Thereby, due to such an organization of structure, the proposed converter can develop an extremely high voltage-gain even at lower duty ratios. In addition, it has the advantage of lower switching stress across all power semi-conductive diodes. Furthermore, this paper describes the steady-state analysis and comparative features of the converter with existing recent literature. Finally, to validate theoretical analysis and test the feasibility and suitability of the proposed ultra-gain converter, the experimental results were observed by a 500 W fabricated prototype. [ABSTRACT FROM AUTHOR]

The dc-dc converters with high step-up DC-voltage gain play a vital role in integrating low voltage DC sources. Though several converter topologies are reported in the recent past, attempts have been made to reduce the components, especially the switching devices, passive elements, converter losses, etc., of the converter. A novel DC-DC converter topology, viz., single switched impedance network (SSIN)-based converter with n-stage is proposed in this paper. The operation of the SSIN based converter in continuous and discontinuous conduction modes are discussed. The effect of parasitic elements on DC-voltage gain and efficiency of the SSIN is carried out. The small-signal model of the SSIN converter is derived. The performance of the SSIN converter is compared with the similar converter topologies. The 500 W prototypes of the SSIN with n = 1 and n = 2 are fabricated, and the experimental results are presented in this paper. To improve the converter performance, SiC-based semiconductor devices are used. The SSIN converter with two-stage has low switch loss at 500 W load, improved efficiency during high power and high output voltage operation, the switch stress of Vo/2, etc. [ABSTRACT FROM AUTHOR]

The modular multilevel converter (MMC), owing to the presence of a large number of submodules (SMs) and energy storing elements, requires a large footprint and initial investment. To address these issues, this paper proposes the switched modular multilevel converter (SMMC). It consists of two major elements; the chain-links (CLs), consisting of cascade connection of SMs as in MMC, and the single-pole-triple-throw (SPTT) switches, which can be realized using either the T-type or NPC-type switch strings. The SMMC works on the principle of connecting all the phase-legs in series and their respective positions are mutually interchanged. It offers a compact structure as the SMs count is reduced to 33% of MMC, which results in a much lower energy storage requirement. Furthermore, it does not have inter-phase circulating current problem and hence the CL inductors can also be avoided. The SMMC structure, operating principles, control, and modulation schemes are explained in detail. A detailed comparison of SMMC with the other major existing converters is carried out to highlight the important features of SMMC. The efficacy of SMMC is validated using PSCAD simulation studies with a 19-level grid-connected SMMC model. A 3-phase 19-level SMMC laboratory prototype is developed to further validate its feasibility. [ABSTRACT FROM AUTHOR]

Differential power processing (DPP) converters have been developed for photovoltaic (PV) panels to preclude energy yield reduction due to partial shading. In large-scale PV systems comprising numerous series-connected panels, DPP converters with good modularity are preferable because the number of series-connected panels varies depending on applications. This paper proposes a switched capacitor converter (SCC)-based modular DPP architecture for large-scale PV systems. Four panels are grouped as a module, each having a panel-level DPP converter, and modules are connected in series to form a string. The design of the panel-level DPP converter is fixed while the system can be arbitrarily extended by stacking modules, achieving good modularity. Adjacent panel-level DPP converters are dc-coupled, by which modules can be connected using long cables, mitigating installation limitations. The experimental results of the laboratory and field testing demonstrated the energy yield enhancement by 10%–20%, depending on shading conditions. [ABSTRACT FROM AUTHOR]

The paper develops two computationally efficient models, namely a detailed equivalent model and an average-value model, with provisions for representation of the critical state of converter blocking, for modular multilevel converters with embedded storage. These models are indispensable in the simulation of dc faults. The developed detailed equivalent model provides accuracy that matches electromagnetic transient (EMT) simulations, with much reduced computational burden; the developed average-value model represents the averaged behavior of the converter by neglecting switching transients. Both models are extensively evaluated in the context of an HVDC system against benchmark results form a detailed switching model developed in PSCAD/EMTDC. The results confirm the validity and accuracy of the models for steady state, transient, and faulted operating conditions including when the converter is blocked in response to a dc fault. [ABSTRACT FROM AUTHOR]

This paper proposes a novel dual input nine-level inverter (DINLI) topology which requires only seven controllable devices. The dual inputs are un-identical DC voltage sources in the ratio 1:3. A simple control scheme is derived by appropriately modifying the phase disposition pulse width modulation technique to generate high-quality 9-level output from the DINLI topology. At any given instant, a maximum of four switches conduct out of which only a maximum of two switches operate at high frequency, bringing down the switching and conduction losses significantly and improving the overall system efficiency. The bidirectional DINLI (BDINLI) topology with reactive power capability can be realized by replacing the unidirectional devices with the controlled switches (i.e., total nine switches). In addition, the proposed DINLI topology does not require extra voltage balancing circuits which further improves the efficiency. The DINLI operation is verified through MATLAB simulations for grid-connected applications and its extension to an n-level, 3-phase application is also investigated. Experiments performed on a 1KVA laboratory prototype to validate the theoretical claims. [ABSTRACT FROM AUTHOR]

Miniaturization and low cost contribute to the development and popularization of wireless power transfer (WPT). Reducing the number of power conversion stages can reduce the volume and cost of the WPT converter, and even make it possible to improve the efficiency. A single-stage WPT converter with constant current (CC) and constant voltage (CV) output and its asymmetric modulation method are proposed in this paper. A direct AC-AC converter is applied to the primary side of the WPT converter to directly convert line-frequency AC to high-frequency AC. The applied direct AC-AC converter that can replace the commonly used multi-stage primary converter reduces the number of circuit devices, thereby reducing the volume and cost of primary converter. The proposed WPT converter can realize zero voltage switching (ZVS) and power factor correction (PFC). In order to achieve CC and CV output, a switchable hybrid compensation topology is applied to the proposed WPT converter. A 720-W experimental prototype was manufactured to verify the rationality of the proposed WPT converter and the correctness of the theoretical analysis. [ABSTRACT FROM AUTHOR]

The missing capability of DC fault current limitation is an inherent disadvantage in the typical half-bridge modular multilevel converter (MMC), which restricts its application in long-distance high voltage direct current (HVDC) systems. The full-bridge submodule (FBSM) and clamped double submodule (CDSM) topologies allow for fault current self-clearing, but also suffer from additional hardware cost and power losses. In this paper, an improved submodule topology utilizing the new reverse-blocking insulated gate bipolar transistor (RB-IGBT) is proposed to improve system economy without compromising its performance. The operating principles and DC fault characteristics of the proposed topology are analyzed in details, including comparison with various topologies in terms of cost, losses, fault current clearing speed and thermal. Compared with the traditional CDSM topology, the proposed RBSM can clear DC faults faster with reduced cost of switching devices. A DC fault protection strategy for MMC-HVDC system is also presented. Simulation results under normal operating, permanent and transient fault conditions are carried out to verify the effectiveness of the proposed topology. [ABSTRACT FROM AUTHOR]

A multi-level boost topology based on a flying capacitor is compared in this work with the hybrid, multi-level, partial power processing topology already presented in the literature for use as a highly efficient and compact dc/dc stage in 1500-V, two-stage, grid-connected PV systems. Different variations of the resonant stage of the hybrid topology are analyzed and compared in terms of losses, volume and complexity. Full multivariable optimization is conducted for the multi-level boost topology with different number of levels and for all the analyzed variations of the resonant stage of the hybrid topology. Appropriately rated new classes of 650-V and 900-V WBG devices are included in the optimization algorithm. It is concluded that due to the dominant conduction losses and gap in the voltage rating of the commercially available WBG devices between 650V and 200V, increase of the number of levels over 4 leads to the deteriorated loss and volume performances. All the analysis related to the resonant stage of the hybrid topology is confirmed by detailed and comprehensive measurements of two prototypes of 4kW of nominal and 7kW of maximal power. Additionally, all the loss models applied in the optimization algorithms presented in this paper are confirmed by detailed measurements, thermal calibration and finite element thermal simulations of the wide bandgap devices and inductor designs employed in this work. [ABSTRACT FROM AUTHOR]

This paper proposes a novel polygonal voltage space vector structure (SVS) having 30 sides, for a star-connected induction motor drive. The SVS eliminates the presence of harmonics up to 25th order from motor phase voltage throughout the entire modulation range, providing a torque profile devoid of lower order pulsations. Linear modulation is extended till 99.63% of base speed without exceeding the motor phase voltage rating. Topology consists of a dc-link fed primary inverter and two equal low voltage modular capacitor fed secondary inverters. Here the harmonics generated by the primary inverter is canceled by the secondary inverter which acts as a switched capacitive filter. Detailed description of the SVS generation and timing calculations are provided in this paper. Effectiveness of the proposed scheme is validated using experimental results, inverter loss calculations, and harmonic analysis. [ABSTRACT FROM AUTHOR]

Four-level hybrid-clamped inverter is a newly proposed topology that can operate under a wide voltage range without switches connected in series. However, when it is applied in medium voltage high power conversions, the flying capacitors in each phase will occupy a huge volume and a high switching frequency is required to restrain the voltage ripples. In order to overcome this drawback, a four-level active neutral-point clamped inverter is discussed in this paper, which consists of only six switches and no diodes or flying capacitors are required. In order to balance the neutral-point voltages under the full power factor and modulation index range, a capacitor voltage balance method based on carrier-overlapped pulsewidth modulation is proposed in this paper. The upper and lower dc-link capacitor voltages are balanced by zero-sequence voltage injection and the central dc-link capacitor voltage is balanced by adjusting the duty cycles of switching signals slightly. Simulation and experimental results are presented to confirm the validity of this method. [ABSTRACT FROM AUTHOR]

This paper presents a 5-level inverter topology for open-end induction motor drives by using a single dc source. The open stator windings of the drive are supplied with a 3-level flying capacitor inverter from one end and capacitor-fed 2-level inverter from another end. The voltage ratio of the dc link to the capacitor in 2-level inverter is maintained at 4:1 ratio to generate five-level voltage output. The capacitor in 2-level inverter is balanced by the switching redundant vector combinations from both the inverters while the floating capacitors in the 3-level inverter are balanced by using redundant switching states. The proposed topology gives 5-level operation with less number of floating capacitors and power semiconductor switches compared to other existing topologies. Also, the balancing of the capacitors is independent of load power factor and modulation index. Further, the generalization of the proposed dual inverter scheme for any n-level inverter is also included in this paper. The experimental results and required analysis are also presented to validate the inverter scheme. [ABSTRACT FROM AUTHOR]

This paper presents a unified second-stage LC filter applied in the three-state switching cell buck–boost converter, which provides current and voltage with low ripple and low noise. The unified second-stage filter promotes a reduction in the number of devices while maintaining the filtering performance of the converter, with second-stage LC filters at the input and at the output. Moreover, the unified filter, when associated with a three-state switching cell buck–boost converter, allows a size reduction of filter devices, especially for designs with duty cycle range around 1/2. Furthermore, the unified filter arrangement provides nondissipative clamping of switching devices and reduce the system order when compared to the converter with second-stage LC filters. In this paper, the static and dynamic characteristics of the proposed converter in continuous conduction mode (CCM) are reported. Experimental data were obtained from a laboratory prototype with an input range of 32 $\sim$ 72 V, constant output of 48 V, a load of 150 W, and switching frequency of 45 kHz. The measured efficiency for the rated load was 97% for maximum input voltage. A comparison of the size and performance of the proposed filter with the topology that uses second-stage LC filters at the input and at the output is also presented. [ABSTRACT FROM AUTHOR]

In order to increase the efficiency of modern microprocessor power supplies used in data centers, 380-V dc power distribution systems have been attracting attention due to their high efficiency and high reliability. This paper presents an innovative single-stage approach for 380-V voltage regulator modules (VRMs) based on a quasi-resonant multilevel topology constant on-time operation. The proposed topology inherently integrates the multiphase approach, providing fast phase shedding and flat high-efficiency curves even at light-load conditions. This is a unique advantage, which is not possible to establish in the two-stage approach, which is very important in server architectures, and where high efficiency is required even at light-load conditions. This paper analyzes the circuit topology and proposes a control architecture for fast transient response, including current-sharing capabilities. The digital controller has been implemented in 0.16- $\mu$ m lithography together with a digital pulsewidth modulation with a 195-ps resolution and a 40-MS/s 7-bit analog-to-digital converter. Experimental results show an efficiency of 93% for a 120-A 380–1.8-V VRM power supply. [ABSTRACT FROM AUTHOR]

In this paper, many impedance-source inverters with coupled inductors have been investigated to obtain a high step-up boost ratio. However, the leakage inductors in these topologies induce great voltage spikes at the dc link, which will increase the voltage stress of switches. Thus, the power level of inverters is limited. Furthermore, the efficiency of the inverters can be degraded by the losses associated with leakage inductors. To address abovementioned issues, this paper proposes a family of low-spike high-efficiency Y-source inverters. The proposed inverters have the ability of eliminating voltage spikes at the dc link and recycling the leakage energy via the additional diode and capacitor. In order to show the excellent characteristics of the proposed topologies, this paper compares the performances of the proposed inverters and the improved-Y-source inverter in many aspects. Simulation and experimental results have verified the abilities of the proposed inverters. [ABSTRACT FROM AUTHOR]

Multilevel inverters (MLIs) are playing a pivotal role in the power sector with potential applications, such as interfacing renewable energy sources with the grid and several industrial drive applications. MLIs with a smaller number of switching devices are more promising due to their compact size, reduced cost, and higher efficiency compared with their traditional counterparts. This paper, therefore, presents a new three-phase seven-level inverter. This topology is a combination of two cascade-connected two-level voltage-source inverters (VSIs) and H-bridge cells with flying capacitors (FCs). This paper presents the operating principle and the balancing technique for the dc-link capacitors and FCs. The generation of various output voltage levels and the limitation of the sinusoidal pulsewidth modulation control for FC voltage balancing is also presented. The number of components in the proposed circuit configuration and their voltage ratings are considerably lower compared with the recently proposed topologies. The behavior of the proposed circuit configuration is first assessed with simulation studies and is then tested with a laboratory prototype. The simulation and experimental results validate the effectiveness of the proposed topology and the voltage balancing technique. [ABSTRACT FROM AUTHOR]

This paper presents a novel seven-level inverter topology for medium-voltage high-power applications. It consists of eight active switches and two inner flying capacitor (FC) units forming a similar structure as in a conventional active neutral-point-clamped (ANPC) inverter. This unique arrangement reduces the number of active and passive components. A simple modulation technique reduces cost and complexity in the control system design without compromising reactive power capability. In addition, compared to major conventional seven-level inverter topologies, such as the neutral point clamped, FC, cascaded H-bridge, and ANPC topologies, the new topology reduces the dc-link voltage requirement by 50%. This recued dc-link voltage makes the new topology appealing for various industrial applications. Experimental results from a 2.2-kVA prototype are presented to support the theoretical analysis presented in this paper. The prototype demonstrates a conversion efficiency of around 97.2% ± 1% for a wide load range. [ABSTRACT FROM AUTHOR]

This paper presents bidirectional grid-connected modular multilevel converters (MMC) with direct digital control and division-summation processes to achieve power-injection and rectification functions. A direct digital control is developed to track current references, regulate dc-bus voltage and cell voltage, and balance the upper and lower dc-bus voltages. It can accommodate wide filter-inductance variation and take care of source voltage harmonics to achieve tight current tracking and low distortion output current. Based on the power-balance principle, the commands of arm currents can be determined directly. In this paper, the MMC configuration is introduced first, and then the control laws for current tracking and voltage regulation are derived in detail. Experimental and simulated results obtained from two 50 kW MMCs operated in power-injection and rectification modes have verified the analysis and discussion. [ABSTRACT FROM AUTHOR]

This paper presents an interleaved boost converter with a bifold Dickson voltage multiplier suitable for interfacing low-voltage renewable energy sources to high-voltage distribution buses and other applications that require a high-voltage-gain conversion ratio. The proposed converter was constructed from two stages: an interleaved boost stage, which contains two inductors operated by two low-side active switches, and a voltage multiplier cell (VMC) stage, which mainly consists of diodes and capacitors to increase the overall voltage gain. The proposed converter offers a high-voltage-gain ratio with low voltage stress on the semiconductor switches as well as the passive components. This allows the selection of efficient and compact components. Moreover, the required inductance that ensures operation in the continuous conduction mode (CCM) is lower than the one in the conventional interleaved boost converter. The distinction of the proposed converter is that the inductors’ currents are equal, regardless of the number of VMCs. Equal sharing of interleaved boost-stage currents reduces the conduction loss in the active switches as well as the inductors and thus improves the overall efficiency, as the conduction power loss is a quadratic function. In this paper, the theory of operation and steady-state analysis of the proposed converter are illustrated and verified by simulation results. A $\text{200-W}$ hardware prototype was implemented to convert a $\text{20-V}$ input source to a $\text{400-V}$ dc load and validate both the theory and the simulation. [ABSTRACT FROM AUTHOR]

Multilevel inverters (MLIs) are being used in wide range of power electronic applications. These converters have attracted a lot of attention during recent years and exist in different topologies with similar basic concepts. This paper presents five main submodules (SMs) to be used as the basic structures of MLIs. The paper reviews the common MLI topologies from the structural point of view. The topologies are divided into the different SMs to show conventional MLI configurations and future topologies that can be created from the main SMs. A comparative study between different topologies is performed in detail. The MLIs are categorized and investigated with from different perspectives such as the number of components, the ability to create inherent negative voltage, working in regeneration mode and using single dc source. [ABSTRACT FROM AUTHOR]

Reduced switch active phase converters (APC) are cost-effective solutions for running three-phase loads from single-phase grids. This paper proposes a novel auxiliary-capacitor-based APC (AC-APC) for this application. The combination of the topological location of the auxiliary capacitor and the control of the AC-APC reduces current stress on the semiconductor devices. In this paper, a selection criterion for the optimal auxiliary capacitor value is formulated to reduce the device currents in such a way that the overall efficiency is enhanced. This paper presents a comparative analysis of converter volt-ampere (VA) rating and device power loss for conventional H-bridge active front-end and inverter-based topology, APC, and AC-APC. To evaluate the efficacy of the proposed AC-APC, an experimental study is conducted on the APC and the AC-APC feeding a 3-hp three-phase induction motor. At a full load of $\text{2.5}\,\text{kW}$ and $\text{0.8 } \text{power factor}$ , the measured maximum efficiency of the AC-APC is $2\%$ higher than that of the APC. Analytical evaluation of converter currents and device power loss are in close agreement with experimental observations. [ABSTRACT FROM AUTHOR]

This paper presents a balancing algorithm for the so-called Director Switch, a controlled, reverse conducting, self-powered, high-voltage switch, using series-connected insulated gate bipolar transistors (IGBTs). This is a key component on two new voltage-source, high-voltage direct current (HVDC) converter topologies. These, which promise efficiency, cost, and size reductions, are an alternate arm converter and a series bridge converter. One of the main design challenges of the director switch is how to supply the IGBT gate drivers, and other auxiliary electronics while overcoming the high-voltage insulation barrier to ground level. In this paper, this is achieved by using the energy stored in a capacitive clamp snubber circuit, which also helps with the overvoltage mitigation during rare hard-switching events. However, the clamp capacitor and by proxy the IGBT voltages become highly unbalanced during operation, compromising the integrity of the switch. This paper presents a balancing strategy that consists in applying a controlled delay in the switching of the IGBT levels, in a way that forces a voltage balance on all the switch levels. The paper explains the unbalance. Then, the balancing strategy is explained and validated on simulation and on a high-voltage experimental rig, on switches comprising two and three series-connected IGBTs, respectively. [ABSTRACT FROM AUTHOR]

This paper proposes a new class of topologies of single-stage high-frequency ac-link power converters, which is capable of providing both voltage step up/down within a wide frequency and voltage ranges. The proposed family, which supports bidirectional power flow, can interface various single/multi-port dc and/or single/multi-phase ac systems to provide dc–dc, dc–ac, ac–dc, or ac–ac power conversion. In this family of converter, which offers a very modular structure, a small inductor that forms the link exchanges power entirely or partially between the source and load. The proposed family can function in buck, boost, and/or buck–boost modes of operation, and a combination of these modes of operation is also feasible. In comparison to the parallel inductive four-quadrant link converters, the proposed family features a significantly reduced link peak current, reduced switch ratings, and reduced total number of power switches. These features enhance the efficiency, reduce the total cost, and increase the power density of the system. In order to further improve the overall efficiency of the system, minimize the current/voltage stress over all utilized semiconductor devices, and lower electromagnetic interference (EMI), a small capacitor is placed in parallel with the link inductor to realize soft-switching operation for the proposed configurations. Moreover, the proposed converters have the potential to incorporate a lightweight single-phase high-frequency transformer for electrical isolation. The proposed circuit topologies prevent reverse recovery issues and eliminate losses corresponding to body diodes of power switching devices via utilizing power switches in conjunction with external fast recovery diodes. The proposed family offers a very high level of reliability owing to its immunity from short circuit of input and output terminals and open circuit of the link inductor, which may occur in other power converters due to commutation problem resulting from a short deadtime or an overlap time between switches, unwanted control command, delay in electronic circuits, or EMI noise's misgating on or off, in addition to the absence of electrolytic capacitors in the power circuit. A control approach is also developed to regulate input and output currents in one stage of power conversion. A detailed theoretical analysis, operation, design methodology, and control strategy of the proposed family are provided in this paper, and the effectiveness and performance of the proposed converter family are verified via simulation results and experimentally. [ABSTRACT FROM AUTHOR]

In low-power applications of photovoltaic (PV) systems, the transformerless grid-connected inverters have been preferred to increase the efficiency and reduce the cost, size, and power losses when they are compared to the ones with the transformer. A transformerless single-phase inverter topology with a single dc-link capacitor for the grid-connected PV systems is proposed in this paper. The proposed inverter has been simulated by using a cooperation process of the MATLAB and SPICE package programs and it has been implemented for experimental verification. The proposed inverter reduces the high-frequency common-mode leakage current caused by parasitic capacitances of PV panels, whereas it is controlled with the unipolar sinusoidal pulsewidth modulation. Also, the results show that the common-mode voltage remains constant. The efficiency of the proposed inverter has been compared to that of the most common topologies having the dc-link decoupling during the zero voltage states. This paper is accompanied by a video file demonstrating the power loss distribution in the inverter. [ABSTRACT FROM AUTHOR]

In this paper, a new class of bidirectional partial-resonance power converters is presented. The proposed family can be configured to interface single- or multi-port dc, single- or multi-phase ac systems at input-side and/or output-side. The proposed family offers a very modular structure, which can lead to cost reduction from a common designed module. In this converter, which accomplishes power conversion in a single stage, a small inductor placed in series with the input and output switch-bridges forms the link. This small link inductor is responsible for transferring power between different ports of the system. The proposed topologies can operate in buck, boost, and buck–boost modes of operation to step up and/or step down the voltage. In buck–boost mode of operation, the converter is controlled such that the power is entirely transferred through the link inductor; whereas, in buck or boost modes of operation only a fraction of the power is transferred through the link inductor, and the remaining power is directly transferred from input phases to the output phases. Galvanic isolation, which is typically a prominent factor contributing to power density of a converter, can be provided by means of a compact and lightweight single-phase high-frequency transformer added to the link. In comparison with earlier generations of partial-resonance inductive-link power converters, in the proposed converter, the level of link peak current and consequently power-loss, as well as voltage and current stress of switches are dramatically decreased. A very small film capacitor can be placed in parallel with the link inductor to facilitate zero-voltage-switching (ZVS) operation for all the switches/diodes. Apart from increasing the overall efficiency, minimized dv/dt stress and improvement in power density are achieved by adding the link capacitor. The proposed converter employs four-quadrant switches, i.e., bidirectional-conducting bidirectional-blocking switches, and charges the link inductor in both positive and negative directions in each cycle. In view of this, better utilization of the link inductor and lower total harmonic distortion (THD) are offered. Furthermore, two distinct switching algorithms are developed for the proposed family of converters. In this paper, the detailed behavior of the proposed family is investigated analytically, and simulation and experimental results are presented to evaluate the performance and effectiveness of the proposed converter. A low-power proof-of-concept prototype with input voltage of 59 V/161 V, load voltage of 178 V/73.5 V, maximum switching frequency of 4.9 kHz/3.65 kHz at 215 W/450 W in a step-up/step-down operation is considered for the experimental verification. [ABSTRACT FROM AUTHOR]

This paper describes a dc-link voltage control method of a single-phase back-to-back cascaded H-bridge inverter (SBCI) for a medium-voltage motor drive system. The main advantage of the SBCI topology over the conventional regenerative cascaded H-bridge topology with a three-phase active front-end (AFE) is a simple system structure, which is composed of an input transformer, a power cell, a current sensor, etc. However, the challenging points of the SBCI are larger voltage ripple in the dc-link capacitor and imbalance of dc-link voltages of each phase. The asymmetric dc-link voltage of each power cells could cause unstable operation such as over-modulation due to the lack of the dc-link voltage of a particular phase and result in over-voltage or under-voltage faults. In this paper, the control strategy of the dc-link voltage for the SBCI that uses the negative-sequence voltage of the converter is described. The proposed control method is verified with a computer simulation whose target is a 6.6-kV–1.25-MW medium-voltage drive system. Also, through the experimental setup with the prototype SBCI whose power rating is 16.2 kVA, the dc-link voltage of each AFE has been controlled within a 0.5% error of its reference value at the full load. [ABSTRACT FROM AUTHOR]

This paper presents a new single-source three-phase seven-level inverter with an inherent three-time voltage boosting capability for medium-voltage applications. The proposed topology is comprised of series connection of two switched-capacitor (SC) networks with an added half-bridge module per phase. Each of such integrated SC networks requires a single capacitor associated with three active power switches. The three-time voltage boosting feature of the proposed topology can reduce the dc-link voltage requirements by 50% in comparison to the traditional neutral point clamped (NPC), flying capacitors, active NPC (ANPC), hybrid clamped ANPC, and cascaded H-bridge topologies, and 75% to advanced ANPC topologies. It can also reduce the number of required switches and capacitors as well as their voltage stresses compared to those state-of-the-art topologies reported in the literature. By integrating “n” number of added SC networks in the proposed seven-level basic topology, the number of output voltage levels can be extended to 2n+3 per phase. A finite control set model predictive control algorithm is also derived to control the converter in both the active and reactive power exchanges modes without distorting the generated grid current quality. The capacitor voltage balancing is inherent in the proposed topology, and thus, there is no need for any additional voltage balancing circuit, which further reduces the control complexity. The performance of the proposed topology and its control algorithm are validated by several measurement results. [ABSTRACT FROM AUTHOR]

Conventionally, the converter of switched reluctance motor (SRM) is fed by the uncontrollable diode bridge rectifier (DBR), which leads to a low grid-side power factor (PF) and high current total harmonic distortion (THD). In this paper, an alternative solution for the grid-connected high-speed SRM drive system with improved PF is proposed. In the proposed drive system, the three-level active front end (AFE) is connected in cascade with the midpoint converter for SRM operation. A centralized strategy, which controls the AFE and SRM together, is proposed to govern the motor speed and grid-side PF by regulating the real power and reactive power of the system, respectively. Specifically, the real power, reactive power, and the voltage balancing of split capacitors are controlled by the model predictive directed power control (MP-DPC) algorithm, which significantly reduces the control complexity and guarantees the fast dynamic response. Consequently, satisfying speed regulation, high PF, low current THD, and bi-directional power-transfer capability are achieved. An idea-proofed testbench is constructed in laboratory, and the applicability of the proposed drive system is verified by a series of experimental results. [ABSTRACT FROM AUTHOR]

Isolated, zero-voltage-switching dc–dc converter topologies represent attractive solutions in the continuous run toward higher switching frequencies, allowing more compact power supplies. Among them, the asymmetrical half-bridge flyback converter represents an interesting option, featuring simple duty-cycle control at constant switching frequency, as opposed to the popular LLC converter. The majority of papers dealing with this topology consider an approximated voltage gain similar to that of an isolated buck converter operating in continuous conduction mode, i.e., proportional to the duty cycle and, practically, load independent. On the contrary, the true voltage gain is nonmonotonic at high duty-cycle values. Anytime the converter is designed for a resonant operation, as is advisable to eliminate any reverse recovery problem of the rectifier diode, the voltage gain not only increases, but also becomes a function of the switching frequency. This article investigates the converter's voltage gain in detail, deriving a theoretical framework capable of capturing its real behavior and dependencies. The proposed analytical model has been verified through simulations as well as experimental measurements taken on a 160-W prototype working at 400 kHz. [ABSTRACT FROM AUTHOR]

DC transformer is an essential equipment for formation of multi-voltage-level DC grid. This paper proposes a novel non-isolated Boost-type alternate arm DC transformer (Boost-AADCT) for medium- and high-voltage level DC grid application. The Boost-AADCT is comprised of three submodule-cascaded arms, two thyristor-cascaded director switches, and two buffer capacitors. Bidirectional power transmission is achieved by alternatively charging and discharging of the intermediate arm following the Boost principle, while the pulsating power component caused by intermittent transmission is actively smoothened by grid-side buffer subcircuits formed by the buffer capacitors and grid-side arms. The active power buffering method increases the tolerance range of voltage ripple of the buffer capacitor, and the required energy storage capacity is resultantly reduced. Circuit configuration, operation principle, and mathematical model are first introduced. Then, the control strategy is proposed, the main circuit parameters are designed, and bidirectional fault-blocking capability is analyzed. Comparison with other DC-DC converters shows that the Boost-AADCT significantly reduces the requirement of semiconductors and has relatively lower synthetic cost. At last, performance of the Boost-AADCT and the proposed control strategies are evaluated by simulation tests conducted in MATLAB/Simulink environment. [ABSTRACT FROM AUTHOR]

This paper proposes a capacitor voltage regulation method for the dual converter with a floating bridge for aerospace applications. This topology has previously been reported, but with a constrained voltage utilization factor due to the need for capacitor voltage regulations. In this paper, the effect of switching states on the voltage variation of capacitor is quantitatively modeled and an enhanced space vector modulation scheme with current feedback is proposed to achieve an active control of the floating capacitor voltages. This proposed method also allows further exploitation and utilization of converter voltage. The relationship between the allowed modulation index of dual converter and load power factor is obtained and expressed using a fitted polynomial equation. The advantages of the proposed method include boosted voltage utilization and superior performance in term of capacitor voltage balance. These advantages have been proven through simulation and experimental results on RL loads as well as with an open-end winding induction motor. The proposed modulation scheme can boost the converter voltage utilization by at least 10% while achieving full four-level operation. More importantly, the higher available voltage allows extending the constant torque region of the motor, the further beginning of field weakening operation could be postponed. [ABSTRACT FROM AUTHOR]

A trinary multilevel converter uses a few heterogeneous H-bridge submodules (SMs) to synthesize an output voltage with multiple levels. Two major limitations of this converter are that it needs multiple dc sources and it cannot operate under pulsewidth modulation (PWM). This paper addresses these limitations by adding a low-voltage H-bridge SM to this converter and proposing a new switching algorithm. The resulting PWM-based asymmetric cascaded H-bridge converter uses only one dc source and synthesizes a high-quality output voltage. This improved converter can be a potential choice for real and reactive power support in power system applications. This paper also proposes methods for stability analysis and design of this converter. Experimental case studies evaluate the performance of the proposed converter for both standalone and grid-connected modes of operation. [ABSTRACT FROM AUTHOR]

This paper proposes a new developed switched-capacitor converter to achieve high-voltage pulses with adjustable voltage level and frequency. The proposed topology generates repetitive high-voltage pulses by using low-voltage power supply with reduced number of components, including power semiconductors and capacitor. Therefore, a converter based on switched-capacitor units with high voltage gain and high efficiency can be achieved. Operation principles and design steps of the converter as well as comparative study with conventional converters are described in this paper. Finally, simulation and experimental results of a two-stage structure of the proposed circuit validate the operation principles and features of this topology. [ABSTRACT FROM AUTHOR]

A modular multilevel converter (MMC) is regarded as a promising topology in high-voltage direct current systems. However, the MMC consists of numerous submodules (SMs) and switching devices, which lead to a considerable switching loss, and increased cost and size of the heat sink. To mitigate these issues, this paper presents a novel modulation method composed of fundamental frequency modulation (FFM) and multicarrier-based sinusoidal pulsewidth modulation schemes. The main purpose of this modulation method is the reduction of switching loss while maintaining good harmonic performance. However, the FFM scheme leads to the unbalanced capacitor voltage of each SM in the MMC. Accordingly, this paper additionally proposes the rotation method and selective voltage balancing control for SMs to ensure effective performance of the method. Simulation and experimental results verify the effectiveness and performance of the proposed modulation scheme through switching loss and spectral analyses. [ABSTRACT FROM AUTHOR]

This paper presents two capacitor voltage balancing (CVB) strategies for modular multilevel converter (MMC) applications. Both balancing schemes are based on model predictive control and are designed to efficiently solve a constrained optimal control problem, where the predicted capacitor voltage errors are included in the cost function with the demanded output voltage of a cluster being forced through an equality constraint. The first method proposed in this paper computes specific modulation indexes for each module using the explicit solution of a relaxed version of the original optimization problem. The second approach proposed in this paper reduces the complexity of the original problem by linearizing the objective function and using an optimal sorting network based on a greedy algorithm to solve this approximation. Considering the structures of both solution approaches, they are integrated into modulation schemes based on phase-shifted and level-shifted pulsewidth modulation algorithms, respectively. Experimental results obtained from a nine-cell single-phase MMC prototype demonstrate the good performance achieved with the proposed methodologies, as well as the implementation simplicity offered by the proposed CVB algorithms. [ABSTRACT FROM AUTHOR]

This paper proposes a novel dc power electronic transformer (DCPET) topology for locomotive, ac/dc hybrid grid, dc distribution grid, and other isolated medium-voltage and high-power applications. Compared with conventional PET topology, the proposed DCPET has fewer power semiconductor devices and high-frequency isolation transformers, which can improve the power density and reliability. Fault handling or redundancy design can be achieved to further improve the reliability when some dc–dc modules break down. Also, input voltage sharing control can be omitted to simplify the control system and improve the stability. Meanwhile, soft switching is guaranteed for all the switches, which is beneficial to increase switching frequency and improve power density. In this paper, the principle, evolution, and control of the proposed DCPET are respectively presented and studied in detail. Finally, a prototype of the proposed DCPET is built and the experimental results verify the validity and superiority of the proposed topology. [ABSTRACT FROM AUTHOR]

Enhancement of dc bus voltage utilization for a five-level inverter with single dc source and capacitor-fed H-bridge (CHB) units is investigated in this paper. A carrier-based modulation technique is used for boosting the dc bus utilization, which is established by providing detailed mathematical analysis. The five-level inverter used here is realized by cascading a CHB unit to each phase of a three-level neutral point clamped inverter. The increase in dc bus voltage utilization owes to the pole voltage redundancies offered by CHB units. The floating capacitors of H-bridge units are balanced within a quarter fundamental cycle using the switching state redundancies of pole voltage levels. The aforementioned modulation technique allows the inverter to enhance the dc bus utilization from 0.577 $\text{V}_{\text{dc}}$ to 0.63 $\text{V}_{\text{dc}}$ under unity power factor. This enhancement is obtained in the linear modulation range without increasing the dc bus voltage, and thus, the inverter can operate without the presence of low-order harmonics in its phase voltages. The strength of this paper lies in its detailed mathematical analysis for finding out the limiting modulation index and power factor condition in the light of floating capacitor voltage balancing issue. Simulation as well as experimental verification of the modulation scheme is carried out on an induction motor drive under various operating conditions. It is shown that this carrier-based modulation technique is suitable for any single source inverter topology with one CHB unit per phase. [ABSTRACT FROM AUTHOR]

This paper presents a new six-level flying capacitor based (FC-based) multilevel converter with one dc source and the capability of operating in all power factors and modulation indexes. Multilevel converters with one dc voltage source are attractive in many applications as they do not need rather expensive and bulky multiwinding input transformer connection at the dc side. On the other hand, not all classic multilevel converters with one dc source can produce any desirable number of output voltage levels at all power factors and/or modulation indexes. In this paper, a hybrid structure is proposed in which six voltage levels can be realized at the ac terminals. The modulation technique and the control strategy for the FC voltage balancing are presented. To show the advantages of the proposed converter, different performance criteria, such as switch count and rating, the size of capacitors, switching frequency, and power losses, are compared with other existing six-level topologies. The results indicate that the proposed structure is superior to other six-level converters from different standpoints. Simulation results are used to further evaluate the performance of the proposed converter. A laboratory-type experimental setup is used to validate the theoretical results. [ABSTRACT FROM AUTHOR]

A single-stage three-phase ac–ac converter benefiting from a high-frequency alternating link voltage is proposed in this paper. In this converter, a very small film capacitor can transfer the energy from the input to the output, owing to the high-frequency alternating voltage of the link. This eliminates the need for large electrolytic capacitors that are typically used in dc-link ac–ac converters. Moreover, a compact high-frequency transformer at the link can replace the bulky low-frequency transformers, in case isolation is required. These features increase the power density as well as reliability of the proposed converter in comparison with the conventional dc-link converters. The number of required switches in the proposed converter is 12, which is less than the number of switches needed in matrix converters, leading to lower switching and conduction losses. Despite being single-stage, the proposed ac–ac converter is capable of both stepping up and stepping down the voltage and also frequency transformation. This eliminates the need for using cascaded power converters. In this paper, the operation principles of the proposed ac–ac converter are investigated, and variable switching frequency and fixed switching frequency control methods for operating this converter are introduced. The performance of the converter is verified through simulation and experiment. [ABSTRACT FROM AUTHOR]

In this paper, a new structure for a nonisolated boost dc–dc converter is proposed. The proposed converter generates higher voltage gain than some conventional nonisolated boost dc–dc converters. In this paper, the voltage and current equations of the elements and voltage gain in continuous conduction mode and discontinuous conduction mode are extracted. Then, the critical inductance converter is extracted and the current stresses in the switches are calculated. To achieve high voltage gain, a generalized structure based on the proposed structure generates for dc–dc converters. Meanwhile, the root mean square current relations of devices are obtained for an extended structure. Finally, the results of PSCAD/EMTDC software and laboratory prototype are used to reconfirm theoretical concept. [ABSTRACT FROM AUTHOR]

This paper proposes a novel method for instantaneous balancing of neutral-point (NP) voltages with stacked multilevel inverters (MLIs) for variable-speed drives. The stacked MLI uses series-connected dc sources and NPs (connecting points of dc sources) to obtain the desired levels. The balancing of NP voltages are obtained by using a low-voltage-capacitor-fed cascaded H-bridge (CHB) per phase of a symmetrical six-phase induction machine (IM), which ensures zero current drawn from NPs (at any given instant). Since no current is drawn from NPs, the single dc-link operation with stacked capacitors is also possible. The scheme is suitable for applications, where low-voltage dc sources and batteries are stacked to form a dc link. A variable-speed operation is done using a seven-level inverter scheme for a symmetrical six-phase IM, which is formed by three dc-link stacked capacitors cascaded with two low-voltage-capacitor-fed CHBs per phase. Furthermore, the method is extended for an open-end IM to obtain a seven-level common-mode eliminated space vector structure using a single dc link. The generalization of this method for any stacked $n$ -level inverter without NP voltage deviation is also presented in this paper. The experimental results and analysis are included to validate the proposed method. [ABSTRACT FROM AUTHOR]

Nonregenerative pulsewidth-modulated (PWM) rectifiers are increasingly being considered for applications, where the power flow is unidirectional, such as power supplies for telecommunications, X-ray, the machine-side converter for wind energy conversion systems, etc. They use fewer active switches, which increase their power density and reduce cost. This paper proposes a novel reduced switch topology for a multilevel (five-level or higher) nonregenerative PWM rectifier. It uses only four controlled switches and eight diodes per phase for a five-level rectifier. Half of the diodes are naturally commutated (zero current switching) at the line frequency, which reduces switching losses. This topology has several other advantages compared to similar topologies reported in the literature, such as minimum voltage stress across the devices, elimination of transient voltage-balancing snubbers, no extra hardware for balancing the flying capacitors, the dc-link mid-point voltage, etc. In this paper, switching cycle average modeling and the carrier-based modulation strategy for this rectifier are also presented to maintain a balanced dc link and to regulate flying capacitor voltages, while achieving unity displacement factor at the rectifier input terminals. The overall performance of the rectifier is verified by experimental results. [ABSTRACT FROM AUTHOR]

This paper proposes a new dc–ac converter with a reduced number of semiconductor switches and gate drive and control circuit components. A salient feature of this inverter is its pure sinusoidal line-to-line voltages with no need for output filter. Also, the proposed inverter improves the voltage utilization factor of the input dc supply compared to the four-switch three-phase inverter (first best topology in the literature from the number of switches point of view) and standard six-switch inverter with sine pulsewidth modulation. The proposed inverter is capable of operating with a wide range of output voltages from zero to the full value of the dc input voltage by appropriately altering the instantaneous duty cycle. A three-phase universal inverter with only three power switch has been proposed in this paper for the first time ever, to our knowledge. For the purpose of providing a good compromise between fast transient response and stability, a model predictive controller is proposed. All the design expressions have been derived. A comparison with other dc–ac converters is given to show the merits of the proposed converter. Finally, satisfactory circuit operation is confirmed by experimental results from a laboratory prototype. [ABSTRACT FROM AUTHOR]