Search

This paper proposes a novel method for instantaneous balancing of neutral-point (NP) voltages with stacked multilevel inverters (MLIs) for variable-speed drives. The stacked MLI uses series-connected dc sources and NPs (connecting points of dc sources) to obtain the desired levels. The balancing of NP voltages are obtained by using a low-voltage-capacitor-fed cascaded H-bridge (CHB) per phase of a symmetrical six-phase induction machine (IM), which ensures zero current drawn from NPs (at any given instant). Since no current is drawn from NPs, the single dc-link operation with stacked capacitors is also possible. The scheme is suitable for applications, where low-voltage dc sources and batteries are stacked to form a dc link. A variable-speed operation is done using a seven-level inverter scheme for a symmetrical six-phase IM, which is formed by three dc-link stacked capacitors cascaded with two low-voltage-capacitor-fed CHBs per phase. Furthermore, the method is extended for an open-end IM to obtain a seven-level common-mode eliminated space vector structure using a single dc link. The generalization of this method for any stacked $n$ -level inverter without NP voltage deviation is also presented in this paper. The experimental results and analysis are included to validate the proposed method. [ABSTRACT FROM AUTHOR]

Nonregenerative pulsewidth-modulated (PWM) rectifiers are increasingly being considered for applications, where the power flow is unidirectional, such as power supplies for telecommunications, X-ray, the machine-side converter for wind energy conversion systems, etc. They use fewer active switches, which increase their power density and reduce cost. This paper proposes a novel reduced switch topology for a multilevel (five-level or higher) nonregenerative PWM rectifier. It uses only four controlled switches and eight diodes per phase for a five-level rectifier. Half of the diodes are naturally commutated (zero current switching) at the line frequency, which reduces switching losses. This topology has several other advantages compared to similar topologies reported in the literature, such as minimum voltage stress across the devices, elimination of transient voltage-balancing snubbers, no extra hardware for balancing the flying capacitors, the dc-link mid-point voltage, etc. In this paper, switching cycle average modeling and the carrier-based modulation strategy for this rectifier are also presented to maintain a balanced dc link and to regulate flying capacitor voltages, while achieving unity displacement factor at the rectifier input terminals. The overall performance of the rectifier is verified by experimental results. [ABSTRACT FROM AUTHOR]

This paper introduces an averaging control strategy of the phase-unit losses of modular multilevel converters (MMCs). The quantitative analysis of the MMC phase-unit loss distribution under unbalanced ac conditions is carried out by investigating the individual component of the MMC arm currents. It shows that the unbalanced arm currents will result in unbalanced phase-unit losses. To address this issue, this paper proposes a predictive closed-loop-control-based zero-sequence voltage injection method that results in much averaged loss distribution under unbalanced ac conditions. The essence of the new method is that it adjusts the three-phase sinusoidal references so that the unbalanced arm currents are fully utilized to average phase-unit losses. This paper shows the effectiveness of the new approach by electromagnetic transient simulations on PSCAD/EMTDC. [ABSTRACT FROM AUTHOR]

This paper proposes unconventional control techniques for a portable power supply consisting of electric double-layer capacitors (EDLCs), a dc–dc converter, and a low-impedance load such a plasma load. Between the EDLCs and the plasma load consuming high power, a dc–dc converter is required to control the output voltage from the rapidly decreasing voltage of EDLCs. In addition, the dc–dc converter should maintain a set point by responding to arcs occurred in plasma process. This paper proposed hybrid analog and digital controls for a nonideal boost converter which was setup by theoretical analysis. The proposed system is verified with experiment and simulation. As a result, the proposed control method can maintain the constant output voltage longer than a traditional analog pulsewidth modulation control. [ABSTRACT FROM AUTHOR]

This paper discusses a novel methodology to increase the voltage droop compensation range in generalized solid-state bipolar high-voltage Marx modulators with one resonant stage. To maintain the modularity characteristic of bipolar Marx modulators, the imbedding of additional resonant stages is not straightforward. Nevertheless, this paper proposes to add a second resonant stage to the already existing resonant-type voltage droop compensation stage. This second stage increases the voltage droop compensation percentage of a generalized solid-state bipolar Marx generator. The compensation of the bipolar pulse voltage droop is now achieved by adding two auxiliary synchronous compensation resonant voltages, to the output capacitive decaying voltage. Simulation and experimental results are presented for six Marx plus two resonant stages, 16% voltage droop, with 3-kV pulse amplitude, 100- $\mu \text{s}$ pulsewidth, 40-ms relaxation time, and 10-Hz pulse repetition rate. [ABSTRACT FROM AUTHOR]

Modular multilevel converter (MMC) has been a promising candidate in high voltage direct current (HVdc) transmission systems. Due to the features of simple structure, low cost, and low power losses, half-bridge (HB) is usually adopted as the submodule circuit in the traditional MMC. However, an HB submodule circuit-based MMC does not have the capability of blocking dc short-circuit fault, which obstructs the development of low-cost HVdc systems with overhead lines. In order to solve this problem, an MMC with active clamped T-type submodule (ACTSM) to own dc fault blocking capability is proposed in this paper. Compared with other submodule circuits, the proposed ACTSM has many features, such as symmetrical blocking capability, low power losses, low voltage stress, and low amount of independent drive signals. The topology, operation principle, dc fault blocking capability, and distribution of power losses of the ACTSM are presented in this paper. The effectiveness of the ACTSM-based MMC is validated by both simulations and experiments. [ABSTRACT FROM AUTHOR]

This paper proposes a new dc–ac converter with a reduced number of semiconductor switches and gate drive and control circuit components. A salient feature of this inverter is its pure sinusoidal line-to-line voltages with no need for output filter. Also, the proposed inverter improves the voltage utilization factor of the input dc supply compared to the four-switch three-phase inverter (first best topology in the literature from the number of switches point of view) and standard six-switch inverter with sine pulsewidth modulation. The proposed inverter is capable of operating with a wide range of output voltages from zero to the full value of the dc input voltage by appropriately altering the instantaneous duty cycle. A three-phase universal inverter with only three power switch has been proposed in this paper for the first time ever, to our knowledge. For the purpose of providing a good compromise between fast transient response and stability, a model predictive controller is proposed. All the design expressions have been derived. A comparison with other dc–ac converters is given to show the merits of the proposed converter. Finally, satisfactory circuit operation is confirmed by experimental results from a laboratory prototype. [ABSTRACT FROM AUTHOR]

In this paper, a new nonisolated high step-down dc–dc converter with ultrahigh step-down conversion ratio is proposed. Advantages of the proposed converter are high step-down ratio, extended duty cycle, reduced switching losses by a converter operation under zero-voltage switching (ZVS) conditions, reduced reverse reco-very losses of diodes by achieved zero-current switching turn-off condition, and reduced voltage spikes by the inherent active-clamping structure of the converter. In this converter, series capacitors and coupled inductors have been used in power path to achieve the low voltage gain and extended duty cycle. By the inherent active-clamping structure of the proposed converter, the leakage inductance energy is totally recovered in the output; therefore, the high voltage spike across the semiconductor devices is suppressed. The switches of the proposed converter can operate under ZVS conditions, which cause reduced switching losses and improved efficiency. In this paper, the converter operating modes are discussed, and a prototype circuit is implemented. Experimental results are presented to verify the theoretical analysis. [ABSTRACT FROM AUTHOR]

In this paper, a new soft-switching bridgeless single-phase power factor correction (PFC) converter is presented and analyzed. Employing an auxiliary switch, the input current dead angle that is the main drawback of the existing buck-type PFCs is omitted, and thus, the power factor (PF) is improved, which is the main contribution of the paper. Proposed PFC converter operates under discontinuous conduction mode (DCM) and draws sinusoidal input current from power supply inherently. All switches and diodes are turnedonandoffunder soft switching, which leads to low switching losses and elimination of diode reverse recovery problems. Also, minimum numbers of semiconductor devices are in the power flow path that reduce the conduction losses. A 120-W laboratory prototype is implemented and experimental results verify the validity of theoretical analysis and show efficiency of 92.1%. In addition, total harmonic distortion (THD) of 3.3% is achieved and the input current harmonics complies with IEC61000-3-2 Class D requirements. [ABSTRACT FROM AUTHOR]

A high step-up dc–dc converter is proposed in this paper. The presented converter benefits from some advantages such as high voltage gain and continuous input current, which makes it suitable for the renewable energy applications. The presented converter is based on the SEPIC converter. However, the converter voltage gain is improved by employing a coupled inductor and two voltage multipliers. A passive clamp circuit is also added to the proposed converter that increases the voltage gain and reduces the voltage stress on the main switch. Thus, a switch with low $R_{{\text{DS(on)}}}$ will be needed that decreases the conduction loss. Besides, the voltage stress on the output diode in the proposed converter is reduced, which alleviates reverse recovery problem. The steady-state analysis of the proposed converter is discussed in this paper. The analysis is verified with experimental results under the output power of 245 W. [ABSTRACT FROM AUTHOR]

In this paper, a high step-up quasi-Z Source (QZS) dc–dc converter is proposed. This converter uses a hybrid switched-capacitors switched-inductor method in order to achieve high voltage gains. The proposed converter have resolved the voltage gain limitation of the basic QZS dc–dc converter while keeping its main advantages, such as continuous input current and low voltage stress on capacitors. Compared to the basic converter, the duty cycle is not limited, and the voltage stress on the diodes and switch is not increased. In addition to these features, the proposed converter has a flexible structure, and extra stages could be added to it in order to achieve even higher voltage gains without increasing the voltage stress on devices or limiting the duty cycle. The operation principle of the converter and related relationships and waveforms are presented in the paper. Also, a comprehensive comparison between the proposed and other QZS based dc–dc converters is provided which confirms the superiority of the proposed converter. Simulations are done in power systems computer aided design (PSCAD) in order to investigate the maximum power point tracking (MPPT) capability of the converter. In addition, the valid performance and practicality of the converter are studied through the results obtained from the laboratory built prototype. [ABSTRACT FROM AUTHOR]

Achieving high efficiency and high power density features of intermediate bus converter (IBC) in data center application is very critical. This paper proposes a nonisolated switched-tank dc–dc converter (STC) to meet the high requirement of IBC. The proposed STC has fixed voltage conversion ratio. Theoretical analysis provides the guideline for designing resonant tank and nonresonant tank as well as selecting proper deadtime for the proposed circuit. With resonant operation feature of the proposed circuit, zero current switching is realized on all switching devices to help the high-efficiency operation of the proposed converter. Through the proposed design methodology in this paper, power loss on switching devices and planar inductors can be minimized. In addition, detailed power loss analysis and breakdown provide hints for further efficiency improvement. Simulation has been performed to validate the operating principle of the proposed STC. A designed 6x STC (450 W nominal/600 W maximum) based on eGaNFETs is demonstrated. With 54 V typical input voltage, the output of the 6x STC is 9 V. The GaN-based prototype achieves a peak efficiency of 98.55%. Also, it achieves 97.18% efficiency and 750 W/in3 power density at 450 W. [ABSTRACT FROM AUTHOR]

This paper presents a multi-coupling wireless power transfer (WPT) system aimed at dealing with various charging requests simultaneously. The proposed WPT system is able to distribute the energy more reasonably based on the top priority principle applying a novel distribution algorithm. Besides, the proposed system has the ability to charge the load in both the constant current mode and constant voltage mode while detecting the state of charging without using the bidirectional wireless communication. Moreover, this paper also puts forward a current injection topology named capacitance buffer rather than the traditional capacitor array in order to alleviate the large demand of the capacitors with different values under different resonant frequencies. Both simulation and experimental results are provided to demonstrate the feasibility and the performance of the proposed system. [ABSTRACT FROM AUTHOR]

Most of the two-stage converters for electric bike battery charging comprise of a boost converter for power factor correction (PFC) followed by a dc–dc converter with universal input voltage. These two-stage conversions suffer from poor efficiency and increased component count. In this paper, a single-stage switched inductor Cuk converter based PFC converter is proposed, which offers high step-down gain, low current stress, high efficiency, and reduced component count. The operational analysis and design equations for various components of the proposed converter are carried out in continuous current mode. This paper presents mathematical modeling, analysis, simulation, and experimentation on the proposed converter rated for 500 W, 48 V/10.4 A. The performance investigation of the proposed converter with respect to power quality indices like voltage total harmonic distortion (THD), current THD, and total power factor is carried out with various types of loads such as resistive load and battery load in both constant voltage (CV) and constant current (CC) mode. Furthermore, the dynamic performance of the proposed converter with battery charging is investigated in CV mode and CC mode with respect to the wide range of supply variations. [ABSTRACT FROM AUTHOR]

This paper proposes a new power decoupling control method for a direct ac-to-ac converter. The ac-to-ac converter consists of two half-bridge converters, two input filter capacitors, and a series-resonant circuit, which enables it to convert the single-phase line-frequency ac input to the high-frequency ac output directly. The proposed power decoupling control method stores input power pulsation at double the line frequency in the input filter capacitors. Thus, the proposed control method realizes a unity power factor in the line-frequency ac input and a constant amplitude current in the high-frequency ac output without any additional switching device or energy storage element. This paper theoretically discusses the principle and operating performance of the proposed control method and confirms the effectiveness of the proposed control method in experiments using an isolated ac-to-dc converter based on the direct ac-to-ac converter. As a result, the proposed power decoupling control method effectively improved the displacement power factor of the line-frequency ac input current to more than 0.99 and reduced the voltage ripple in the dc load to 4%. [ABSTRACT FROM AUTHOR]

This paper presents the design and construction of a sample of Marx pulsed generator based on boost converter (BC) pulse-forming networks (BCPFNs). BCPFN is used instead of the conventional Marx floors for constructing this pulsed generator. BCPFN is carried out by connecting inductors and capacitors in series and parallel modes, respectively, by using solid-state switches, and during this procedure the pulsed generator converts to BC temporarily and increases the voltage of capacitors uniformly to a considerable value. This technique causes an increase in the discharging voltage level to the load that is many times more than its dc voltage source by charging the capacitors to a greater level. In order to take advantage of the benefits of Marx generator and PFN, this paper suggests a new circuit with the minimum number of switches. It means, to compose BCPFN and Marx, we have tried to design the circuit with fewer switches and instead of it we have achieved our desired performance with changing the operating mode in the states of BC, PFN, BCPFN, and BCPFN Marx. The results are simulated with MATLAB software. At the end, the experimental results of the construction of the above-mentioned system at low-power levels are presented, and the topology’s accuracy is proved by comparing them to the results of simulation. [ABSTRACT FROM AUTHOR]

This paper proposes a new modulated model predictive control method for the control of modular multilevel converters (MMCs) in voltage source converter-high voltage dc systems. The proposed method retains the advantages of the conventional finite control set-model predictive control methods by programing the nonlinear properties of the MMC into the design calculations while minimizing the ac line and circulating current ripples and steady-state error by generating modulated switching signals with a fixed switching frequency. In this paper, first, the predictive modeling of the MMC is provided. Next, the proposed control method is described. Then, the application of the proposed method to an MMC system is detailed. Finally, experimental results from an MMC system connected to a three-phase grid are provided to validate the theoretical outcomes. [ABSTRACT FROM AUTHOR]

In high-power applications, parallel-operated T-type three-level pulse width modulation (PWM) rectifiers (T3LPRs) are widely employed to improve the power capacity and system reliability. For parallel-operated T3LPRs, there are two important issues need to be properly addressed: 1) the neutral-point potential (NPP) balancing, and 2) the zero sequence circulating current (ZSCC) between the common ac and dc bus. In this paper, the fluctuation of NPP in a T3LPR and the generative mechanism of ZSCC in parallel-operated T3LPRs are first investigated. The zero sequence voltage (ZSV) difference between the parallel-operated T3LPRs is identified as the main excitation source of the ZSCC problem. Meanwhile, the disconnection of the neutral point and the control effect difference of NPP balancing in each T3LPR also affect the ZSCCs within the parallel-operated T3LPRs. To adjust the ZSV of T3LPRs, the dwell time of the positive small voltage vector in each switching period of the converter, which is usually adjusted to balance the NPP, is also required to be controlled to suppress ZSCC. Therefore, in this paper, to avoid the possible conflict, an improved modulation mechanism is designed to guarantee simultaneous ZSCC suppression and NPP balancing. The neutral points of each T3LPR are connected. Then, by adjusting the dwell time of the positive small voltage vector, the charging time of two dc capacitors is adjusted to balance the NPP, and the ZSV differences between different T3LPRs are adjusted to suppress ZSCCs. To avoid the control effect difference of independent NPP balancing in different T3LPRs, all T3LPRs share the same value marking the difference between two dc capacitor voltages. Thus, a communication with a greatly reduced baud rate requirement is needed for NPP balancing to transfer the difference between the two dc capacitor voltages. Moreover, no extra circuit is needed for ZSCC suppression. These approaches make the proposed improved space vector PWM strategy much more practical and easy to employ. The proposed method is verified with experiments on two 3-kW T3LPR prototypes. [ABSTRACT FROM AUTHOR]

This paper proposes generation of a 15-level (14 concentric) dodecagonal voltage space vector structure (DVSVS) for a star connected induction motor drive. The proposed multilevel DVSVS is obtained by cascading two inverters, namely a primary and secondary inverter. The primary inverter is a five-level (5L) structure formed by stacking two three-level flying capacitors with individual reduced dc sources and the secondary inverter is also a 5L structure formed by cascading two capacitor-fed cascaded H-bridges (CHB). The active power is supplied by the primary inverter, while the secondary inverter acts as switched capacitor harmonics filter, and capacitors in the secondary inverter are balanced naturally irrespective of load power factor for entire modulation index. The high-voltage dc supply fed primary inverter is operated in quasi-square wave mode, while the high frequency switching is applied to low voltage CHBs, thus, reducing the overall switching loss. The proposed scheme gives the advantages of both DVSVS and multilevel structure, thus, making it one of the solutions for battery or stacked dc-fed applications. The paper also presents the experimental results as well as comparison study with the existing topologies to support the advantages of proposed scheme. [ABSTRACT FROM AUTHOR]

This paper proposes a new single-phase single-stage switched-boost inverter with four switches. Like the quasi-Z-source inverter and quasi-switched boost inverter (qSBI), the proposed inverter has the main features as continuous input current, buck/boost voltage with single-stage conversion, and shoot-through immunity. Compared to the qSBI, the proposed inverter uses one more capacitor and one less switch. This paper presents the operating principles, pulse-width modulation control strategy, parameter design guidelines, and simulation results for the proposed inverter. To verify the performance of the proposed inverter, an 800-W prototype was built with an 110 V/50 Hz output voltage in stand-alone and grid-connected modes. The simulation and experimental results matched those of the theoretical analysis. [ABSTRACT FROM AUTHOR]

With the development of the MMC-HVDC, the lightweight requirements of the converter valves have become increasingly urgent. The reduction of submodule (SM) capacitance is difficult because the ripple of capacitor voltage cannot be too large, which is one of the key factors that affect the weight and the volume of the MMC. On the basis of the fundamental frequency and double fundamental frequency components are the critical factors for voltage ripples, this paper proposes an arm inductor switching control (AISC) strategy to reduce the voltage ripples of SM capacitor by controlling the inductance value of the bridge arm. The proposed strategy and the existing circulating current suppression controller (CCSC) are researched in terms of mathematical principles. A two terminal DC transmission model is built in PSCAD/EMTDC simulation environment, then the capacitor voltage fluctuation curves of non-capacitance-reducing control, CCSC, and proposed strategy with the same parameters are simulated. Afterwards, an experiment prototype is built to verify the simulation results. Simulation and experimental results are presented to demonstrate the effectiveness of the proposed strategy. [ABSTRACT FROM AUTHOR]

This paper presents voltage regulation and current tracking control strategies for three phase two-level grid-connected power converters. By using power-invariant Park’s transformation, an averaged mathematical model of power converters is obtained in dq synchronous reference frame. Then a novel control strategy using adaptive control and ${H}_{\infty }$ technique is proposed to regulate the dc-link output voltage as well as track a desired current reference for three-phase power rectifiers. More specifically, an efficient adaptive controller is established in the external loop for regulating dc-link output voltage in the presence of external disturbances. A set of ${H}_{\infty }$ controllers are designed in the internal loop to force the input currents track their desired values. Finally, simulation results obtained from the proposed control method are presented, analyzed, and compared with that of sliding mode control, and the superiority of the proposed control laws is verified. [ABSTRACT FROM AUTHOR]

Modular multilevel converter based high voltage direct current (MMC-HVDC) transmission is the prospective technology for large-scale wind farms integration. In this paper, a comprehensive coordinated control strategy for DC fault ride-through (FRT) of wind farms connected to the grid through bipolar MMC-HVDC transmission is proposed. To reduce the requirement of breaking speed and capacity of DC breakers, an active current-limiting control method is proposed to limit the rise rate of DC fault current, and the principle of parameter selection is designed. After DC breakers isolate fault, the control mode switching methods of bipolar MMC are designed to make the fault pole MMC operate as a STATCOM to support the AC grid and improve the active power transmission capability of the healthy pole MMC, which can reduce the impact range of unbalanced power between wind farms and converter station. In addition, a coordinated control strategy for wind farms load-shedding considering speed constraints is designed to realize the optimal distribution of load-shedding power among wind turbines, which can regulate unbalanced power together with the healthy pole MMC to realize DC FRT. Finally, the effectiveness and feasibility of the proposed control methods are verified by simulation results. [ABSTRACT FROM AUTHOR]

The emerging voltage source converters (VSCs) such as hybrid cascaded multilevel converters (HCMCs) are promising converter technologies which enable higher converter efficiency, compactness, and DC fault resilience for high voltage direct current (HVDC) transmission. However, the large number of switching events due to the converters’ submodules introduces a heavy computational burden for electromagnetic transient (EMT) simulations. Efficient and accurate EMT-type converter models play a vital role in the control and design of HVDC converters. Several computationally efficient models for the HCMCs are proposed in this paper, including the detailed equivalent model (DEM) and several average value models (AVMs) of varying accuracy. Additionally, a combined model is proposed which allows the users to switch among the DEM and AVMs during dynamic simulations. The proposed models are validated against the DEM for dynamic transients. The simulation results demonstrate good modeling accuracy of the proposed models. The AVMs are also shown to significantly improve simulation efficiency compared to the DEM, which is very desirable especially for HCMCs with a large number of submodules. [ABSTRACT FROM AUTHOR]

Pole-to-pole dc short circuit fault blocking capability is a major concern when modular multilevel converters (MMCs) are applied in high voltage direct current (HVDC) transmission systems. Traditional MMCs based on half-bridge submodules (HBSMs) cannot block the fault current, thus needing expensive direct current circuit breakers (DCCBs). There are MMCs based on improved submodule topologies that can block dc faults, but usually with significantly increased device cost. This paper proposes an improved HBSM-based MMC (HB-MMC) which needs fewer extra semiconductor devices. The improved HB-MMC is more competitive than other schemes when it comes to investment cost and loss. An H-bridge circuit composed of two director switches and two diode valves is installed around one arm of the HB-MMC, which will not change the direction of current during the normal operation, whereas it can change the direction of the fault current when a pole-to-pole dc short circuits fault is detected. After two director switches have been turned off, a reverse-biased voltage provided by one arm can block the fault current. The topology can be further improved to provide reactive power during faults. Simulation results are presented to validate the features of the proposed improved HB-MMC. [ABSTRACT FROM AUTHOR]

The modular multilevel converter (MMC) is one of the most attractive topologies for high-voltage and high-power applications. Reliability is an important challenge for MMCs due to large amounts of power switches in the phase leg of the MMC. To enhance the reliable performance of MMCs, an effective and accurate fault detection and localization strategy for MMCs with the nearest level modulation is proposed in this paper. According to the general characteristics of the MMC, the capacitor voltage of the faulty submodule (SM) is higher than the healthy ones’. Based on the sorting algorithm, the faulty SM will have the maximum voltage and it will be identified by the proposed fault detection method. The auxiliary monitoring is supplemented to the detection algorithm for the cases of faults occurring in multiple SMs. The faulty SM localization strategy is based on the differences of capacitor voltages. The faulty switches are located by the distinctions of capacitor voltage in different current intervals. The proposed strategy could be applied under the cases of single or multiple SMs failures and identifies three kinds of the power switches faults in the faulty SM. The validity of the proposed strategy is verified by the simulation results in MATLAB/Simulink. [ABSTRACT FROM AUTHOR]

Transient voltage and current stresses are essential for the design and protection of multi-terminal DC (MTDC) transmission systems, especially under the short-term dynamics after severe grid faults. In this paper, we propose a discrete-time model for the modular multilevel converter based MTDC (MMC-MTDC) system considering the DC-side disturbances in the system. Based on the piecewise linear modeling, the state variables such as the transient voltage on the sub-module (SM), arm current, etc., can be calculated analytically for the critical short term (within 10 ms) after the severe DC fault while the system protection is yet to be activated. Parameter sensitivity analysis is also performed to give a better system design guideline. The estimation results are validated by detailed electromagnetic (EMT) circuit simulations and the scaled-down experimental laboratory prototype. [ABSTRACT FROM AUTHOR]

In this article, a high-power-density off-line light-emitting diode (LED) driver is proposed. The proposed ac–dc driver is the novel integrated buck and boost converter (IBBC). Besides the high-power-density, the converter shows a high power factor (PF), and a low total harmonic distortion (THD). The IBBC is a two-stage driver that features just one controlled switch, which leads to high PF and low THD operation ensuring high efficiency, and size and cost reduction. Moreover, the switch current is minimized as it conducts the higher of the buck or boost converter, but not the addition of both as in other integrated converters. Moreover, for a further increase of the power-density, a magnetic integration is made by integrating the two inductors of both the buck and boost converters in one core. Thus, the proposed converter has been named as fully integrated buck and boost converter (FIBBC). In this paper, the IBBC is analyzed, and a design methodology is proposed. Also, this article presents a magnetic analysis of the novel FIBBC. In addition, a comparison between two prototypes is presented, one for the IBBC and another for the FIBBC, both of them supplying an LED luminaire of 46 V/ 0.575 A. The FIBBC shows a high PF equal to 0.994, very small THD of 10%, output current ripple of 6%, and efficiency of 92.62%, which represents a landmark on the efficiency of integrated converters. [ABSTRACT FROM AUTHOR]

This paper presents a new modular ac/dc step-up soft-switched converter with unity turns ratio high-frequency transformers for medium-voltage (MV) dc grid in wind energy systems. In the proposed converter, the three-phase boost rectifier is combined with step-up resonant circuits and high-gain output rectifier modules (called voltage quadrupler modules) to form a modular step-up power conversion unit. As a result, the proposed converter is able to achieve very high voltage gain without using any medium-to-high frequency transformers with very large turns ratio, which greatly simplifies the insulation requirement and design of the high-frequency transformer. In addition, soft-switching operations are achieved in all the semiconductor devices to maintain high efficiency. The techniques to ensure voltage balancing across the dc-link capacitors and to achieve output short-circuit protection will be discussed in this paper. To realize high-frequency MV operation, silicon carbide (SiC) devices are utilized in the converter implementation on a 1.5 MW, 690 VAC/40 kV converter system to validate the performance of the proposed circuit. Experimental results on a 3.5 kW, 145 VAC/6.2 kV, 95.4% efficiency SiC-based laboratory-scale proof-of-concept prototype are then provided to highlight the merits of this work. [ABSTRACT FROM AUTHOR]

Multilevel converters with floating capacitors (FCs) are widely applied in recent years in a wide range of industrial applications from high-voltage direct current systems to high power drives. However, some FC topologies lack complete FC voltage balancing capability due to the inherent topology limitation or the insufficient switching state for capacitor balancing. This will result in large ripples on capacitors at low frequency (such as fundamental frequency), limiting their performance and application, particularly, when the fundamental frequency is very low in low-speed drive operations. Typical examples of those multilevel converters are modular multilevel converters (MMC), nested neutral-point-clamped (NNPC) converter, etc. In order to improve the FC balancing for this kind of multilevel converters, this paper proposes a carrier-based pulse-width modulation (PWM) method, named stair edge PWM method. This method can obtain sufficient redundant switching states for FC voltage balancing by producing multiple levels in one PWM period. The FC voltage balancing is thus achieved at switching frequency, which can greatly reduce the capacitor voltage ripple and therefore enable the use of much smaller FCs. Meanwhile, the voltage stress on each device and low $dv/dt$ feature are still the same as the normal multilevel operation, reserving two of the most salient features of multilevel converters. The proposed method also features much simpler and easier implementation compared with space-vector-based approaches, particularly when high-level converters are considered. An application example using a four-level NNPC converter is provided in this paper. The effectiveness and performance of the proposed method are verified by both simulation and experiment. [ABSTRACT FROM AUTHOR]

The soft-switching solid-state transformer (S4T) employs only 12 main active devices and an auxiliary resonant circuit to implement a bidirectional solid-state transformer, with an attractive feature of achieving a full range of zero-voltage-switching conditions for all the main devices. This paper covers detailed design of the power stage, auxiliary resonant circuit, and control of the S4T. The high-frequency transformer is an essential element for the S4T, and it has a unique feature of dc-biased flux. Design of such a high-frequency transformer is also discussed in detail in this paper. Soft startup, shutdown, and fast dynamic response under load transients are also attractive behaviors because of the low inertia of the S4T. Experimental results from a 208-V/10-kV·A S4T unit are presented. [ABSTRACT FROM PUBLISHER]

This paper introduces a non-isolated high step-up dc–dc converter with dual coupled inductors suitable for distributed generation applications. By implementing an input parallel connection, the proposed dc–dc structure inherits shared input current with low ripple, which also requires small capacitive filter at its input. Moreover, this topology can reach high voltage gain by using dual coupled inductors in series connection at the output stage. The proposed converter uses active clamp circuits with a shared clamp capacitor for the main switches. In addition to the active clamp circuit, the leakage energy is recycled to the output by using an integrated regenerative snubber. Indeed, these circuits allow soft-switching conditions, i.e., zero voltage switching and zero current switching for active and passive switching devices, respectively. The mentioned features along with a common ground connection of the input and output make the proposed topology a proper candidate for transformer-less grid-connected photovoltaic systems. The operating performance, analysis and mathematical derivations of the proposed dc–dc converter have been demonstrated in the paper. Moreover, the main features of the proposed converter have been verified through experimental results of a 1-kW laboratory prototype. [ABSTRACT FROM PUBLISHER]

In this paper, a new structure of nonisolated boost dc–dc converters based on voltage-lift technique is proposed. In comparison with conventional nonisolated boost dc–dc converters, the proposed converter generates higher voltage gain. In this paper, the relations between voltage and current of all elements in continuous conduction mode and discontinuous conduction mode are calculated as well as voltage gain in each mode. Then, the critical inductance and stress of switch current are extracted. Finally, the validity of given theories is examined by using the experimental results. [ABSTRACT FROM PUBLISHER]

In this paper, two structures are proposed for the switched-inductor quasi-Z-source inverter. In the proposed structures to extend the voltage gain of inverter, two new switched-inductor structures are used. In the proposed structures, voltage across the capacitors in the Z-source network and in the switched-inductor is symmetric and small. The other advantage of proposed inverters is known as achieving higher voltage gain per smaller duty cycle ratio (of shoot-through). Compared with a conventional continuous input current switched-inductor quasi-Z-source inverter at the same gain voltage, there is less of a ripple of input current in the proposed inverters. In this paper, at first the both the conventional and the proposed switched-inductor Z-source inventers are thoroughly investigated to find out their governing relations. Then, the proposed Z-source inverters are compared with the conventional ones by simulating them to assess their performance efficiency. Next, applying the simple boost pulse width modulation the simulation is carried out with PSCAD/EMTDC software. After that, to evaluate the obtained results, the prototypes of the proposed inverters with 48 Vdc input voltage are used. [ABSTRACT FROM PUBLISHER]

This paper analyzes the combination in a cascaded H-bridge multilevel inverter (CHBI) based on transformers with the different turn ratios for increasing the voltage level and proposes the switching method for achieving the output voltage distribution among H-bridge cells (HBCs). The transformers used in this paper are connected to the output of the respective HBCs, and the secondary sides of all the transformers are connected in series for generating the final output voltage. Only one of the transformers, in particular, has a different turn ratio for increasing the output voltage level. In this paper, the possible turn ratio of the special transformer with a different turn ratio is discussed in detail, and a switching method based on the level-shifted switching method for the topology used in this paper is proposed. To verify the effectiveness of the proposed method, a three-phase 21-level CHBI is experimentally tested. [ABSTRACT FROM PUBLISHER]

This paper proposes a single-phase power factor correction (PFC) rectifier to achieve high power factor, wide output voltage range, and ripple power decoupling without using electrolytic capacitors. It consists of two parts: PFC circuit and output voltage regulation circuit. The load side is involved in both parts, which is different from the regular two-stage conversion structure. The proposed rectifier can be directly applied to low voltage cases due to the wide output voltage range. And the decoupling capacitor voltage can be smaller than the peak grid voltage, which reduces the voltage stress. Besides, the low-frequency ripple power buffer is implemented without a dedicated power-buffering controller. This paper first introduces the circuit structure, operation principles, and control method. Then, the system design consideration is given. Finally, the effectiveness of the proposed topology is verified by the simulations and experimental results. [ABSTRACT FROM AUTHOR]

This paper presents a single-stage nonisolated switched capacitor ac–dc converter for power-factor correction (PFC). This converter features reduced passive components, single switch, transformerless high voltage gain, and improves the power factor, reduces total harmonic distortion, and voltage stress across the switch. The peak current mode with a dynamic resonant perturbation scheme compensates the subharmonics that exist at zero crossing of the source current is implemented for PFC. In this paper, the principle of operation, large signal modeling of the circuit, and control method for the proposed PFC converter are provided. [ABSTRACT FROM PUBLISHER]

This paper presents a new multilevel converter topology based on a variable or multilevel dc-link stage. This stage is shared by all inverter output phases, thus increasing the number of output voltage levels while reducing the overall number of active devices compared to traditional topologies; therefore, it is called a reduced multilevel converter (RMC). The converter is not capable of reducing the blocking voltage of the devices; hence, unlike other multilevel converters aimed at medium-voltage applications, this converter is interesting for low-voltage- and high-power-quality-demanding applications such as photovoltaic inverters, wind energy conversion systems, and uninterruptible power supplies. The main novelty behind the proposed concept is the basic dc cell used to generate the variable dc-link voltage, which includes a controlled path through the floating capacitors to provide the necessary degree of control to enable a shared multilevel dc link for all the output phases of the converter. The dc cells are connected in a multicell structure to increase the number of levels of the converter. A five-level version of the RMC topology is briefly compared to other five-level converters such as the five-level active neutral-point-clamped converter and the five-level flying capacitor converter. This paper presents the structure of the new topology with its operating principle, switching states, main characteristics, and experimental validation using finite-control-set model-predictive control. [ABSTRACT FROM PUBLISHER]

A new isolated single-stage soft-switching power-factor-correction (S4 PFC) driver for supplying light-emitting diodes (LEDs) is introduced in this paper. In the proposed LED driver, the switches voltage stress and also the dc-bus voltage is limited to the peak of the line voltage. Hence, low voltage rated mosfets and diodes can be used. The efficiency is improved because the switches are turned on under zero current switching (ZCS) condition and turned off under zero voltage zero current switching (ZVZCS) condition. Also, no current feedback is required since the converter provides an output current independent of output voltage. In this paper, operating principle of the proposed LED driver is presented and design considerations are discussed. To verify the theoretical analysis, a laboratory prototype of the proposed converter for supplying a 50 W/70 V LED module from 220 Vrms/50 Hz ac mains is implemented, and the experimental results are presented. Since current feedback is not used, dimming property and operation for universal voltage range is not achievable. [ABSTRACT FROM PUBLISHER]

This paper proposes a current-fed single-phase inverter without constant intermediate DC link. It eliminates electrolytic capacitor from the DC-link and introduces an intermediate pulsating DC bus. The proposed topology is modular with three full-bridges making it scalable for high-power applications. New pulsating-DC-modulation for back-end pulsating DC-link inverter and secondary modulation (SM) for front-end DC-to-pulsating DC converter is proposed. Soft-switching and device voltage clamping of both primary side and secondary side devices of front-end current-fed full-bridge converter is realized. A rotating partial hybrid pulsewidth modulation has been introduced. One leg of inverter is commutated at a low switching frequency, while the other leg is operated at a high switching frequency for partial period of a line frequency cycle. Thus, switching losses of the back-end inverter are considerably reduced. Rotating mechanism is used to equalize the switching losses of four switches of the inverter. This paper presents detailed operation and analysis of the topology with a proposed modulation scheme. Simulation and experimental results validate the effectiveness and accuracy of the proposed modulation scheme as well as soft-switching and performance of the converter. [ABSTRACT FROM PUBLISHER]

A switched-capacitor-based dual-switch dc–dc converter with a high-boost voltage gain is proposed in this paper. The proposed converter can obtain a high-voltage gain with a small duty cycle, which decreases the voltage stress and the conduction loss on the power switches. This paper presents the key waveforms, the operating principles at the continuous conduction mode and the discontinuous conduction mode, and the parameter design. Moreover, a comparison between the proposed converter and other nonisolated converters has been completed. To verify the operating principle, a 200 W prototype is constructed with an input voltage of 25–50 V and an output voltage of 200 V. The simulation and experimental results are shown. [ABSTRACT FROM PUBLISHER]

This paper presents a novel six-pulse low-frequency (LF) fluctuating high-voltage dc-bus-based power system architecture for fuel cell vehicles (FCVs) application. A novel hybrid modulation scheme consisting of six-pulse modulation at LF scale and modified secondary modulation and 33% pulse width modulation at high-frequency (HF) scale is proposed. Three-phase ac waveforms for the propulsion system of FCVs are generated from LF fluctuating high-voltage dc bus. The proposed modulation technique significantly reduces the switching losses of the bidirectional dual-stage inverter: 1) soft-switching of both sides of the front-end current-fed full-bridge converter is realized; and 2) at any moment, only one leg of back-end three-phase inverter is switched at HF, while the other two legs are kept in on or off states. This tremendously reduces the bidirectional inverter's switching losses and improves the system efficiency. The LF fluctuating high-voltage dc bus allows the elimination of large electrolytic dc-link capacitor, which contributes to a more reliable and compact design. This paper presents the operation, analysis, and design of a bidirectional inverter implementing the proposed hybrid modulation technique. Simulation results obtained from power electronics simulation software PSIM and experimental results from the lab prototype clearly validate the effectiveness of the proposed modulation technique. [ABSTRACT FROM PUBLISHER]

In this paper, new half-bridge and full-bridge topologies for a switched-boost inverter are proposed. These topologies have a high boost factor in comparison with conventional types. In addition, the proposed topologies have continuous input current and can generate zero-voltage level in output. In this paper, the operation of the proposed inverters in different operating modes is analyzed. Then, the values of inductors and capacitors are designed. Moreover, the used switching pattern and its logical diagram are introduced. A comprehensive comparison between the proposed and conventional topologies in terms of the boost factor, the number of elements, and the efficiency shows the good features of the proposed inverters. Finally, to verify correct operation of the proposed topologies and derived equations, simulation and experimental results are presented. [ABSTRACT FROM AUTHOR]

Fast and detailed calculations of harmonics, generated by three-phase uncontrolled rectifiers with finite dc smoothing, can be performed by using detailed analytical procedures (DAPs). Several DAPs are developed for continuous- and discontinuous-conduction modes (CCM and DCM) when balanced operation of the system is assumed. The authors of this paper have recently proposed a new DAP (model 1a) in which nonideal conditions, such as unbalances and even harmonic voltages on the ac side, are taken into account. However, only CCM is assumed in model 1a. The main objective of this paper is to overcome this limitation of model 1a so that a new DAP (model 1b) for DCM is presented, which is capable of considering unbalanced operation. Moreover, the boundary of the DCM is also estimated for model 1b under nonideal conditions. [ABSTRACT FROM PUBLISHER]

At 13.56 MHz, the circuit parasitic elements strongly affect the stability, performance, and efficiency of the inverter. In this paper, the effect of parasitic elements in the 13.56-MHz half-bridge inverter is analyzed in detail based on the point of view of the high-frequency ringing in the circuit. A proposed inverter design that aims to attenuate the influence of the parasitic elements is presented, including optimized printed circuit board (PCB) design and ringing damping design. The simulation and experiment results show that the proposed PCB design not only reduces the parasitic inductance in the ringing loop but also improves the stability of the inverter by avoiding the subresonant at low frequency and reducing the radiation electromagnetic interference noise. This paper also points out that the ringing current exists in the circuit even with the proposed optimized PCB design lead to the instability of the inverter at high voltage operating condition. The proposed damping circuit significantly suppresses the ringing in the circuit and improves the stability as well as the efficiency of the inverter. The experiment results confirm that by using the proposed design, the half-bridge inverter module using Silicon mosfet is stable at 13.56-MHz switching frequency and its efficiency obtains \text93.1\% at 1.2-kW output power. [ABSTRACT FROM PUBLISHER]

This paper proposes an active switching harmonic current reduction method within the dc-link capacitor of two-level, three-phase, back-to-back converters. This method is based on the derived analytical solution for switching harmonic currents in the dc-link. It is shown that by controlling the pulse width modulation carrier waveform's phase angles, the harmonics in the second carrier band of the rectifier and the inverter can be synchronized such that cancellation occurs in the dc-link capacitor. This synchronization is provided by harmonic phase feedback control. The feasibility of the proposed approach has been verified experimentally and results are presented in this paper. [ABSTRACT FROM PUBLISHER]

This paper presents a hybrid nonisolated dc–dc commutation cell, which is generated by the integration between conventional commutation cell and ladder-type passive switched capacitor (SC) cell. From the resulted hybrid cell are derived three different dc–dc converters: a buck-type, a boost-type, and a buck–boost-type. The three structures are analyzed in this paper and are presented the topological stages, static gain characteristics in continuous conduction mode and discontinuous conduction mode, steady-state analysis. The analyses are generalized in relation to the number of switched-capacitor cells employed, which allows the increase of the rated gain of the converters by adding more SC cells. In addition, the proposed hybrid nonisolated dc–dc commutation divides naturally the voltage stress among the semiconductors and capacitors of the power stage. A 1-kW prototype was developed to verify the operation of the three proposed converters and their theoretical analysis. For the buck-type topology, designed with an input voltage of 600 V and output voltage of 450 V, a peak efficiency of 99.2% and efficiency at rated power of 99% were obtained. [ABSTRACT FROM PUBLISHER]

The development of a high static gain dc–dc converter with the integration of the voltage multiplier cell and the coupled inductors operating with soft switching is presented in this paper. The use of coupled inductors and voltage multiplier techniques allow the operation with low switch voltage and low conduction losses. The switch turn-on commutation occurs with zero current switching due to the presence of the coupled-inductor leakage inductance. The leakage inductance also reduces the reverse recovery current of all diodes. The zero voltage switching at the power switch turn-off is obtained with the inclusion of only a diode and a snubber capacitor per phase, without the use of auxiliary switches. The soft-switching range is independent of the load and is maintained even with a light load. The theoretical analysis, design procedure, and experimental results are presented in this paper. A two-phase boost converter with one voltage multiplier and coupling inductors was built with an input voltage $V_{{\text{in}}}= { \text{24 V}}, output voltage Vo= { \text{432 V}}, and output power Po= { \text{400 W}}. The efficiency obtained is equal to 94.55% at the nominal power. [ABSTRACT FROM PUBLISHER]

Sheppard–Taylor power factor correction (ST-PFC) rectifier could obtain a high power factor due to its capability of overcoming the control detuning issue. However, it needs a bulky electrolytic capacitor at the load side to buffer the double-frequency ripple power (DFRP), which reduces the reliability and power density significantly. This paper proposes a control method to divert the DFRP to the small energy transfer capacitor. Consequently, the bulky electrolytic capacitor is replaced with a small film capacitor. The proposed method is carried out by introducing the freewheel state (one switch is turned on and the other is turned off) into the control. So no extra hardware is added, which makes the proposed method cost-effective. A low electromagnetic interference emission is also achieved due to the continuous input–output currents. In addition, the proposed method can be extended to other topologies easily. This paper first gives the detailed analysis of the proposed control method, and then introduces the controller design. The selection of the passive components is also briefly discussed. Finally, the simulation and experimental results verify the effectiveness of the proposed control method. [ABSTRACT FROM AUTHOR]

These days, constant on-time current mode (COTCM) control scheme is widely used in the voltage regulator (VR) controllers because it has a higher light-load efficiency and a higher BW design capability while maintaining a simpler compensation requirement. One issue plaguing the COTCM control is its slow transient response which is caused by its fixed TON operation. During the heavy-load step-up transient, the duty cycle becomes saturated and the inductor current increment becomes limited by TON and the minimum off time (TOFF$\_$ MIN) ratio, which can create a large undershoot at load step up. On the other hand, in the load step-down case, if the load step down occurs at the beginning of TON, a large overshoot can be created at the output. To solve this issue, this paper presents a method designed to increase the TON at load step up and then very quickly, decrease at load step down in order to reduce the undershoot and overshoot at output or otherwise save the output capacitor. In this proposed method, the increase or decrease of T ON is proportional to the output change which eliminates the chance of any overcorrection or ring-back problem unlike the methods presented in prior forums. This feature enables the control to work seamlessly in a high-frequency load repetitive case in VR applications. Since this TON change occurs only in the transient period when duty cycle is saturated, it does not affect the small-signal property of the COT control. Moreover, the proposed methods are very much compatible with the state-of-the-art single and multiphase COT control structures. Simulation and test results in both single and multiphase operations are also presented in the paper to verify the proposed concept. [ABSTRACT FROM PUBLISHER]