Search

In this paper, a new multi-input multi-output (MIMO) dc–dc converter with high step-up capability is proposed for wide power ranges. Also, in order to increase each output voltage, diode–capacitor voltage multiplier (VM) stages are utilized in the proposed converter. The number of input stages, output stages, and VM stages are arbitrary and dependent on design conditions. At first, the general structure of proposed MIMO converter is presented. Then, in order to explain the converter operation, we walk through the design of a 1-kW four-input two-output example, including loss and efficiency calculations. We validate the design with a prototype that matches efficiency calculations. [ABSTRACT FROM AUTHOR]

When fast voltage control is used in a power factor control, the ripple of the dc link causes current harmonics. This paper proposes a method to reduce the harmonic content of a fast voltage loop in a power factor correction, which can both produce low distortion during steady-state operation and fast recovery from a load transient. The performance is achieved by using a Takagi–Sugeno-type nonlinear controller for dc-link voltage control. The proposed nonlinear control is compared with linear proportional–integral (PI) control, which is tuned to meet the standardized regulations for the harmonic content in a 3-kW single phase power supply. The results show that the presented nonlinear voltage controller can maintain the dynamic performance of the linear control with reduced current harmonics. It is also shown that the used nonlinear control method requires only marginally more complex control algorithm compared to commonly used linear PI control. [ABSTRACT FROM AUTHOR]

This paper presents a new reconfiguration module for asymmetrical multilevel inverters in which the capacitors are used as the dc links to create the levels for staircase waveforms. This configuration of the multilevel converter makes a reduction in dc sources. On the other hand, it is possible to generate 13 levels with lower dc sources. The proposed module of the multilevel inverter generates 13 levels with two unequal dc sources (2VDC and 1VDC). It also involves two chargeable capacitors and 14 semiconductor switches. The capacitors are self-charging without any extra circuit. The lower number of components makes it desirable to be used in wide range of applications. The module is schematized as two back-to-back T-type inverters and some other switches around it. Also, it can be connected as a cascade modular which leads to a modular topology with more voltage levels at higher voltages. The proposed module makes the inherent creation of the negative voltage levels without any additional circuit (such as H-bridge circuit). Nearest level control switching modulation scheme is applied to achieve high-quality sinusoidal output voltage. Simulations are executed in MATLAB/Simulink and a prototype is implemented in the power electronics laboratory in which the simulation and experimental results show a good performance. [ABSTRACT FROM AUTHOR]

Multilevel inverters are receiving more attentions nowadays as one of preferred solutions for medium- and high-power applications. As one of the most popular hybrid multilevel inverter topologies, the five-level active-neutral-point-clamped inverter (5L-ANPC) combines the features of the conventional flying-capacitor type and neutral-point-clamped (NPC) type inverter and was commercially used for industrial applications. In order to further decrease the number of active switches, this paper proposes a seven-switch 5L-ANPC (7S-5L-ANPC) topology, which employs only seven active switches and two discrete diodes. The analysis has shown a lower current rating can be selected for the seventh switch under high power factor condition, which is verified by simulation results. The modulation strategy for 7S-5L-ANPC inverter is discussed. A 1 kVA single-phase experimental prototype is built to verify the validity and flexibility of the proposed topology and modulation method. [ABSTRACT FROM AUTHOR]

In this paper, a cascaded H-Bridge (CHB)-multilevel converter (MC)-based photovoltaic (PV) system with no voltage or current sensors at the dc-side is proposed. Eliminating the dc-side sensors simplifies the hardware, leading to lower cost and higher reliability of the PV system. A novel scheme estimating the capacitors’ voltages from the ac output voltage of the inverter is developed. The scheme allows replacing all dc-side voltage sensors by a single-voltage sensor at the ac-side of the converter. Furthermore, the dc current sensors, conventionally required for the maximum power point tracking (MPPT), are also eliminated. Instead, the outputs from the capacitors’ voltage control systems are utilized for the MPPT. The effectiveness of the proposed dc-side sensorless system is experimentally demonstrated on a 2-kW single-phase seven-level CHB converter-based PV system. [ABSTRACT FROM PUBLISHER]

When the faulty cells of a nonregenerative cascaded H-bridge inverter are bypassed, it is necessary to inject a zero-sequence voltage into the inverter phase voltages so as to achieve the maximum balanced line-to-line voltage. However, the injected zero-sequence voltage may lead to a back flow of real power (BFRP) in at least one phase so that the dc voltage will rise to an intolerable level. To solve the problem, this paper proposes a new method of generating zero-sequence voltages. This method can not only maximize the available output voltage but also suppress the BFRP effectively. The zero-sequence voltage is always limited to an appropriate range to achieve the maximum output voltage through linear modulation. Closed-loop control is used to minimize the fundamental component of the zero-sequence voltage so that the power is less likely to flow back. Compared with the conventional methods, the proposed method allows the inverter to drive a load with a lower power factor not inducing BFRP or degrading the output voltage capability. As a result, the probability of overvoltage on the dc side is reduced. The experimental results show that the proposed method is effective and feasible. [ABSTRACT FROM AUTHOR]

In this paper, a new cascaded multilevel inverter is proposed. For the proposed inverter, two different algorithms to determine the magnitude of the dc voltage sources are proposed. Then, in order to generate maximum numbers of output voltage levels by using a constant number of power switches and/or dc voltage sources, several optimum structures of the proposed inverter are obtained. In comparison with the conventional cascaded multilevel inverters, the proposed inverter is able to generate a high number of output voltage levels by using a lower number of power electronic devices such as power switches, driver circuits, power diodes, and dc voltage sources. In addition, the low amount of blocked voltage by switches is another advantage of the proposed inverter. The accuracy performance of the proposed inverter in generating the positive and negative voltage levels is verified through the experimental results on a 61-level inverter. [ABSTRACT FROM PUBLISHER]

In this paper, a new single-phase cascaded multilevel inverter is proposed. This inverter is comprised of a series connection of the proposed basic unit and is able to only generate positive levels at the output. Therefore, an H-bridge is added to the proposed inverter. This inverter is called the developed cascaded multilevel inverter. In order to generate all voltage levels (even and odd) at the output, four different algorithms are proposed to determine the magnitude of dc voltage sources. Reduction in the number of power switches, driver circuits, and dc voltage sources is the advantage of the developed single-phase cascaded multilevel inverter. As a result, the installation space and cost of the inverter are reduced. These features are obtained by the comparison of the conventional cascaded multilevel inverters with the proposed cascaded topology. The ability of the proposed inverter to generate all voltage levels (even and odd) is reconfirmed by using the experimental results of a 15-level inverter. [ABSTRACT FROM PUBLISHER]

Common-mode voltages (CMVs) can lead to premature failure of the motor insulation system in medium-voltage current-source-fed drives. By analyzing the CMV values at all switching states under different operating conditions of a current-source-inverter (CSI)-based motor drive, this paper first indicates that the CMV peaks are produced by the zero states in most of the cases. The nonzero-state (NZS) modulation techniques employed in voltage-source converters are adapted for use in a space-vector-modulated current-source converter (CSC) to reduce the CMV magnitude. For NZS modulation in CSCs, the nearest three-state (NTS) modulation sequences are designed with good low-order harmonic performances in their linear modulation region of m _a ≥ 0.67 and with no increase in the device switching frequency. A combined active-zero-state (AZS) modulation technique is also proposed as compensation, for a lower modulation index in the range of 0.4–0.67, when a compromise is made between the dc-link current minimization and high input power factor control. The simulation and experimental results are provided to validate the CMV reduction effects and harmonic performances of the NTS and combined AZS modulation methods in CSI-fed drives. [ABSTRACT FROM AUTHOR]

The advancement in power electronics has made the use of any number of phases in ac machines possible since with the inverter, any number of phase voltages can be realized as long as the corresponding inverter exists. To supply multiphase drives requires multiphase voltage source inverters (VSIs) whose output voltages depend very much on the methods of generating the pulses to turn on and turn off the inverter devices appropriately. This paper presents an analytical technique for the determination of the expressions for the modulation signals used in the carrier-based sinusoidal and generalized discontinuous pulse width modulation schemes for two-level, five-phase voltage source converters. These expressions can be used for both balanced and unbalanced phase voltages generated by any two-level multiphase inverter, in generating the required reference signals appropriately. An example of a five-phase VSI is presented to illustrate the strategy. Simulation and experimental results are presented in which a close examination shows that both results are similar for the balanced and unbalanced load voltage cases. [ABSTRACT FROM AUTHOR]

This paper proposes an energy regeneration circuit for three-phase voltage-fed inverters using a modified Undeland snubber. The proposed system uses a quasi-square-wave zero voltage switching dc–dc auxiliary converter to regenerate the energy from snubber capacitor to the dc bus. The regenerative circuit uses a single active switch, and it operates independently of the three-phase inverter. Operation stages, theoretical waveforms, and a design methodology are presented. Experimental results based on a 4.5-kVA three-phase inverter prototype are included to validate the proposed topology. [ABSTRACT FROM PUBLISHER]

This paper proposes a new high step-up dc–dc converter designed especially for regulating the dc interface between various microsources and a dc–ac inverter to electricity grid. The figuration of the proposed converter is a quadratic boost converter with the coupled inductor in the second boost converter. The converter achieves high step-up voltage gain with appropriate duty ratio and low voltage stress on the power switch. Additionally, the energy stored in the leakage inductor of the coupled inductor can be recycled to the output capacitor. The operating principles and steady-state analyses of continuous-conduction mode and boundary-conduction mode are discussed in detail. To verify the performance of the proposed converter, a 280-W prototype sample is implemented with an input voltage range of 20–40 V and an output voltage of up to 400 V. The upmost efficiency of 93.3% is reached with high-line input; on the other hand, the full-load efficiency remains at 89.3% during low-line input. [ABSTRACT FROM AUTHOR]

A multilevel multiphase space vector pulsewidth modulation (SVPWM) algorithm has been introduced recently, in which the reference is separated into an integer part and a fractional part. The fractional part is, in essence, a two-level multiphase space vector algorithm. This paper shows that, with appropriate adaptations, the fractional part of the general space vector multilevel multiphase PWM can be applied as a stand-alone PWM method in conjunction with two-level voltage-source converters with any number of phases. Simulation results of the five- and six-phase cases are shown, and the new algorithm is compared with another recent multifrequency SVPWM algorithm, which follows the standard approach of selecting the switching vectors and calculating their application times using dq planes. The experimental verification is provided using a five-phase two-motor series-connected induction motor drive, supplied from a custom-designed five-phase voltage-source inverter. [ABSTRACT FROM AUTHOR]

A novel H-bridge multilevel pulsewidth modulation converter topology based on a series connection of a high-voltage diode-clamped inverter and a low-voltage conventional inverter is proposed in this paper. A dc link voltage arrangement for the new hybrid and asymmetric solution is presented to have a maximum number of output voltage levels by preserving the adjacent switching vectors between voltage levels. Hence, a 15-level hybrid converter can be attained with a minimum number of power components. A comparative study has been carried out to present high performance of the proposed configuration to approach a very low total harmonic distortion of voltage and current, which leads to the possible elimination of the output filter. Regarding the proposed configuration, a new cascade inverter is verified by cascading an asymmetrical diode-clamped inverter, in which 19 levels can be synthesized in output voltage with the same number of components. To balance the dc link capacitor voltages for the maximum output voltage resolution as well as synthesize asymmetrical dc link combination, a new multi-output boost converter is utilized at the dc link voltage of a seven-level H-bridge diode-clamped inverter. Simulation and hardware results based on different modulations are presented to confirm the validity of the proposed approach to achieve a high-quality output voltage. [ABSTRACT FROM PUBLISHER]

The output voltage quality of some of the single-phase multilevel inverters can be improved when their dc-link voltages are regulated asymmetrically. Symmetrical and asymmetrical multilevel diode-clamped inverters have the problem of dc-link capacitor voltage balancing, especially when power factor of the load is close to unity. In this paper, a new single-inductor multi-output dc/dc converter is proposed that can control the dc-link voltages of a single-phase diode-clamped inverter asymmetrically to achieve voltage quality enhancement. The circuit of the presented converter is explained and the main equations are developed. A control strategy is proposed and explained in details. To validate the versatility of the proposed combination of the suggested dc–dc converter and the asymmetrical four-level diode-clamped inverter (ADCI), simulations and experiments have been directed. It is concluded that the proposed combination of introduced multioutput dc–dc converter and single-phase ADCI is a good candidate for power conversion in residential photovoltaic (PV) utilization. [ABSTRACT FROM PUBLISHER]