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Dynamic voltage restorer (DVR) technology has become a mature power quality product. In high-power applications, DVR using a multilevel converter is commonly used. However, DVR using a multilevel direct pulse width modulation (PWM) ac–ac converter has not been well studied. This paper presents a new DVR topology using a cascaded multilevel direct PWM ac–ac converter. In the proposed scheme, the unit cell of the multilevel converter consists of a single-phase PWM ac-ac converter using switching cell structure with coupled inductors. Therefore, the multilevel converter can be short- and open-circuited without damaging the switching devices. Neither lossy RC snubber nor a dedicated soft commutation strategy is required in the proposed DVR. This improves the reliability of the DVR system. The output voltage levels of the multilevel converter increase with the number of cascaded unit cells, and a high ac output voltage is obtained by using low-voltage-rating switching devices. Furthermore, a phase-shifted PWM technique is applied to significantly reduce the size of the output filter inductor. A 1-kW prototype of single-phase DVR is developed, and its performance is experimentally verified. Finally, the simulation results are shown for a three-phase DVR system. [ABSTRACT FROM AUTHOR]

The five-level active neutral-point-clamped (5L-ANPC) converter has been widely studied for its excellent performance in high-power medium-voltage applications. This paper analyzes the space vector pulse width modulation (SVPWM) strategy of the 5L-ANPC converter in the virtual coordinate, and presents an optimized control strategy which can balance the neutral point (NP) voltage and avoid the dead-time effects for the first time. In this strategy, on one hand, the 125 space vectors are combined by 96 triangles in the seven-segment vector synthesis method, then the triangles are divided into seven categories which have different characteristics of balancing the NP voltage, and every category has its own principles to choose the vector sequence and compute the vector durations. On the other hand, the dead-time effects of the 5L-ANPC converter are studied in detail and the transitions between different switching states are constrained in the optimized control strategy to avoid the dead-time effects that cannot be compensated by traditional pulse-based dead-time compensation methods. Finally, the optimized SVPWM strategy is experimentally verified in this paper. [ABSTRACT FROM AUTHOR]

This paper presents a buck-boost dc-dc converter for LED drivers capable of delivering an output current ranging from 0.1 to 2 A and a variable output voltage ranging between 2 and 5 V, starting from an input voltage spanning from 2.7 to 5.5 V. The dc-dc converter, realized in a 0.18-μm CMOS technology with 5-V option, occupies an area of 4 mm2 including pads. The circuit features automatic mode switching and dynamic sizing of the power transistors to achieve a peak efficiency of 91%. With a switching frequency of 2.5 MHz, the achieved line regulation is lower than 0.1% V-1 and the output voltage ripple is less than 10 mV. The obtained turn-on and load transient settling time are lower than 40 μs, thus allowing pulsed operation of the LEDs, as well as switching among LEDs of different colors. [ABSTRACT FROM AUTHOR]

In this paper, a predictive direct power control (DPC) method without sector information and voltage vector selection is proposed for three-phase grid-connected converters. Different from conventional predictive direct power controllers, the proposed strategy always adopts fixed voltage vectors, instead of selecting voltage vectors according to the angular information of the grid-voltage vector or the virtual-flux vector. The converter switching time is obtained by minimizing the squared errors of the instantaneous active and reactive power. Switch duty cycles are then calculated and equivalently reconstructed. The proposed strategy not only presents rapid dynamic response due to the use of the predictive controller, but also possesses excellent steady-state performance as a result of duty cycle reconstruction. The main advantage of the proposed control scheme, compared with the classical DPC strategies, is that it is unnecessary to use sector information of the grid-voltage vector, and selection of active voltage vectors is also not required here. Therefore, incorrect selection of voltage vectors and the resulting performance deterioration are surely avoided, without the need of any additional compensation measures. An in-depth comparison and experimental assessment are given to validate the effectiveness of the proposed strategy. [ABSTRACT FROM AUTHOR]

One of the major drawbacks of high-ratio step-up transformers is the high value of their secondary-side capacitor. This value is reflected at the primary side, giving rise to a nondesirable one. There are some converters which include this capacitor in the topology and can cope with it, and even more, they need it. In particular, in high-voltage applications, we will find transformers with a large capacitance value since they use high-ratio step-up transformers. In this kind of applications, it is always interesting not to have inductors at the output filter, with single-capacitor filters being preferred instead. Thus, one of the simplest topologies is the parallel resonant converter (PRC) with a single-capacitor output filter. It can be controlled by the switching frequency and/or duty cycle, which makes zero voltage switching feasible in the power switches. In this paper, the PRC modeling and design and the experimental results are shown in a prototype delivering 3.5 kV and 260 W. [ABSTRACT FROM AUTHOR]