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A multilevel H-bridge StatCom inherently contains redundancy in the available switching states. This paper develops a variation on the typical model predictive control scheme which is able to exploit this redundancy to simultaneously balance the H-bridge capacitor voltages, provide excellent current reference tracking, and minimize converter switching losses. The scheme consists of a dead-beat current controller that has been integrated with heuristic models of the voltage balancing and switching loss characteristics. The integration of a pulsewidth modulation scheme is also described. Simulation and experimental results are presented that confirm the correct operation of the control and modulation strategies. Comparison with traditional control and modulation schemes is provided in terms of the key performance indicators associated with multilevel H-bridge StatComs. [ABSTRACT FROM AUTHOR]

This paper extends the Z-source concept to matrix converters and explores a family of Z-source matrix converters. Their principles and characteristics are analyzed, and a simplified voltage-fed Z-source matrix converter is used as an example to demonstrate its operation, voltage gain versus modulation index, PWM method, boost control, and implementation of the control. Both simulation and experimental results verify operation of the proposed Z-source matrix converter, analytical results, and control method. The Z-source converters can achieve buck and boost operation with reduced number of switches needed, therefore achieving low cost, high efficiency, and reliability, compared to the traditional matrix converters. [ABSTRACT FROM AUTHOR]

Common-mode voltage (CMV) is responsible for overvoltage stress to the winding insulation and bearing damage of an ac motor. High dv/dt of CMV raises leakage currents, which can cause serious problems such as motor damage and electromagnetic noise to the equipment installed near the converter. This paper proposes two modulation strategies for indirect matrix converters that substantially eliminate CMV. The first method is developed by using the suitable couple of nonzero space vectors instead of zero space vectors in the inverter stage. The maximum voltage transfer ratio of this method is unaffected and remains 0.866. The second one, which is useful for low-voltage operation, is approached by choosing the medium and the lowest positive line-to-line input voltages in the rectifier stage to generate the dc-link voltage and by placing suitable zero space vectors in the inverter stage. In the second method, the maximum voltage transfer ratio is 0.5. Both methods can mitigate the peak value to 42%. In addition, while the first method provides the same performance to the conventional method, the second method can reduce significantly the harmonic components of line-to-line output voltage. Simulation and experimental results are shown to verify the effectiveness of the proposed methods. [ABSTRACT FROM AUTHOR]

This paper proposes a real-time DSP- and FPGA-based implementation method of a space vector modulation (SVM) algorithm for an indirect matrix converter (IMC). Therefore, low-cost and compact control platform is built using a 32-bit fixed-point DSP (TMS320F2812) operating at 150 MHz and a SPARTAN 3E FPGA operating at 50 MHz. The method consists in using the event-manager modules of the DSP to build specified pulses at its PWM output peripherals, which are fed to the digital input ports of a FPGA. Moreover, a simple logical processing and delay times are thereafter implemented in the FPGA so as to synthesize the suitable gate pulse patterns for the semiconductor-controlled devices. It is shown that the proposed implementation method enables high switching frequency operation with high pulse resolution as well as a negligible propagation time for the generation of the gating pulses. Experimental results from an IMC prototype confirm the practical feasibility of the proposed technique. [ABSTRACT FROM PUBLISHER]

This paper presents first an overview of the well-known voltage and current dc-link converter topologies used to implement a three-phase PWM ac–ac converter system. Starting from the voltage source inverter and the current source rectifier, the basics of space vector modulation are summarized. Based on that, the topology of the indirect matrix converter (IMC) and its modulation are gradually developed from a voltage dc-link back-to-back converter by omitting the dc-link capacitor. In the next step, the topology of the conventional (direct) matrix converter (CMC) is introduced, and the relationship between the IMC and the CMCs is discussed in a figurative manner by investigating the switching states. Subsequently, three-phase ac–ac buck-type chopper circuits are considered as a special case of matrix converters (MCs), and a summary of extended MC topologies is provided, including three-level and hybrid MCs. Therewith, a common knowledge basis of the individual converter topologies is established. [ABSTRACT FROM PUBLISHER]

This paper presents a flyback switch-mode rectifier (SMR) with spread harmonic spectrum. The SMR switching control is conducted by a charge-regulated pulsewidth modulation (PWM) scheme with constant turn-on period. The inherently stable discontinuous conduction mode operation is preserved to yield good line drawn power quality. In voltage loop, a quantitatively designed PI feedback controller is augmented with a robust error cancellation control scheme. Further improved dc output voltage regulation and input power quality performances are achieved under varied operating conditions. In spread harmonic spectrum control, the harmonic spectral properties of the developed flyback SMR are first analyzed. Then, the dedicated random switching scheme is developed to let its switch current harmonic spectrum be dispersedly distributed. In the proposed random switching scheme, the PWM turn-off period is modulated using 1-b binary sequence, pseudo random binary sequence, and 4-b binary sequences. Under randomized harmonic spectrum, the SMR control performances are not sacrificed. [ABSTRACT FROM PUBLISHER]

This paper presents a pulsewidth modulation (PWM) algorithm for a three-phase ac–dc rectifier, where the third and fifth harmonics are indicated in the input phase voltages. A mathematical analysis, which includes this voltage harmonic's components, shows that the unity input displacement factor (IDF) can be reached by appropriate evaluation of duty-cycle functions. A PWM algorithm is proposed based on this developed theoretical achievement. This approach enables current sensorless unity IDF rectification. The PWM algorithm is investigated theoretically and verified by simulations and experiment. [ABSTRACT FROM PUBLISHER]

This paper addresses the problem of optimizing space vector PWM (SVM) for interleaved, parallel-connected, three-phase voltage source converters to reduce total harmonic distortion (THD) of the total line current. A systematic approach is presented for designing hybrid SVM schemes involving multiple sequences, including those based on active state division, and different phase shifts to reduce current ripple. First, the effect of different phase shifts on the current ripple is investigated and it is shown that using standard phase shifts yields performance close to optimal. Second, a zone-division plot is generated based on all sequence-phase shift combinations. The plot shows spatial regions within a sector where a certain sequence-phase shift combination results in the lowest rms current ripple in one switching period, and thus represents the optimal hybrid scheme. Lastly, simplified, easy-to-implement quasi-optimal SVM schemes are derived from the zone-division plot based on specific application requirements, and their performances are compared with the optimal scheme. The application of the proposed approach to a two-converter case is discussed in detail. A simple, quasi-optimal SVM scheme is proposed for grid-connected applications with analytical and experimental results confirming significant reduction in current THD. Finally, extension to three- and four-converter cases is discussed. [ABSTRACT FROM AUTHOR]

This paper analyses the natural voltage-balancing characteristic of a three-phase flying capacitor multilevel converter when it is operated under the spectrally optimal Phase Disposition (PD) pulsewidth modulation (PWM) strategy. Using this analysis, it is shown that PD PWM has superior balancing characteristics compared to the phase-shifted carrier PWM strategy, because it places more spectral energy into the differential-mode sideband harmonics that drive the voltage-balancing process. From this understanding, an alternative balance booster filter network connection is proposed that significantly improves the natural balancing response of a flying capacitor converter for either PWM strategy. The analysis is confirmed by extensive simulation and experimental studies. [ABSTRACT FROM AUTHOR]

This paper proposes the concept and the synthesis methodology of simplified zero-voltage-transition (ZVT) circuits applied to bidirectional pulsewidth modulation poles. The main goal of simplified ZVT circuits is to make possible the use of conventional modulation schemes to accomplish better converter performance and to eliminate the synchronous-switching requirements imposed by ZVT integrated multipole topologies. To derive the simplified ZVT circuits, a synthesis methodology is proposed based on the generalization of the ZVT technique, where the restrictions to achieve the zero-voltage switching for the main converter switches are identified. Thereafter, a set of simplified semiconductor switches composed by only one high-frequency switch is defined to be used in the simplified ZVT auxiliary circuits. Thus, using the proposed synthesis methodology, any simplified ZVT topology can be derived, whether or not they have appeared in a previous publication. In order to validate the proposed approach, experimental results for a three-phase ZVT inverter, employing the minimum-loss space vector modulation and operating at 1.5 kW and 20 kHz are presented. The prototype presented an efficiency of 98% at full load representing an improvement of 0.5% when compared to its hard-switched counterpart and 1.8% when compared to an integrated ZVT topology. [ABSTRACT FROM AUTHOR]

This paper presents a complete analysis of studying the impact of interleaving on the ripple current in the dc-side passive components of paralleled three-phase voltage-source converters (VSCs). The analysis considers the effects of different pulsewidth modulation scheme, the modulation index, the interleaving angle, and the power factor or displacement angle. In the analysis, the rms value of the total ripple current in the dc-side is used as figure of merit and calculated in the frequency domain. The results obtained show that all of the factors considered can strongly affect the rms value one way or another. Based on the analysis, the interleaving angle-optimization method is shown to minimize the rms in different cases. The effect of circulating currents on the ripple currents in the dc-side passive components is also taken into consideration to perform a more accurate analysis. All the analysis is based on an example system containing two VSCs, but the proposed analysis method in the frequency domain can be easily expandable for multiple paralleled VSCs. Experimental results are used to verify the analysis conducted. [ABSTRACT FROM AUTHOR]

Multilevel cascaded H-bridge converters have found industrial application in the medium-voltage high-power range. In this paper, a generalized modulation technique for this type of converter based on a multidimensional control region is presented. Using the multidimensional control region, it is shown that all previous modulation techniques are particularized versions of the proposed method. Several possible solutions to develop a specific implementation of the modulation method are addressed in order to show the potential possibilities and the flexibility of the proposed technique. In addition, a feedforward version of this technique is also introduced to determine the switching sequence and the switching times, avoiding low harmonic distortion with unbalanced dc voltages. Experimental results are shown in order to validate the proposed concepts. [ABSTRACT FROM AUTHOR]

This paper presents a neutral point voltage control strategy for the three-level active neutral point clamped (ANPC) converter using selective harmonic elimination pulsewidth modulation (SHE-PWM). The control strategy introduces a small change in the switching angles, which varies the duty cycle of the zero-level switching state, controls the neutral point current and, therefore, the neutral point voltage. The decision to vary a given switching angle takes into account the polarity of the output currents and the voltage across the lower dc-link capacitor. The effectiveness of the proposed strategy is verified through extensive simulation studies and experimentally validated using a low power laboratory prototype. [ABSTRACT FROM AUTHOR]

A novel high power factor converter is presented in this paper. The proposed converter is a high-frequency forward converter controlled by a magnetic amplifier. This converter has no need of special control to correct the power factor. Power factor is corrected by the automatic variation of the saturation time of the magnetic amplifier according to the input voltage variation. The current stress of the transistor switch is low because this converter operates in the continuous conduction mode of the inductor current. The circuit operation is verified experimentally at a frequency of 500 kHz. [ABSTRACT FROM PUBLISHER]