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This paper analyzes three different carrier-based modulation patterns applied to a three-phase high-power-factor-corrected (PFC) five-level buck+boost-type converter acting as an interface between dc distribution systems and an ac grid. The modulation is analyzed employing the space vectors theory so that the achievable performance is demonstrated. The main advantage of the analyzed modulation strategy is its simplicity, which makes it suitable for digital signal controller (DSC) implementations. This seems straightforward for voltage source converters, but is a challenge for current-multilevel converters that typically employ field-programmable gate array devices to achieve better harmonic distortion performance. This is due to modern power electronics DSCs being typically designed for other converter topologies. The power converter is constructed with two phase-shift-modulated six-switch buck-type PFC converters, paralleled by interphase transformers, and an inverting circuit. The system features: bidirectional current carrying capability; relatively low parts count; high utilization of the semiconductors; and low current and voltage ripple at its terminals. The principle of operation, detailed description, analysis of the modulation strategy, and dimensioning equations for three different power circuit realizations are described in this paper assuming the analyzed modulation patterns. The feasibility of the presented converter is demonstrated by means of a constructed hardware prototype. [ABSTRACT FROM AUTHOR]

Magnetically coupled impedance-source (MCIS) networks are recently introduced impedance networks intended for various high-boost applications. It employs coupled magnetic in the circuit to achieve higher voltage gain. Various MCIS networks have been proposed in the literature for myriad applications; however, due to effective role of system modeling in the closed-loop controller design, this paper is allocated to small-signal modeling and analysis of MCIS converters. The modeling is performed by means of the circuit averaging and averaged switch technique. A generalized small-signal derivation is demonstrated for pulse width modulation (PWM) MCIS converters and it is shown that the derived transfer functions can simply be applied to Y-source, Γ-source, and T-source impedance networks. Various transfer functions for capacitor voltage, output voltage, magnetizing current, input and output impedance are derived and have been validated through frequency and dynamic responses of computer simulation results. In addition, a comprehensive analysis has been done for all mentioned PWM MCIS converters regarding their circuit parameters. Furthermore, the effect of considering the equivalent series resistances of capacitor and inductor on the stability margin of MCIS converters is revealed in this paper. Finally, in order to validate the derived transfer functions and to consolidate the perfumed analysis, experimental results are presented for all mentioned MCIS converters. [ABSTRACT FROM PUBLISHER]

Two parallel interleaved two-level (2L) three-phase voltage source inverters (VSIs) can be analyzed as a single three-level (3L) VSI. A generalized carrier-based method is proposed in this paper for implementing different 3L pulsewidth modulation (PWM) techniques using two parallel interleaved 2L VSIs. The proposed method modifies the given three-phase reference signals of 3L VSI for implementation of the PWM technique using two parallel interleaved 2L VSIs. The influence of nonidealities on the equivalent 3L PWM switching sequences is also discussed. To overcome the effect of nonidealities, a new modified discontinuous PWM technique (MDPWM1) is proposed. The analysis of different performance indices is carried out for different 3L PWM techniques, and the key advantages of different PWM techniques are identified. Simulation and experimental results are also presented. [ABSTRACT FROM AUTHOR]

This paper presents a simple, novel interfacing scheme for linear variable differential transformer (LVDT) that does not require a precise sine wave oscillator (with stable amplitude and frequency) for excitation or any phase matching circuit like traditional methods. The primary and the secondary coils of the LVDT are integral parts of a relaxation oscillator (RO). The RO injects a current waveform with a triangular shape through the primary coil which in turn induces a square-shaped voltage waveform in the secondary coils. The RO utilizes the amplitudes of those waveforms and generates a pulsewidth modulation (PWM) output signal whose duty cycle ratio is proportional to the measurand, core position. This quasi-digital PWM signal is passed through a low-pass filter to obtain an analog output. PWM time period measurement using a counter yields a digital output. This method guarantees good stability since the output is dependent only on a pair of dc reference voltages apart from the transformation constant of the sensor. A detailed analysis of the sources of error, their effect on the performance of the scheme and appropriate design choices for error mitigation are also presented. A prototype of the proposed circuit was built and tested in the laboratory. The nonlinearity error noted from the tests conducted was less than 0.16% for the analog output and 0.18% for the digital output. A resolution of up to 11 bits was achieved for the digital output. [ABSTRACT FROM AUTHOR]

This paper has focused on the novel space vector pulse-width modulation (SVPWM) strategy for the two-level three-phase inverter, which could eliminate the harmonics nearby pulse width modulation (PWM) frequency. Ear-piercing high-frequency electromagnetic noise from motor is common due to PWM technique. The proposed SVPWM is able to remove the high-frequency harmonics located nearby the PWM frequency and other odd multiples by changing the original switching states. The unpleasant acoustic noise could be removed with the novel strategy whose PWM frequency is selected near 10 kHz. By comparison, it is near 20 kHz for conventional SVPWM to achieve the similar performance. Therefore, the switching losses are significantly reduced using the novel method. Furthermore, the proposed technique neither changes the characteristics of the fundamental wave nor employs the additional circuits in the drive. At last, the effectiveness of proposed strategy is verified by simulation and experiment. [ABSTRACT FROM AUTHOR]

Multilevel inverters with dodecagonal (12-sided polygon) voltage space vector structure have advantages, such as complete elimination of fifth and seventh harmonics, reduction in electromagnetic interference, reduction in device voltage ratings, reduction of switching frequency, extension of linear modulation range, etc., making it a viable option for high-power medium-voltage drives. This paper proposes two power circuit topologies capable of generating multilevel dodecagonal voltage space vector structure with symmetric triangles (for the first time) with minimum number of dc-link power supplies and floating capacitor H-bridges. The first power topology is composed of two hybrid cascaded five-level inverters connected to either side of an open-end winding induction machine. Each inverter consists of a three-level neutral-point-clamped inverter, which is cascaded with an isolated H-bridge making it a five-level inverter. The second topology is for a normal induction motor. Both of these circuit topologies have inherent capacitor balancing for floating H-bridges for all modulation indexes, including transient operations. The proposed topologies do not require any precharging circuitry for startup. A simple pulsewidth modulation timing calculation method for space vector modulation is also presented in this paper. Due to the symmetric arrangement of congruent triangles within the voltage space vector structure, the timing computation requires only the sampled reference values and does not require any offline computation, lookup tables, or angle computation. Experimental results for steady-state operation and transient operation are also presented to validate the proposed concept. [ABSTRACT FROM PUBLISHER]

Switch fault diagnosis is an important design aspect for pulse width modulation (PWM) dc-dc power converters. It can prevent power converters from further damage, and also make preparations for remedial actions. In this paper, a fast switch fault diagnostic method is proposed for PWM dc-dc converters operating in continuous conduction mode. The proposed method utilizes the magnetic component (inductor or transformer) voltage for fault diagnosis. Based on the real-time voltage measurement and switch gate-driver signals, characteristics of switch open-circuit faults and short-circuit faults are rapidly extracted, and thus, switch faults can be quickly detected. The magnetic component voltage can be measured by an auxiliary winding in the magnetic core, and gate-driver signals can be easily got from the control circuit. Moreover, the fault detection can be implemented by a low-cost logical hardware circuit, and this circuit can be integrated into the control circuit. The fault diagnosis principle, design considerations, and implementation are discussed in this paper. Experiments are conducted to verify the theoretical analysis. [ABSTRACT FROM AUTHOR]

This paper presents a comparison of two modulation methods for the seven-level switched-capacitor (SC) inverter using series/parallel conversion (SCISPC). The SCISPC is a multilevel inverter which has the less number of switching devices than the conventional multilevel inverters. The level-shifted pulsewidth modulation (PWM) (LS-PWM) was applied to the seven-level SCISPC in the previous research. In this paper, the level- and phase-shifted PWM (LPS-PWM) and the LS-PWM are applied to the seven-level SCISPC, and LPS-PWM is compared with LS-PWM for the seven-level SCISPC. The LPS-PWM has both the characteristics of the phase-shifted PWM (PS-PWM) and the LS-PWM. The voltage reduction during the discharging term of the SCs is reduced by means of the shorter discharging period compared to LS-PWM. The voltage ripple of the capacitors is also reduced, which leads to higher power conversion efficiency. The difference of the two modulation methods is confirmed by the theoretical approach, simulation with PSIM, and circuit experiment. [ABSTRACT FROM PUBLISHER]

This paper presents a general space vector modulation (SVM) method for the modular multilevel converter (MMC). Compared with earlier modulation methods, the proposed SVM method not only utilizes the maximum level number (i.e., $2n+ 1$, where $n$ is the number of submodules in the upper or lower arm of each phase) of output phase voltages, but also leads to an optimized control performance in terms of capacitor voltage balancing, circulating current suppression, and common-mode voltage reduction. The maximum level number is achieved by introducing a new equivalent circuit of the MMC, and the optimized control is obtained by selecting the optimal redundant switching states. Since the computational burden of the SVM scheme is independent of the voltage level number, the proposed method is well suited to the MMC with any number of submodules. Simulation and experimental results are presented to validate the proposed method. [ABSTRACT FROM PUBLISHER]

Compared with multilevel space vector modulation, level-shifted multicarrier sinusoidal pulsewidth modulation (SPWM) for nested neutral point-clamped (NNPC) inverters requires much less calculations and implementation efforts, but the existing conventional SPWM cannot suppress the severe flying-capacitor (FC) voltage ripples under low output-frequency conditions. In order to solve this problem, a multicarrier-based PWM strategy with complete voltage balance control (VBC) capacity is proposed in this paper. For NNPC inverters operating under low output-frequency conditions, two preprocessing steps, the zero-sequence injection and the modulation-signal rearrangement, are proposed before the comparisons between level-shifted carriers and modulating signals. These preprocessing steps make the average currents flowing through FCs zero, which is beneficial to greatly reduce the FC voltage ripples under low output-frequency conditions. Together with additional VBC, the proposed modulation can assure the FC voltages balanced under the entire output-frequency conditions. Principles and implementation processes of proposed modulation techniques and VBC methodsare elaborated in detail and compared with conventional modulation methods. Both simulation results from a 5-MVA system and experimental results based on a 5-kVA platform are presented to verify the effectiveness. [ABSTRACT FROM AUTHOR]

This paper proposes a single-phase, single-stage buck–boost inverter for photovoltaic (PV) systems. The presented topology has one common terminal in input and output ports which eliminates common mode leakage current problem in the grid-connected PV applications. Although it uses four switches, its operation is bimodal and only two switches receive high-frequency pulse width modulation signals in each mode. Its principle of operation is described in detail with the help of equivalent circuits. Its dynamic model is presented, based on which a bimodal controller is designed. Experimental results, in stand-alone and grid-connected mode, obtained with a 300-W laboratory prototype are presented to validate its performance. [ABSTRACT FROM AUTHOR]

Primary-side controlled universal-line flyback converters have been widely used in low-power applications due to their simplicity, low standby power, and low cost. However, conventional OCP schemes normally cause too large a variation in output current when the input voltage varies. This paper proposes a self-compensating OCP circuit to achieve a high-precision constant current at different input voltages which can be used in flyback converters working in discontinues conduction mode. It consists of a CS S/H circuit and a dynamic OCP voltage reference circuit. Compared with conventional OCP circuits, it does not need an extra compensation circuit. To verify the feasibility and performance of the proposed circuit, an IC controller that uses the proposed OCP circuit has been designed and fabricated in 0.35 μm 5-V/40-V high-voltage CMOS technology. Experimental results show that the constant output current precision of the prototype is within ±1% when the input line voltage changes from 85 to 265 Vac. In the common line voltage range (\rm110-220\ Vac ), the output current regulation accuracy can reach a level as high as ± 0.3%. [ABSTRACT FROM AUTHOR]

This paper presents the design, modeling, and control of an isolated dc-dc three-port converter (TPC) based on an interleaved-boost full-bridge converter with pulsewidth modulation (PWM) and phase-shift control for hybrid renewable energy systems. In the proposed topology, the switches are driven by phase-shifted PWM signals, where both phase angle and duty cycle are the controlled variables. The power flow between the two inputs is controlled through the duty cycle, whereas the output voltage can be regulated effectively through the phase shift. The primary-side MOSFETs can achieve zero-voltage-switching (ZVS) operation without additional circuitry. Additionally, due to the ac output inductor, the secondary-side diodes can operate under zero-current-switching (ZCS) conditions. In this study, the operation principles of the converter are analyzed and the critical design considerations are discussed. The dynamic behavior of the proposed ac-inductor-based TPC is investigated by performing state-space modeling. Moreover, the derived mathematical models are validated by simulation and measurements. In order to verify the validity of the theoretical analysis, design, and power decoupling control scheme, a prototype is constructed and tested under the various modes, depending on the availability of the renewable energy source and the load consumption. The experimental results show that the two decoupled control variables achieve effective regulation of the power flow among the three ports. [ABSTRACT FROM PUBLISHER]

Semiactive quadrupler rectifiers (SAQRs) are proposed in this paper to serve as the secondary rectification circuits, which make the secondary-side voltages to be controllable and help reduce current stress and conduction losses. An interleaved isolated boost converter is developed based on the proposed SAQRs. By utilizing the pulse-width modulation (PWM) plus phase-shift (PPS) control strategy, the primary- and secondary-side voltages are well matched to reduce the current values and circulating conduction losses. With the proposed SAQRs, the voltage gain is extended and the voltage stresses on power devices and passive components used in rectification circuits are reduced to the half of the high output voltage. Hence, the efficiency is improved by using a transformer with a smaller turns ratio and reduced parasitic parameters, and by employing low-voltage rating devices with better switching and conduction performance. With optimal design, lower voltage, and current stresses on the primary-side switches, minimized input current ripple can be realized. Moreover, the zero-voltage turn on switching of the active switches and the zero-current turn off switching of the diodes can be achieved over a wide load and voltage range by the proposed SAQR-based converter and the control strategy. Meanwhile, the higher voltage gain, the lower voltage, and the current stresses on power devices can be obtained with the proposed SAQR-based converter compared with passive quadrupler rectifier-based converter. The feasibility and effectiveness of the proposed SAQRs and the derived converter are verified by a 380-V output prototype. [ABSTRACT FROM PUBLISHER]

A four-level open-end winding induction motor (OEWIM) drive is known to suffer from two perennial problems. One is the problem of zero-sequence currentin the motor phases, which is caused by the existence of zero-sequence voltage in them. The other is the overcharging of the dc-link capacitor of theinverter operated with lower dc-link voltage by its counterpart operated with a higher dc-link voltage. This paper investigates the applicability of aspecial variant of space vector pulse width modulation (SVPWM) scheme for a recently proposed power circuit configuration, in which arectifier–inverter combination is nested within the conventional two-level inverter configuration to achieve four-level inversion. This PWM schemeis named as the sample-averaged zero-sequence elimination (SAZE) SVPWM scheme, wherein the zero sequence voltage is suppressed in each sampling timeperiod in the average sense. Both of the aforementioned problems encountered in this drive are successfully overcome for this power circuit configurationby resorting to the proposed SVPWM strategy. [ABSTRACT FROM PUBLISHER]

This paper provides a theoretical and experimental discussion about the performance, availability, and flexibility of a battery energy storage system (BESS) using a modular multilevel cascaded converter based on single-star bridge cells (MMCC-SSBC). The SSBC-based BESS produces three-phase multilevel voltage waveforms, and eliminates both harmonic filters and a complicated zig-zag transformer from the ac side. The circuit modularity of the SSBC enables the usage of multiple individual low-voltage battery modules. Along with control strategy based on zero-sequence-voltage injection, this modularity enhances the availability and flexibility of the BESS. A three-phase laboratory downscaled system rated at 140 V, 10 kW, and 21 kW·h is designed, constructed, and tested to verify the operating principles and performance. The tested BESS produces a current total harmonic distortion (THD) of 3.0% even when it operates with different active-power commands for individual bridge cells. In addition, zero-voltage ride-through capability is verified for the severest single-phase, two-phase, and three-phase voltage sags. Mathematical analysis and experimental verification validate the downscaled system and performance, making the BESS prospective. [ABSTRACT FROM PUBLISHER]

As electrolytic capacitor is apt to fail in power circuits, it is very important to identify its electrical parameters, mainly the equivalent series resistance (ESR) and capacitance (C). A noninvasive online identification method of capacitor's ESR and C for continuous-conduction-mode (CCM) buck converter is proposed in this paper. Based on the ac component of capacitor voltage, the calculation model is founded. By sampling the pulse width modulation signal and output voltage, the method needs no current sensor and is effective for the CCM buck converter operating at different conditions. Implementation of the identification system is presented. The tests are carried out for different aged capacitors and ambient temperatures. The experimental results validate the effectiveness of the method. [ABSTRACT FROM AUTHOR]

Audio Class D amplifiers (CDAs) based on bang-bang architecture are arguably the most power efficient architecture of all CDAs reported to-date due to their sheer hardware simplicity. At this juncture, the intermodulation distortion (IMD), an imperative measure that defines fidelity, remains unreported for bang-bang CDAs. In this paper, we investigate the mechanisms of and circuit parameters affecting the IMD of bang-bang CDAs. An interesting phenomenon is that the even-order IMD which is usually negligible/unreported in other CDAs and linear amplifiers may be higher than odd-order IMD therein. We derive analytical expressions for the IMD of the ideal and practical bang-bang CDAs, and the derived expressions are verified against HSPICE simulations and on the basis of measurements on a physical bang-bang CDA. These derived analytical expressions are useful as they provide valuable insights to the design of bang-bang CDAs and how parameters can be tradedoff to improve the IMD. [ABSTRACT FROM AUTHOR]

Alternating current (ac) active electronic loads (AELs) based on pulsewidth modulation (PWM) converters, capable of emulating nonlinear loads, require effective current control techniques and power stages. These two aspects of an AEL are interdependent mainly due to the presence of electromagnetic compatibility filters to reduce electromagnetic emissions. However, the filter components affect the dynamics of the system. In this context, this paper proposes a digitally implemented control strategy comprising the state feedback, robust observer, phase-locked loop, and linear current controller to cope with ac AEL applications. The control-oriented modeling and the control system design are presented. Experimental results obtained from a 10-kW three-phase three-level PWM converter prototype illustrate and demonstrate the feasibility of the proposed AEL control strategy. [ABSTRACT FROM PUBLISHER]

This paper presents a zero-voltage-switching (ZVS) full-bridge dc–dc converter combing resonant and pulse-width-modulation (PWM) power conversions for electric vehicle battery chargers. In the proposed converter, a half-bridge LLC resonant circuit shares the lagging leg with a phase-shift full-bridge (PSFB) dc–dc circuit to guarantee ZVS of the lagging-leg switches from zero to full load. A secondary-side hybrid-switching circuit, which is formed by the leakage inductance, output inductor of the PSFB dc–dc circuit, a small additional resonant capacitor, and two additional diodes, is integrated at the secondary side of the PSFB dc–dc circuit. With the clamp path of a hybrid-switching circuit, the voltage overshoots that arise during the turn off of the rectifier diodes are eliminated and the voltage of bridge rectifier is clamped to the minimal achievable value, which is equal to secondary-reflected input voltage of the transformer. The sum of the output voltage of LLC resonant circuit and the resonant capacitor voltage of the hybrid-switching circuit is applied between the bridge rectifier and the output inductor of the PSFB dc–dc circuit during the freewheeling phases. As a result, the primary-side circulating current of the PSFB dc–dc circuit is instantly reset to zero, achieving minimized circulating losses. The effectiveness of the proposed converter was experimentally verified using a 4-kW prototype circuit. The experimental results show 98.6% peak efficiency and high efficiency over wide load and output voltage ranges. [ABSTRACT FROM AUTHOR]

This paper proposes a new zero-voltage switching (ZVS) pulse width modulation (PWM) three-level (TL) full-bridge (FB) dc–dc converter, which is composed of a TL FB converter and a TL half-bridge (HB) converter. It is well suited for high input voltage and high-power applications. The proposed topology has the following attractive features: off-state voltage on all switches in the circuit is only half of the input voltage; full input voltage is utilized on the load for the whole operating range; TL output waveform is achieved, which significantly reduces the requirements for the input and output filters; simple switching scheme can be used to control the output voltage in wide range. The converter can achieve ZVS for all power switches in wide load range and even at light load condition; furthermore, less conduction loss is added to achieve soft switching. The operation and important analysis of the proposed converter are given. Experiments are carried out to validate the proposed converter, and efficiency curves are tested and given. [ABSTRACT FROM AUTHOR]

This paper presents a new soft-switching dc/dc converter for high-input-voltage applications. Two half-bridge converters connected in series with interleaved asymmetric pulsewidth modulation (PWM) are adopted to limit the voltage stress of each power switch at one-half of the input dc bus voltage. In each half-bridge converter, two asymmetrical dc/dc circuits with the same active switches are connected in parallel at the output side to share the load current and reduce the current stresses of the secondary windings and rectifier diodes. Since two half-bridge converters are operated with interleaved PWM, the output ripple currents partially cancel each other so that the resultant ripple current at the output side is reduced. Active switches in the proposed circuit can be turned on at zero-voltage switching during the transition interval due to the resonant behavior by the output capacitance of MOSFETs and the leakage inductance of transformers. Experiments based on a laboratory prototype with 960-W rated power are provided to demonstrate the performance of the proposed converter. [ABSTRACT FROM PUBLISHER]

A neutral-point-clamped three-level inverter with small dc-link capacitors is presented in this paper. The inverter requires zero average neutral-point current for stable neutral-point voltage. The small dc-link capacitors may not maintain capacitor voltage balance, even with zero neutral-point current. This may happen due to nonlinearities present in the circuit. This requires a fast control of the neutral-point voltage. A simple carrier-based modulation strategy which allows modeling of the neutral-point voltage dynamics as a continuous function of power drawn from the inverter is proposed. This continuous model shows that the neutral-point current is proportional to the power drawn from the inverter, and it enables the use of a well-established classical control theory for the neutral-point voltage controller design. A simple proportional integral controller is designed for the neutral-point voltage control on the basis of the continuous model. The design method for optimum performance is discussed. The implementation of the proposed modulation strategy and the controller is very simple. The controller is implemented in a 7.5-kW induction machine-based drive with only 14 \mu \F dc-link capacitors. Also, the experimental results show that fast and stable performance of the neutral-point voltage controller are achieved and thus verify the validity of the proposed control approach. [ABSTRACT FROM PUBLISHER]

An auxiliary capacitor-based balancing approach is adopted in this paper to equalize the dc-link capacitor voltages of a diode-clamped multilevel converter (DCMC). Four balancing circuits, including the generalized, one-level-capacitor, one-capacitor, and simplified one-capacitor-based configurations are discussed for a five-level DCMC system. These configurations are different in connection of the auxiliary circuits and numbers of the capacitors and switches, but they work on the same principle called ping-pong operation by utilizing the auxiliary capacitor as an equalizer between the capacitors of different voltages. The unbalance phenomenon, ping-pong principle, circuit configurations, and their switching schemes are analyzed, respectively. The superiorities of the proposed approach include balancing operation regardless of load power factor and modulation index, control simplicity, and independence from main circuits when compared to the traditional approaches. Simulations and experimental results verified the performances using the proposed balancing circuits and control strategies. [ABSTRACT FROM AUTHOR]

A modified single-phase quasi-Z-source ac-ac converter is proposed in this paper. The proposed converter has the main features in that the output voltage can be bucked or boosted and be both in-phase and out-of-phase with the input voltage. The input voltage and output voltage share the same ground, the size of a converter is reduced, and it operates in a continuous current mode. A safe-commutation strategy for the modified single-phase quasi-Z-source ac-ac converter is used instead of a snubber circuit. The operating principles and a steady-state analysis are presented. A laboratory prototype, tested using a resistive load, a passive load, and a nonlinear load, was constructed that used an input voltage of 70 Vrms /60 Hz in order to verify the performance of the modified single-phase quasi-Z-source ac-ac converter. The experimental results verified that the converter has a lower input current total harmonic distortion, a higher input power factor, and a higher efficiency in comparison to a conventional single-phase Z-source ac-ac converter. In addition, the experimental results show that the use of the safe-commutation strategy is a significant improvement, as it makes it possible to avoid voltage spikes on the switches. [ABSTRACT FROM AUTHOR]

In this paper, a novel three-phase soft-switching inverter is presented. The inverter-switch turn on and turn off are performed under zero-voltage switching condition. This inverter has only one auxiliary switch, which is also soft switched. Having one auxiliary switch simplifies the control circuit considerably. The proposed inverter is analyzed, and its operating modes are explained in details. The design considerations of the proposed inverter are presented. The experimental results of the prototype inverter confirm the theoretical analysis. [ABSTRACT FROM AUTHOR]

In this paper, a passive lossless snubber circuit for pulse width modulation (PWM) inverters is proposed to achieve soft-switching purpose without extra switch or additional control circuitry. This passive lossless soft-switching snubber employs an inductor/capacitor snubber structure for each switching device in an inverter to achieve passive zero-current turn ON and zero-voltage turn OFF. Furthermore, inductors coupled closely on a single core are used to losslessly recover snubber energy to the input in the proposed snubber. In addition, freewheeling of output phase current of inverters can be realized via energy storage components of the snubber during the dead time to reduce the effect of dead time. The distortion ratio of the output phase current in low output frequency is also reduced. All components in the snubber circuit are passive, and thus have a better price/performance ratio than their active counterparts. The proposed snubber has been incorporated into a 14-kW PWM inverter. Experimental results are given to demonstrate the validity and features of the snubber. [ABSTRACT FROM PUBLISHER]