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In this paper, the pulsewidth modulation switch method was used to investigate the effect of the transformer leakage inductance on the small-signal model in isolated full-bridge converter. A galvanic isolated hard-switching full-bridge converter that operates in constant-current mode is analyzed, confirming that leakage inductance significantly affects the small-signal model, and the influence of leakage inductance can be equivalent to a resistance in series with the converter's output LC filter just as that in phase-shifted full-bridge converter. However, the same leakage inductance in these both converters will lead to different equivalent resistance due to different operating principles. Results of the modified model, simulations, and the experiments are compared to verify the correctness of the model. Moreover, this paper also shows that the Norton equivalent circuit of the charger operates in constant current mode, which can be used to estimate the dynamic behavior of the system. [ABSTRACT FROM AUTHOR]

Dual-comparison one-cycle control for the bidirectional power flow in single-phase grid-connected converters is proposed in this paper. Advantages of dual-comparison one-cycle control when compared to conventional one-cycle control is that it does not give any steady-state dc offset, no light-load instability, and implements unipolar pulsewidth modulation without having to sense the grid voltage. Addition of a fictitious current term, which is generated from the gating signal of one of the active devices, using a bandpass filter, enables the bidirectional power flow. The quality factor of the bandpass filter is shown to impact the total harmonic distortion in current, fundamental displacement angle, and steady-state dc offset. The optimal value of a quality factor, obtained with aid of simulations, gives a superior performance. The current drawn or injected into the grid is seen to lag the grid voltage. The reason for a nonunity displacement power factor is analyzed and a compensation to achieve a unity displacement power factor is also proposed in this paper. Detailed simulation and experimental studies are carried out to validate the proposed control and the high performance that can be obtained. [ABSTRACT FROM AUTHOR]

Impedance source inverters have experienced a fast evolution since the first release of the Z-source inverter in 2003. This evolution is not limited to improving the structure of the different topologies but also includes their modulation and control schemes in order to reinforce their performance from many perspectives. Accordingly, many modulation schemes have been proposed in different research activities, but the full differences among these modulation schemes, including their effect on the switching losses, are not clear yet to the researchers. Hence, this research activity is aimed at introducing a comprehensive review of these different modulation schemes employed for the three-phase impedance source inverters, which is enhanced with a comparative assessment. In this paper, different modulation schemes are classified and reviewed, introducing an important benchmark in order to identify the basic differences between these modulation schemes. In other words, from this paper, the concept of classifying the different modulation schemes and the mandatory equations to implement each scheme can easily be drawn. Moreover, this review is essential for the next part, i.e., Part II, in which a comparative assessment is introduced. [ABSTRACT FROM PUBLISHER]

Multilevel converters with floating capacitors (FCs) are widely applied in recent years in a wide range of industrial applications from high-voltage direct current systems to high power drives. However, some FC topologies lack complete FC voltage balancing capability due to the inherent topology limitation or the insufficient switching state for capacitor balancing. This will result in large ripples on capacitors at low frequency (such as fundamental frequency), limiting their performance and application, particularly, when the fundamental frequency is very low in low-speed drive operations. Typical examples of those multilevel converters are modular multilevel converters (MMC), nested neutral-point-clamped (NNPC) converter, etc. In order to improve the FC balancing for this kind of multilevel converters, this paper proposes a carrier-based pulse-width modulation (PWM) method, named stair edge PWM method. This method can obtain sufficient redundant switching states for FC voltage balancing by producing multiple levels in one PWM period. The FC voltage balancing is thus achieved at switching frequency, which can greatly reduce the capacitor voltage ripple and therefore enable the use of much smaller FCs. Meanwhile, the voltage stress on each device and low $dv/dt$ feature are still the same as the normal multilevel operation, reserving two of the most salient features of multilevel converters. The proposed method also features much simpler and easier implementation compared with space-vector-based approaches, particularly when high-level converters are considered. An application example using a four-level NNPC converter is provided in this paper. The effectiveness and performance of the proposed method are verified by both simulation and experiment. [ABSTRACT FROM AUTHOR]

The neutral-point voltage-balancing control is a critical issue of a neutral-point-clamped converter. The conventional control strategy is to inject the specific zero-sequence voltage to regulate the redundant vector, but it is unacceptable to the three-phase four-wire system. This paper provides a neutral-point voltage-balancing control by the dipolar modulation, and the control freedom of the zero-sequence voltage is flexible. Therefore, the proposed method is suitable for both three-phase three-wire and three-phase four-wire systems. Besides, the proposed method improves the control dynamic in a reactive power system. The proposed neutral-point voltage-balancing control is verified by the mathematical analysis and experimental results. The control dynamic, power loss estimation, and the output current performance are analyzed in this paper. [ABSTRACT FROM PUBLISHER]

The modular multilevel converter (MMC) with nearest level modulation (NLM) is widely used in the high voltage applications for low switching frequency and easy implementation. Existing literature has not provided a complete submodule (SM) fault ride-through scheme for MMC with NLM. In this paper, a strategy including fault detection, localization, redundancy, and recovery is proposed to ensure continuous operation of MMC under IGBT open-circuit faults conditions. It only requires a few hardware and software resources. The features of MMC and SMs with three types of failures are studied, respectively. Based on these, the fault detection method is proposed by using a simple hardware circuit, thus high computation complexity is avoided. Since current fault localization schemes are limited to MMC with carrier phase shifted pulse width modulation, this paper further proposes a strategy for MMC with NLM to locate the faulty SM and identify the fault type. After this, the fault redundancy and the proposed fault recovery method are applied to eliminate the fault and then exit the failure state. Therefore, the ability of SM fault ride-through can be realized. Analysis of failure characteristics are verified in simulation. Experimental results based on a single-phase MMC prototype with 11 SMs per arm are presented to demonstrate the validity of the proposed fault ride-through strategy. [ABSTRACT FROM AUTHOR]

This paper introduces a novel five-level nested neutral point piloted (NNPP) converter and analyzes the operating principle of five-level NNPP converter. This paper presents a novel space vector pulse width modulation (SVPWM) algorithm based on gh coordinate for five-level NNPP converter. First, the common-mode voltage is reduced by choosing the appropriate redundant switching states. After that, the floating-capacitor voltage balance control strategy is presented. The appropriate switch combinations of each phase are determined by the control requirements of floating-capacitor voltages respectively and the hardware mapping method of the switching states is presented. Furthermore, the neutral-point voltage balance control strategy is presented. In order to balance the dc-link capacitor voltages, the seven-segment switching sequence is selected according to the control requirements of dc-link capacitor voltages and the neutral-point voltage regulatory factor is introduced to regulate the durations of the redundant switching states in a switching cycle. Finally, the validity of the novel SVPWM algorithm with decoupling control strategies of floating-capacitor voltages and dc-link capacitor voltages is verified by the experimental results of five-level NNPP converter under steady-state and dynamic conditions. [ABSTRACT FROM AUTHOR]

This paper analyzes three different carrier-based modulation patterns applied to a three-phase high-power-factor-corrected (PFC) five-level buck+boost-type converter acting as an interface between dc distribution systems and an ac grid. The modulation is analyzed employing the space vectors theory so that the achievable performance is demonstrated. The main advantage of the analyzed modulation strategy is its simplicity, which makes it suitable for digital signal controller (DSC) implementations. This seems straightforward for voltage source converters, but is a challenge for current-multilevel converters that typically employ field-programmable gate array devices to achieve better harmonic distortion performance. This is due to modern power electronics DSCs being typically designed for other converter topologies. The power converter is constructed with two phase-shift-modulated six-switch buck-type PFC converters, paralleled by interphase transformers, and an inverting circuit. The system features: bidirectional current carrying capability; relatively low parts count; high utilization of the semiconductors; and low current and voltage ripple at its terminals. The principle of operation, detailed description, analysis of the modulation strategy, and dimensioning equations for three different power circuit realizations are described in this paper assuming the analyzed modulation patterns. The feasibility of the presented converter is demonstrated by means of a constructed hardware prototype. [ABSTRACT FROM AUTHOR]

In this paper, a highly reliable back-to-back (BTB) power converter is proposed for doubly fed induction generator-based wind turbines (DFIG-WTs). When a power switch open-circuit fault is encountered in either the grid-side converter (GSC) or the rotor-side converter (RSC), a four-switch three-phase (FSTP) topology is formed to avoid using redundant bridge arms, which reduces the power circuit complexity and minimizes the conduction and switching losses. A simplified space vector pulsewidth modulation technique is used to eliminate sector identification and complex trigonometric calculations. In addition, the influence of dc-bus capacitor voltage unbalance on the electromagnetic torque is analyzed in detail. The offset current components are calculated, and they are deducted from the reference values in the modified control strategies to suppress the dc-bus voltage deviation. Moreover, the power loss model of a BTB converter is analyzed in detail, and the efficiency study is performed in various post-fault situations. Simulations in MATLAB/Simulink are carried out to verify the performance of a DFIG-WT based on a FSTP BTB converter. Furthermore, the control hardware-in-the-loop setup with RSC and GSC separately simulated in a digital real-time simulator is applied for experimental verification of the proposed control strategy. [ABSTRACT FROM AUTHOR]

Traditional current control methods for a single-phase rectifier in an electric traction drive system suffer from either long response time or nonzero steady-state error. A novel current vector control strategy in stationary-frame is therefore proposed, in this paper, to improve the control performance of a rectifier. The mathematic model of the single-phase two-level pulse rectifier was first analyzed by complex space vector. Then, the principle of the proposed current control method was described. Based on this, the implementation and parameter tuning method of the current control algorithm based on a space complex vector in a two-phase stationary coordinate system are presented. Moreover, two kinds of general current control algorithms are analyzed and compared with the proposed algorithm to demonstrate the advantages of the proposed algorithm. The proposed control scheme absorbs advantages of the conventional control schemes, including fast response, zero steady-state error, and active and reactive power independent control, but overcomes their shortcomings. Finally, the theoretical analysis is verified by means of simulation as well as a hardware-in-loop experimental test on an experimental laboratory setup and some comparisons with conventional current control algorithms prove the advantages of the utilized method. [ABSTRACT FROM AUTHOR]

Photovoltaic (PV) systems containing a rechargeable battery as an energy buffer require multiple dc–dc converters for PV panel control and battery regulation, and hence, they are prone to be complex and costly. To simplify the system by reducing the number of converters, this paper proposes the nonisolated switched capacitor converter (SCC)-based multiport converter (SC-MPC) for standalone PV systems. The proposed SC-MPC can be derived by integrating a bidirectional pulsewidth modulation (PWM) converter, series-resonant converter (SRC), and an SCC with sharing switches. PWM and pulse frequency modulation (PFM) controls are employed for the PWM converter and SRC, respectively, to regulate either a battery voltage, output voltage, or input power from a PV panel, depending on power balance among the input, battery, and load. The 150-W prototype was built for an experimental verification, and the results demonstrated the output voltage could be regulated independently on the battery voltage or input port of PV panels. [ABSTRACT FROM AUTHOR]

An adaptive control of DPWM implementable in clamped-three-level inverters with two strings of photovoltaic (PV) panels in cascaded connection is proposed in this paper. The proposed modulation is developed based on the so-called circuit-level decoupling concept. It is able to provide balance line voltage even under unbalanced dc links. The unequal dc voltages appeared due to asymmetric maximum point of power trackings (MPPTs) are controlled by proper injection of zero-sequence voltage to the common mode voltage, while the total dc voltage is regulated based on the voltage commands generated by the MPPT of each string. Thus, both PV strings are able to be operated based on their MPPTs while there is almost no low-order harmonic distortion at the inverter output current. Compared with the previous methods, the high capability of the proposed method is evaluated by simulation study and experimental tests. [ABSTRACT FROM AUTHOR]

Single-loop current control is an attractive scheme for the LCL-type grid-connected inverter due to its simplicity and low cost. However, conventional single-loop control schemes, which command either the inverter current or the grid current, are subject to the specific resonance frequency regions. The weighted average current control, which splits the filter capacitor into two parts (in form of an LCCL filter) and commands the current flowing between these two parts, is independent of the resonance frequency, but on the other hand, it is limited by the poor sensitivity to the grid impedance variation and weak stability in the grid current. These limitations are comprehensively explained in this paper and then addressed by identifying that the single-loop weighted average current control is equivalent to the dual-loop grid current control with an inherent capacitor current active damping. By tuning the capacitor split proportion as a second degree of freedom, an optimal damping performance that is robust to the grid impedance variation can be naturally achieved using only the inherent damping. Thus, no extra damping is required, and the single-loop structure with only one current sensing turns to be adequate. Moreover, for convenience of practical implementation, an improved LCCL filter configuration is proposed to allow the use of two equal nominal capacitances for the split capacitors. Finally, experiments are performed to verify the effectiveness of the proposed method. [ABSTRACT FROM AUTHOR]

To damp the LCL-filter resonance in a grid-connected inverter, the feedback of capacitor current is usually adopted, and it can be replaced by the feedback of capacitor voltage as a low-cost solution, if an accurate digital differentiator can be made. The best way for realizing such a differentiator has so far proved to be an indirect nonideal generalized integrator (GI). As a simple alternative, this paper proposes two digital differentiators, which are directly developed in the discrete domain. They are a first-order differentiator based on backward Euler plus digital lead compensator and a second-order differentiator based on Tustin plus digital notch filter. The basic idea of the proposed methods is to correct their frequency responses to match the ideal differentiator with embedded digital filters. It is shown that the proposed differentiators exhibit the same derivative performance as the nonideal-GI differentiator, and they are more attractive for digital implementations due to their direct discrete natures, compact expressions, and easy algebraic manipulations. In particular, the proposed first-order differentiator is most competitive for its general representation and simplest implementation. Finally, a 12-kW prototype is built, and experiments are performed to verify the theoretical analysis. [ABSTRACT FROM AUTHOR]

This paper investigates an ac–dc–ac multilevel power converter. The studied configuration is composed of two single-phase ac–dc–ac three-leg modules and series-connected H-bridges in the shared part of system. Because the proposed converter has shared legs between the input and output, it is employed in applications with same input and output frequency. Uninterrupted power supply and unified power quality conditioner are application examples for this converter. Such multilevel topology has lower dc-link voltage rating, which, consequently, presents low switch blocking voltages when compared to conventional topologies. System model, a space-vector pulsewidth modulation (PWM) strategy to symmetrical and asymmetrical dc-link voltages, and an overall control strategy to adjust the system variables are presented. A power flux analysis shows the operation zone in which the individual dc-link voltage balancing is possible. PWM and control strategies are developed to reduce the semiconductor total losses, harmonic distortion, and switching stress. Two ac–dc–ac multilevel conventional structures are used for comparison. Simulation and experimental results demonstrate the feasibility of the studied converter. [ABSTRACT FROM AUTHOR]

This paper investigates a multilevel inverter composed of series/parallel-connected H-bridges. The presented structure can be used for applications in which the use of semiconductor switches with low-voltage and low-current ratings is intended. A comprehensive system model, an overall control strategy to adjust the output voltage with constant magnitude and frequency, and a level-shifted PWM (LS-PWM) strategy based on a voltage vectors unidimensional analysis and a plane analysis are presented. The LS-PWM is capable of mitigating the low-frequency circulating current, thus generating multilevel voltage signals with low harmonic distortion, maximum number of levels, and low dv/dt. In addition, considering a wide range of values of voltages and currents and various power levels, the total converter losses are reduced compared with the conventional multilevel converters. Two multilevel conventional inverters with the same number of semiconductor switches are used for comparison. Simulation and experimental results demonstrate the feasibility of the studied converter. [ABSTRACT FROM AUTHOR]

An optimal current control strategy for asymmetrical hybrid multilevel inverters (MLIs) is proposed in this paper enabling their use on motor drives, static synchronous compensators, and photovoltaic and wind generators, where a fast and precise current regulation is required. A key feature of these highly efficient converters is that an ac machine (motor or transformer) operates according to an open-end winding configuration, connected on one side to a main MLI and, on the other side, to an auxiliary two-level inverter (TLI). The first efficiently controls the main power stream operating at a low switching frequency, while the TLI acts as an active power filter, exploiting a conventional high-frequency two-level pulsewidth modulation (PWM) technique. The proposed control scheme optimally exploits the key features of the two inverters by suitably sharing the control task. In fact, a predictive current control is assigned to the MLI, which can be accomplished by low switching frequency operations, while the high switching frequency of the PWM-operated TLI is exploited to accomplish a fast and precise closed-loop current control, processing only a part of the power stream flowing through the system, thus producing low power losses. Simulations and experimental results confirm the consistency of the proposed approach. [ABSTRACT FROM AUTHOR]

This paper illustrates the application of a solving method of linear systems to a multilevel inverter. This study applies a generic pulsewidth modulation (PWM) method to a multilevel topology. This method finally highlights some specific modulation schemes. First, the study describes the mathematical model of the inverter leg. The leg is made of three level T-type structure. The model is extended to the three-phase inverter. The generalized inverse is used to generate the solution set of the conduction rates. Among the modulation strategies possible, three specific modulation schemes are proposed. The modulation schemes are applied to simulate a PWM three-phase inverter. Finally, some experimental results complete the analysis. [ABSTRACT FROM AUTHOR]

In order to prevent the power switching devices (e.g., an insulated-gate bipolar transistor, IGBT) from shoot-through in voltage-source converters during a switching period, the dead time is added either in the hardware driver circuits of the IGBTs or implemented in software in pulse width modulation (PWM) schemes. Both solutions will contribute to a degradation of the injected current quality. As a consequence, the harmonics induced by the dead time (referred to as “dead-time harmonics” hereafter) have to be compensated in order to achieve a satisfactory current quality, as required by standards. In this paper, the emission mechanism of dead-time harmonics in single-phase PWM inverters is, thus, presented considering the modulation schemes in detail. More importantly, a repetitive controller has been adopted to eliminate the dead-time effect in single-phase grid-connected PWM converters. The repetitive controller has been plugged into a proportional-resonant-based fundamental-frequency current controller so as to mitigate the dead-time harmonics and also to maintain the control of the fundamental-frequency grid current in terms of dynamics. Simulations and experiments are provided, which confirm that the repetitive controller can effectively compensate the dead-time harmonics and other low-order distortions, and also, it is a simple method without hardware modifications. [ABSTRACT FROM AUTHOR]

This paper proposes a zero-sequence circulating current (ZSCC) control scheme for the multiparalleled three-level T-type inverters (3LT2Is). Based on the analysis with the proposed generalized model of multiparalleled 3LT2Is, it is seen that the ZSCC is influenced by the circuit parameters, duty cycles, and the circulating currents of the l th and first 3LT2I. To mitigate the circulating currents, a deadbeat control strategy for n-paralleled (n≥3) inverters is proposed, which is realized by adjusting the duty cycle of the small vectors in each PWM sampling period. Compared with the conventional PI control method, the ZSCC spike is mitigated with the proposed scheme, thus improving the quality of the output currents. Also, the reliability of the 3LT2Is system is improved because such a scheme only needs the information about the ZSCC and zero-sequence duty ratio in the l th and the first inverter. The proposed method can also be applied to the neutral-point-clamped converters. Simulation and experimental results verify the effectiveness of the theoretical analysis and the proposed method. [ABSTRACT FROM PUBLISHER]

A conventional asymmetrical half-bridge (AHB) converter is widely used for dc–dc stage in low-to-medium power system. However, since the asymmetric operation of AHB converter causes the low efficiency over entire load condition, the conventional AHB converter is not usually considered for the candidate of server power system. In order to overcome the problems of the conventional AHB converter, a wide zero-voltage-switching (ZVS) range AHB converter with a clamp switch and a clamp diode is proposed in this paper. The proposed AHB converter (PAHBC) replaces a low-side clamp diode with a MOSFET switch and adds an auxiliary winding, which changes the transformer turns-ratio. From these modifications and the pulsewidth-modulation (PWM) control of clamp switch, the PAHBC can be designed optimally at nominal input condition and obtains additional dc gain at hold-up time condition. These advantages achieve the high conversion efficiency over the entire load condition. The operational principle and analysis of the PAHBC are presented in this paper and verified by a 340–400 V input and 50 V/500 W output laboratory prototype. [ABSTRACT FROM PUBLISHER]

This paper presents a voltage-source converter (VSC) topology for high-power applications. This topology combines three three-phase converters with isolated dc buses. The proposed topology can be implemented by using two-level or multilevel three-phase converters. In this paper, three three-level neutral-point-clamped (3L-NPC) converters have been combined. Two zero-sequence blocking transformers (ZSBTs) are used to interconnect the three converters. In order to validate the good performance of the proposed VSC topology, two modulation techniques are implemented: phase-shifted carrier pulsewidth modulation (PSCPWM) and selective harmonic elimination (SHE) modulation. The VSC topology has been simulated in the simulation tool Saber, and the results have been validated experimentally in a test bench of 60 kVA. [ABSTRACT FROM PUBLISHER]

Conventional zero-voltage and zero-current-switching (ZVZCS) full-bridge converters are widely used because they can realize zero-voltage switching (ZVS) for the leading leg and zero-current switching (ZCS) for the lagging leg. However, the large turn-off loss of the leading leg is still unacceptable in high-voltage high-power applications where insulated-gate bipolar transistors (IGBTs) with current tailing are employed. Hence, it is preferable to achieve ZCS for all IGBTs of full-bridge converters. This paper analyzes the ZCS conditions for pulsewidth modulated (PWM) full-bridge converters and proposes a general strategy for achieving ZCS for main switches, including the control strategy and design method of the topology. Based on this theory, a novel ZCS PWM full-bridge converter with simple auxiliary circuit is derived and tested. It can achieve ZCS not only for the main switches of full-bridge converter, but for the auxiliary switch as well, and obtain high efficiency. The operation principle of the proposed ZCS PWM full-bridge converter and the design procedure are presented. The experimental results of a 600 V/2.5 kW prototype are also included to verify the theoretical analysis. [ABSTRACT FROM PUBLISHER]

As for ripple-current mode control, it cannot achieve average current tracking, resulting in poor current accuracy and even current waveform distortion. Meanwhile, fast-scale instability may occur in some operating conditions. To solve these problems effectively, a current-ripple compensation (CRC) control technique is proposed in this paper. The error between the average of the controlled current and the reference current is compensated by certain compensation signal, achieving average current tracking while suppressing fast-scale instability. On this basis, the compensator in the outer-voltage loop is further simplified to a proportional part by introducing a rebuilt average reference current. The idea and design procedure of the proposed CRC control technique are discussed in detail. Accordingly, two available implementation schemes for the proposed CRC are presented, including slope compensated and parabolic compensated schemes. Finally, two application cases, respectively, to dc–dc Buck converter and Boost PFC converter, are presented to verify the proposed CRC control technique. [ABSTRACT FROM PUBLISHER]

LCL filter is usually used as an interface between inverters and the grid. However, due to the characteristics of LCL filter and system uncertainties, it is complex to design a controller with proper parameters. In this paper, with LCCL filter, the order of the inverter control system can be reduced from third order to first order, and an uncertainty and disturbance estimator based control strategy for grid-tied inverters with LCCL filter is proposed. Specifically, the proposed control strategy consists of differential feedforward, proportional–integral controller, and grid voltage feedforward. Moreover, with one-sampling computation plus half-sampling pulse width modulation delays considered, a simple and clear tuning algorithm for the proposed control strategy is presented. Finally, the inverter system with the proposed control strategy is investigated, and the effectiveness is supported by the tuning and comparative experiments with a 2-kW inverter. [ABSTRACT FROM PUBLISHER]

A series-connected current source converter (CSC) based configuration has recently been proposed for offshore wind energy conversion systems. A big challenge exists for such a system that its maximum insulation level is the full transmission voltage due to its monopolar operation. This introduces significant burden to the system in terms of cost, reliability, and flexibility. To solve this issue, a bipolar operation giving a half insulation requirement is proposed and investigated in this paper. However, a unique challenge exists for the CSC-based system when operating under bipolar mode, that is, the dc-link current control. There are two equivalent paths for the dc-link current, which introduces a concern for proper operation of the bipolar system. Accordingly, an optimized dc-link current control is developed in this study. In summary, the bipolar system with the help of the optimized dc-link current control features lower insulation requirement, higher reliability, higher efficiency, and higher flexibility. Finally, both simulation and experimental results are provided. [ABSTRACT FROM AUTHOR]

This paper proposes a voltage match (VM) control for hybrid-bridge-based dual active bridge (DAB) converter in wide voltage conversion gain applications. With the addition of an auxiliary half-bridge circuit, the topology becomes an integration of a half-bridge and a full-bridge DAB converter. Unlike other pulse width modulation generation method for DAB converters, this converter utilizes four-level voltage at one port of the transformer to obtain matched voltage waveforms within the range of twice the minimum conversion gain. Wide conversion gain, decoupling of the two power control variables and wide zero-voltage switching (ZVS) ranges can be achieved with the proposed VM control. Full load ranges of ZVS for the six main power switches can be achieved and the two auxiliary switches can also operate in a wide ZVS range. In addition, the power control is done only using two control variables and its implementation is very simple, only needing a divider and a conventional voltage regulator. These characteristics and benefits of the proposed control are verified by experimental results from a 1-kw converter prototype. [ABSTRACT FROM AUTHOR]

To prevent partial-shading issues in photovoltaic (PV) systems, various kinds of voltage equalizers that virtually unify characteristics of shaded and unshaded modules have been proposed. Although PV string utilization can be dramatically improved, PV systems tend to be complex and costly because, in addition to the main converter for string control, voltage equalizers are separately necessary. This paper proposes the single-switch single-magnetic pulse width modulation (PWM) converter integrating the voltage equalizer using the series-resonant voltage multiplier (SRVM) for standalone PV systems. By utilizing a square wave voltage generated across a filter inductor in a PWM buck converter for driving the SRVM, the main PWM converter and voltage equalizer can be integrated into a single unit with reducing the total switch and magnetic component counts, achieving not only system-level but also circuit-level simplifications. The experimental test using the prototype for three PV modules connected in series was performed emulating a partial-shading condition. The integrated converter effectively precluded the partial-shading issues and significantly improved the power available at a load, demonstrating its efficacy. [ABSTRACT FROM AUTHOR]

Recently, a series-connected current source converter (CSC) based configuration is proposed for offshore wind conversion systems. However, two problems exist in conventional strategy of such a system. One is increased cost on onshore CSCs, and the other is decreased operation efficiency of onshore CSCs. To solve these issues, this paper proposes an optimized strategy. First, the nominal number of onshore CSCs is optimized that a lower cost and a higher efficiency are achieved. Second, an optimal control scheme is proposed for onshore CSCs with lower operation loss. In addition, it is implemented without any extra components or auxiliary circuits. In summary, the proposed scheme gives a reduced cost and an improved efficiency of the offshore system with all the control objective being ensured simultaneously. Simulation and experiments are finally provided. [ABSTRACT FROM AUTHOR]

In this paper, a method to directly shape the output impedance of an inverter is proposed to reduce the total harmonic distortion of the output voltage, based on the uncertainty and disturbance estimator (UDE)-based robust control framework. It is shown that, because of the two-degree-of-freedom feature of the UDE-based control strategy, the UDE filter directly affects the inverter output impedance. A multi-band-stop filter instead of a commonly adopted low-pass filter is then proposed to directly minimize the output impedance around the harmonics to reduce the effect of nonlinear loads and assure robustness to frequency variations. Two tradeoffs are revealed: one between filter bandwidth and stability and the other between robustness and the number of harmonics suppressed. The effectiveness of the proposed control strategy is fully supported by experimental results. [ABSTRACT FROM PUBLISHER]

The impedance-source network converter, utilizing a unique LC network and previously forbidden shoot-through states, provides the ability to buck and boost the input voltage in a single stage. However, the inrush shoot-through current (STC) in startup or transient process might cause undesired current stresses on converter devices. This paper focuses on the STC sensing for an effective inrush current limitation by the combined current sensing technique in the quasi-Z-source inverter. STC and phase currents for the inverter control strategy are obtained simultaneously. No extra hardware is needed and the effects of current sensor bandwidth and duty cycle on the sensing accuracy are analyzed mathematically. The voltage spike gets avoided by integrating the stray inductance into the impedance network. Finally, an STC control loop based on proposed method are embedded in the field-oriented control strategy. The inrush STC and the device current stress in the transient process get suppressed. Simulation and experimental results from a quasi-Z-source inverter validate the feasibility of the proposed methods. [ABSTRACT FROM PUBLISHER]

This paper underpins the principles for generating reactive power in single-phase transformerless photovoltaic (PV) inverters. Two mainstream and widely adopted PV inverters are explored, i.e., H5 and HERIC. With conventional modulation techniques, reactive power cannot be realized in H5 and HERIC due to the absence of freewheeling path in negative power region. Based on the study, modulation techniques are proposed to provide bidirectional current path during freewheeling period. With proposed modulation technique, reactive power control is achieved in H5 and HERIC inverters, without any modification on the converter structures. The performances of the proposed modulation techniques are studied via MATLAB simulation and further validated with experimental results. [ABSTRACT FROM PUBLISHER]

This paper presents a model predictive switching pattern control (MPSPC) for a current-source converter (CSC), which achieves superb low-order harmonics elimination performance in steady state and improved transient responses. Based on a proposed space-vector-based selective harmonic elimination (SHE) method and prediction of load current at the next sampling instant, MPSPC prefers to following a precalculated SHE-pulse width modulation (PWM) pattern in steady state, and governing the CSC through a model predictive control (MPC) approach during transients. In comparison with existing schemes, the advantages of MPSPC are threefold: First, quantization error, introduced by a constant sampling frequency in MPC and degrading steady-state low-order harmonic elimination, is mitigated in the proposed scheme. Second, there is no weighting factor in the cost function, as used in existing schemes. Finally, MPSPC is totally realized based on one-step prediction, which simplifies the structure of the scheme. Both simulation and experimental results verify the steady state and dynamic performance of MPSPC with different SHE-PWM patterns. [ABSTRACT FROM AUTHOR]

The Z-source inverter (ZSI) employs an LC impedance network between the main inverter bridge and the power source. The unique feature of the ZSI is that it can operate either in buck or boost mode with a wide range of obtainable output voltages from a given input voltage. This topology also exhibits better electromagnetic-interference noise immunity when compared to a traditional voltage-source inverter (VSI). However, the LC impedance network of ZSI significantly increases the size and cost of the power converter and can make it unsuitable for low-power applications. This paper proposes a novel topology called switched boost inverter (SBI) which exhibits similar advantages of ZSI with lower number of passive components and more active components compared to ZSI. The steady-state and small-signal analyses of SBI, along with its pulsewidth modulation (PWM) control strategies, have been discussed in this paper. This paper also presents a comparison of SBI and ZSI with the same input and output parameters. The theoretical analysis given in this paper has been validated using a laboratory prototype of SBI, and the experimental results are presented for verification. The experimental harmonic spectrum of the inverter's output voltage with the proposed PWM technique is also plotted and compared with that of a traditional VSI. All the experimental results show good correlation between theory and experiments. [ABSTRACT FROM PUBLISHER]

In recent years, high photovoltaic array voltage up to 1000 V and transformerless grid-tied inverter have been increasingly researched and applied to elevate the inverter and the dc power collection efficiency. With the same reasons, a three-level neutral point clamped (3L-NPC) inverter featuring low power device voltage stress and low leakage current becomes increasingly attractive. In this paper, the operation and the features of a novel grid-tied 3L-NPC are presented. The proposed topology is a derivative of the three-level stacked neutral point clamped (3L-SNPC) structure. However, compared with the conventional 3L-SNPC and its pulse width modulation (PWM) strategy, the new topology with novel PWM strategy features completely inactive intrinsic body diodes. Furthermore, only two outer power devices are working with switching frequency, while the other four Insulated Gate Bipolar Transistors (IGBTs) are actually with the grid frequency. Therefore, the relatively high switching frequency is selected to reduce the inverter output filter inductance. A hybrid CoolMosfet and IGBT power module configuration is also proposed based on the new PWM strategy. The calculation shows that the total power device losses are reduced. The experimental results are illustrated in this paper to confirm the operation of the proposed topology and controller. [ABSTRACT FROM PUBLISHER]

In this paper, based on Cuk converter, a novel commutation torque ripple reduction strategy is proposed for the brushless DC motor. Output modes (buck–boost mode and boost mode) of the Cuk converter during the commutation period and normal conduction period are altered by designing a mode selection circuit, which can reduce commutation torque ripple over the entire speed range. During the commutation period, Cuk converter operates in the boost mode to step up the input voltage of three-phase bridge inverter and then meet the voltage demand of commutation period, such that the commutation torque ripple can be reduced by keeping the noncommutated current steady. In order to improve the utilization rate of the converter, during the normal conduction period, Cuk converter operates in the buck–boost mode and the input voltage of three-phase bridge inverter is regulated by adopting the pulse amplitude modulation (PAM) method without the inverter pulse width modulation chopping, which can reduce the voltage spike damage to the motor windings caused by turn-on/off of MOSFET in the inverter and simplify the program of modulation method further. The experimental results verify the correctness of the theory and the effectiveness of the proposed approach. [ABSTRACT FROM AUTHOR]

In order to meet the high performance and efficiency requirements, a new space vector-based discontinuous modulation strategy for neutral-point clamped three-level inverter is presented in this paper. Different from the conventional discontinuous PWM (DPWM) strategies, a new clamping state is applied to synthesize the reference voltage under the condition of low modulation index. The rms value of output current ripple for different clamping states are calculated, and then the distribution of the new clamping state and the other two clamping states adopted in conventional DPWMs is optimized based on the calculation results. The switching sequences are redesigned according to the new distribution of the three clamping states. The output voltage and current, switching loss, neutral-point voltage ripple and the common mode voltage of the proposed DPWM strategy and DPWM0–DPWM3 are compared by simulation and experimental results. The results show that by the use of the proposed strategy, the values of total demand distortion of output current (ITDD) and weighted total harmonic distortion of output voltage (\boldsymbolV{\mathbf{WTHD}}) are the lowest. Furthermore, the product of switching loss and ITDD of the proposed strategy maintains the lowest within a large range of modulation index-load angle plane. It can be concluded that the utilization of the new clamping state and optimal distribution of different clamping states could enhance the output performance of the inverter. Moreover, the high-efficiency requirement can also be realized at the same time. [ABSTRACT FROM AUTHOR]

This paper provides a theoretical discussion on a new phase-shifted rotating-carrier (PSRC) pulsewidth modulation (PWM) method for a modular multilevel double-star chopper-cell (DSCC) converter. The new method enables the DSCC converter to operate at a low switching frequency in a range of 50 to 100 Hz where the ac grid or line frequency is 50 Hz. The phase shift of each carrier signal is rotated to enable capacitor–voltage balancing in such a low-carrier-frequency range while maintaining the same voltage in each arm as that of the original phase-shifted-carrier PWM. Theoretical analysis of harmonic-voltage spectrum at the arm side of a chopper cell is conducted on the basis of double-variable Fourier series. Then, the analytical results are compared to numerical ones. A three-phase grid-connected DSCC converter rated at 66 kV, 50 Hz, and 100 MW with 64 chopper cells per leg is used in circuit simulation to confirm the validity of the proposed PSRC-PWM method. The simulation results show that the PSRC-PWM can maintain stable operation of the DSCC converter even if the carrier frequency goes lower than 100 Hz. Several performance criteria conclude that the optimal carrier frequency is 75 Hz. [ABSTRACT FROM AUTHOR]

High switching frequency is an effective method to improve power density for LLC resonant converters. However, conventional digital controllers, such as general-purpose digital signal processors and microprocessors, have limited frequency resolution, which induces high primary- and secondary-side current variation and leads to poor output voltage regulation. In this paper, a hybrid control method combining pulse frequency modulation (PFM) and pulse width modulation is proposed to overcome the limited frequency resolution issue. The proposed hybrid control method focuses on steady-state operation, and its operating principles are introduced and analyzed. In addition, the proper magnetizing inductance and dead time duration are derived to ensure that the power mosfets achieve zero voltage switching with the proposed control method. The improved voltage regulation performance is compared with the conventional PFM control and verified through simulation and experimental results using a 240 W prototype converter operating at a switching frequency of 1 MHz. [ABSTRACT FROM PUBLISHER]

Several pulsewidth modulation (PWM) strategies have been proposed for three-phase multilevel converters. Typically, these PWM methods can be either space-vector or carrier-based implemented, where the carrier-based implementation usually presents a lower computation complexity. In this paper, a novel approach for the carrier-based implementation of different existing PWM methods is proposed for three- (3L) and four-level (4L) dc–ac converters, which can be easily extended to any number of levels. The main features of the proposed approach are its reduced computation complexity and computation time. On the other hand, the proposed approach suggests the derivation of novel PWM strategies which can potentially present improved performance features. As an example, two new discontinuous PWM (DPWM) strategies are proposed for the 4L converter. One of these DPWM strategies presents lower weighted total harmonic distortion than other previously proposed strategies. Simulation and experimental results verify the effectiveness of the proposed approach and novel DPWM strategies. [ABSTRACT FROM AUTHOR]

This paper presents a review of the most popular control and modulation strategies studied for matrix converters (MCs) in the last decade. The purpose of most of these methods is to generate sinusoidal current on the input and output sides. These methods are compared considering theoretical complexity and performance. This paper concludes that the control strategy has a significant impact on the resonance of the MC input filter. [ABSTRACT FROM AUTHOR]

This paper proposes a new space-vector pulsewidth modulation (SV-PWM) strategy for a three-level neutral point clamped inverter. The presented SV-PWM strategy makes it possible to control the neutral point voltage by optimum choice of switch sequence for any position and length of output voltage vector. The proposed solution takes into consideration the unbalance of the dc-link voltages. It also analyzes the influence of vector sequences on the predicted unbalance of the dc-link voltage. The solution allows selecting optimum vectors and their on-time durations in order to reduce quickly the dc-link voltage unbalance. The calculation of the space vector area proposed in this paper takes into consideration voltage unbalance and its influence on the length and position of vectors. The proposed approach assures properly generating the voltage output vectors, even in the case of the existing large voltage unbalance in the dc-link. The results of the experimental investigation of the proposed modulation strategy are presented in this paper. [ABSTRACT FROM PUBLISHER]

Multiphase (more than three phases) power electronic converters are required mainly for feeding variable-speed multiphase drive systems. This paper presents one such solution by using a direct ac–ac converter that can be used to supply a nine-phase drive system. The input is a fixed-voltage and fixedfrequency three-phase input, and the output is a variable-voltage and variable-frequency nine-phase output. A simple pulsewidthmodulation technique is developed for the proposed ac–ac converter named as a nonsquare three-to-nine-phase matrixconverter configuration. The developed modulation technique is based on the comparison of a high-frequency carrier signal with the duty ratios. Although the carrier-based scheme is widely employed for the control of back-to-back converters, it has recently been used for controlling a three-to-three-phase matrix converter. This concept is extended in this paper for controlling a threeto-nine-phase matrix converter. With the two techniques that are proposed, one outputs 0.75 of the input magnitude and the other outputs reach 0.762 of the input. This is the maximum value of the output voltage in the linear modulation range that can be achieved in this configuration of the matrix converter. The viability of the proposed control techniques is proved analytically through simulation and an experimental approach. [ABSTRACT FROM PUBLISHER]

Multilevel inverters are in state-of-the-art power conversion systems due to their improved voltage and current waveforms. Cascaded H-bridge (CHB) multilevel inverters have been considered as an alternative in the medium-voltage converter market and experimental electric vehicles. Their variant, the asymmetrical CHB (ACHB) inverter, optimizes the number of voltage levels by using dc supplies with different voltages. However, the CHB and ACHB inverters require a large number of bidirectional and isolated dc supplies that must be balanced, and as any multilevel inverter, they reduce the power quality with the voltage amplitude. This paper presents a solution to improve the already mentioned drawbacks of ACHB inverters by using a high-frequency link using only one dc power source. This single power source can be selected according to the application (regenerative, nonregenerative, and with variable or permanent voltage amplitude). This paper shows the experimental results of a 27-level ACHB inverter with a variable and single dc source, but the strategy can be applied to any ACHB inverter with any single dc source. As a result, the reduction of active semiconductors, transformers, and total harmonic distortion was achieved using only one dc power source. [ABSTRACT FROM AUTHOR]

This paper presents a novel topology for a direct ac–ac power converter, called as the “three-to- k” phase matrix converter. The input to the proposed matrix converter configuration is a three-phase fixed voltage and a fixed frequency supply from the grid. The output is a variable voltage and variable frequency ac supply of any number of phases (k phase). However, the discussion is limited here for a k that is equal to odd number of phases. As an example, a “three-to-five” phase matrix converter is utilized for discussion and analysis. This paper also proposes two pulsewidth modulation (PWM) control techniques for the general topology of the “three-to- k” phase matrix converter. This is based on the so-called direct duty ratio PWM (DPWM). In one presented technique, the output voltage is limited to one half of the input voltage. For the other proposed scheme, the output voltage is enhanced to 78.86% of the input voltage. The proposed control algorithm is validated using simulation and an experimental approach. [ABSTRACT FROM AUTHOR]

This paper presents investigations of dc-link voltages balance with the use of a passive RLC circuit in a single-phase diode-clamped inverter composed of two three-level legs. Application of the balancing circuit in the diode-clamped inverter needs proper PWM generation but the modulation method is the same for both in the balanced and unbalanced state. This method of dc-link voltages balance does not need any measurements or additional control, and this ensures fast response and low energy losses. This paper also presents mathematical analysis of the PWM modulation method and the inverter operation, and an analytical description of the natural balancing process with contribution of the load current and the balancing circuit current. Simulations and experimental results of the inverter with FPGA-based control are presented to confirm the effectiveness of the natural balancing process. [ABSTRACT FROM AUTHOR]

This paper presents a single-phase power factor corrector based on a tapped-inductor buck–boost converter. This paper suggests simplified models of the power stage under current-mode control and derives small-signal transfer functions of both the current and voltage control loops. Design rules for implementation of the proposed power factor corrector (PFC) are also suggested. The proposed PFC features low dc bus voltage, arbitrary lower than the peak line voltage. The proposed PFC is suitable for applications in computers and communications, where dc isolation can be provided by the downstream dc/dc converters. Simulation and experimental results are also reported and stand in good agreement with theoretical expectations. [ABSTRACT FROM AUTHOR]

Most switched mode power supplies provide a regulated voltage at their output. However, there are applications requiring a controlled current. Among others are battery chargers, test equipment for converters driven by solar cells, and LED drivers. This paper describes a dc–dc power converter realizing such a current source. The converter is based on a boost converter, supplied by a voltage source and acting as a current source. The boost converter can increase the output voltage above the input voltage. The converter provides a high control bandwidth based on a self-oscillating current loop. As additional practical features, soft start and output overvoltage limitation are included and described in this paper. The modulator, the control, and the power stage are described in detail and verified by the experiment. [ABSTRACT FROM AUTHOR]

Parallel multilevel converters are now widely used in the industry, particularly in high-current applications such as voltage regulator modules. The reduction of the output current ripple and the increase of its frequency are possible due to the use of interleaving techniques and, as a consequence, the filters associated with the converter may be reduced. The current ripple reduction in each commutation cell of a parallel converter is possible by the use of intercell transformers (ICT). The design of such a special magnetic component depends very strongly on the magnetic flux flowing through their cores. In three-phase systems coupled by ICTs, the injection of zero-sequence signals in the output voltage reference changes this flux. The aim of this paper is to explain the influence of the most popular pulse width modulation (PWM) methods regarding the ICT flux for applications to three-phase loads. An optimal PWM method that minimizes the size of the ICT design is developed. Experimental results verify the analysis presented in this paper and validate the flux reduction provided by the developed optimal zero-sequence signals. [ABSTRACT FROM AUTHOR]

This paper presents a current soft-commutation pulsewidth modulation (PWM) scheme for three-phase current source converter. With the presented PWM scheme, the incoming switch has a positive collector-to-emitter voltage while the outgoing switch has a negative collector-to-emitter voltage during current commutations. Therefore, natural soft commutations for switching transitions are achieved, while current-commutating durations are also lessened. Moreover, some particular advantages can also be obtained such as reduced switching frequency, high dc current utilization ratio, and in-phase transfer between line currents and their references. For more efficient control, this paper then designs logic equations for mapping out the assignments from references to gating signals, allowing a simple implementation using a digital signal processor or a programmable logic device. The theoretical analysis is verified by experimental results. [ABSTRACT FROM AUTHOR]