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This paper briefly reviews the common-mode voltage (CMV) and neutral point (NP) voltage for neutral point clamped three-level inverter (NPC TLI). Then, the space vector pulsewidth modulation (SVPWM) and traditional virtual SVPWM (VSVPWM) are discussed in terms of these two issues, revealing the drawbacks in reducing CMV or eliminating NP voltage oscillation. A novel virtual space vector modulation, named as RCMV_VSVPWM, is proposed in this paper to reduce CMV and eliminate NP voltage oscillation for NPC TLI. By selecting vectors with lower CMVs, a set of novel virtual voltage vectors are generated. The highlight of the method is zero average NP current in one control cycle and lower CMV. Furthermore, the active NP voltage control suitable for RCMV_VSVPWM is presented and evaluated. The corresponding experimental results are given, which are well-consistent with theoretical analysis. [ABSTRACT FROM AUTHOR]

This paper improves the position sensorless drive by sensing actual machine phase voltages. A high-bandwidth phase voltage measurement is developed for pulsewidth modulation (PWM) voltage inverters. On the basis, the actual phase voltage is obtained based on the digital integration of PWM voltage using the capture modulator in existing drive microcontrollers (MCU's). Comparing to existing phase voltage measurement, no separated A/D converter and communication hardware are required because PWM pulses are directly measured using MCUs. However, for standard machines without neutral points, only line-to-line ac PWM voltages can be measured for the phase voltage reconstruction. Since the capture based on transistor-transistor logic (TTL) logics receives only digital signals, a preprocess circuit to convert ac PWM line voltages to equivalent digital signals is proposed. This paper clearly explains the voltage sensing hardware using MCU capture modulator. According to experimental results, a 150-MHz sampling rate for phase voltage measurement is achieved based on the proposed capture-based voltage measurement. Although the physical limitation of back electromotive force estimation still appears, the proposed phase voltage measurement substantially enhances the sensorless drive performance at low speed. [ABSTRACT FROM AUTHOR]

Metallic joints are created in multivariable gas metal arc welding process by maintaining a balance between the quantum of heat generated and the feeding rate of electrode metal to the weld gap. The wire feeding control is often independently handled. The wire feeder unit should be simple, low cost, and capable of producing accurate speed. Arc welding controllers are often kept in clumsy conditions and the wire feeder unit is located close to the welder, could be much away from the controller. To reduce interconnections, separate sensing element for speed feedback should be avoided. Due to their negligible electrical and mechanical time constant, the pancake-type permanent magnet dc motor is suitable for wire feeding, where sensing of back electromotive force (EMF) for feedback is easy. When high frequency pulsewidth modulation (PWM) controller is used, the sensing of back EMF gets complicated. This paper explores the constraints on the choice of PWM frequency along with its maximum pulsewidth for different types of dc motors. It further elaborates comparatively on the choice of suitable control function for generating accurate speed control of wire feeding using back EMF as feedback. Finally, this paper also details the experimental results using the proposed control function. [ABSTRACT FROM AUTHOR]

In an open-end winding permanent magnet synchronous machines drive with single dc voltage source, zero-sequence current (ZSC) can lead to a high current stress of power modules and loss of motor. Therefore, some modulation strategies have been employed to alleviate ZSC by suppressing zero-sequence voltage (ZSV). However, ZSC still exists in the system because ZSV can also be generated by other nonlinear factors of inverter such as the dead time of system. In addition, zero-sequence back electromotive force in the zero-sequence path can also enlarge torque ripple and ZSC. In order to deal with above problems, first, this paper proposes a full-order adaptive zero-sequence observer to estimate future ZSC and ZSV, which are able to compensate one-step control delay. Second, to achieve the maximum voltage dc bus utilization, this paper proposes a novel deadbeat predictive current control (DPCC) scheme with alternate sub-hexagonal center pulsewidth modulation strategy to suppress ZSC and torque ripple simultaneously. Finally, this paper presents a comparative study of two types of methods, namely traditional DPCC scheme and the proposed DPCC scheme. Simulation and experimental results are demonstrated to verify the effectiveness of the proposed DPCC scheme. [ABSTRACT FROM AUTHOR]

This paper presents a novel seven-level inverter topology for medium-voltage high-power applications. It consists of eight active switches and two inner flying capacitor (FC) units forming a similar structure as in a conventional active neutral-point-clamped (ANPC) inverter. This unique arrangement reduces the number of active and passive components. A simple modulation technique reduces cost and complexity in the control system design without compromising reactive power capability. In addition, compared to major conventional seven-level inverter topologies, such as the neutral point clamped, FC, cascaded H-bridge, and ANPC topologies, the new topology reduces the dc-link voltage requirement by 50%. This recued dc-link voltage makes the new topology appealing for various industrial applications. Experimental results from a 2.2-kVA prototype are presented to support the theoretical analysis presented in this paper. The prototype demonstrates a conversion efficiency of around 97.2% ± 1% for a wide load range. [ABSTRACT FROM AUTHOR]

This paper investigates a Vienna rectifier as a charger for series-connected battery packs. Focusing on carrier-based pulsewidth modulation (CBPWM), the ripple current flowing through the neutral point (NP) results in the voltage oscillation if the loads are resistive. To reduce the ripple of average NP current with mitigated distortion under balanced and unbalanced dc-link voltages conditions, a novel CBPWM with segmented component injection scheme (SCIS) is proposed in this paper. After dc component injection, continuous intervals for optimized component injection and clamping intervals for compensation component injection are identified. Optimized components are calculated originally based on unbalanced factor to make the average NP current zero-size in one switching period. Moreover, unique compensation components generate suitable NP current to shape the sinusoidal input currents according to the circuit analysis. In consequence, the SCIS not only keeps the input current with low-harmonic distortion, but also minimizes the oscillation of dc-link voltage under balanced and unbalanced conditions. In addition, the value of the NP current during the clamping intervals is analyzed under various operating conditions. The effectiveness and the performance of the proposed SCIS are verified by simulation and experiments. [ABSTRACT FROM AUTHOR]

This paper presents a neutral-point deviation and ripple compensating control method applied to a three-level neutral-point-clamped (NPC) converter. The neutral-point deviation and its harmonic components are analyzed with a focus on the average current flowing through the neutral-point of the dc link. This paper also proposes a control scheme compensating for the neutral-point deviation and dominant harmonic components under generalized unbalanced grid operating conditions. The positive and negative sequence components of the switching functions and ac input currents are employed to accurately explain the behavior of three-level NPC converter. Simulation and experimental results are presented to verify the validity of the proposed method. [ABSTRACT FROM AUTHOR]

This paper presents Space Vector Modulation (SVM) sequences that reduce Common Mode Voltage (CMV) in Dual Three-phase Asymmetrical Induction Motor (DTAIM). At first, two existing SVM techniques such as Reference SVM (RSVM) and CMV1 are studied. Additionally, three new switching sequences are developed as CMV2, CMV3 and DCMV3, which reduce peak magnitude of CMV by 66.8% in comparison with RSVM technique. In SVM techniques, to obtain least CMV, zero vectors are usually replaced by two opposite large Active voltage Vectors (AV) with equal time duration. In such topologies like CMV1, total six AVs are utilized to synthesize the reference vector. The proposed SVM technique CMV2 utilizes only five large AVs to synthesize the reference vector and reduces CMV. Selection of five neighbouring AVs is reflected in reduction of harmonic flux trajectories and stator current ripple in proposed techniques. Additionally, two more switching sequences (CMV3 and DCMV3) are developed related to utilization of specific zero voltage vectors in all sectors (7 and 56) that produce zero CMV. These two switching sequences also provide easy implementation feature during the development of c-code program. In this study, CMV and stator current ripple are considered as performance parameters for different SVM techniques. All SVM techniques are analysed by analytical results, computer simulations, and using prototype test setup of DTAIM fed by Dual Three-phase Voltage Source Inverters (DTVSIs). [ABSTRACT FROM AUTHOR]

A trinary multilevel converter uses a few heterogeneous H-bridge submodules (SMs) to synthesize an output voltage with multiple levels. Two major limitations of this converter are that it needs multiple dc sources and it cannot operate under pulsewidth modulation (PWM). This paper addresses these limitations by adding a low-voltage H-bridge SM to this converter and proposing a new switching algorithm. The resulting PWM-based asymmetric cascaded H-bridge converter uses only one dc source and synthesizes a high-quality output voltage. This improved converter can be a potential choice for real and reactive power support in power system applications. This paper also proposes methods for stability analysis and design of this converter. Experimental case studies evaluate the performance of the proposed converter for both standalone and grid-connected modes of operation. [ABSTRACT FROM AUTHOR]

The switching speeds of next-generation power semiconductor devices, such as those made of silicon carbide and gallium nitride are roughly ten times those of conventional devices (e.g., silicon insulated-gate bipolar transistors). This increases the frequency range of the electromagnetic noise accompanying the switching operations of pulsewidth modulated (PWM) converters and worsens the influence of radiated noise. The authors have previously proposed an active common-mode filter (ACF) that reduces the radiated noise from the power cables connected to a PWM converter and evaluated its effect in reducing radiated noise by using a function generator as a common-mode (CM) noise source. In this paper, the ACF is applied to a motor drive system fed by a three-phase PWM inverter, and the attenuation characteristics of the CM voltage are evaluated. To avoid saturating the ACF, the combination of an active common-noise canceller and the ACF is discussed. The experimental results show that the system constructed in this paper can suppress the CM voltage produced by the PWM inverter over a wide frequency range from 100 to 100 MHz. [ABSTRACT FROM AUTHOR]

The circulating current of modular multilevel converter (MMC) has a great impact on the power losses, the submodule (SM) capacitor voltage ripples, and the rating of power devices. Existing analysis of circulating current has considered the capacitor voltage and the modulation signal. In this paper, the effect of semiconductor devices on the circulating current is further presented. In order to realize the different circulating current injection targets under different conditions, a unified online calculation scheme by using the instantaneous information of MMC is proposed in this paper to generate the circulating current injection references. It avoids detecting the amplitude and phase of the output current or using an extensive lookup table. Besides, a mathematical analysis model is built and it reveals the impact on the capacitor voltage ripple and the rms value of arm current with different injection references, thus guide the determination of the injection ratio. Experimental results based on a three-phase MMC prototype with six SMs per arm are presented to demonstrate the analysis of circulating current and the proposed circulating current injection references generating method is verified by different circulating current control targets with different loads. [ABSTRACT FROM AUTHOR]

Grid-interactive inverters allow distributed generation units to provide various ancillary services in microgrids. As the linear modulation region of inverters is restricted by the dc-bus voltage, providing ancillary services may drive the fundamental positive-sequence inverter voltage to the overmodulation region. Therefore, to operate in the linear modulation region the maximum active- and reactive-power of the inverter may have to be reduced unless pulsewidth modulation (PWM) references are adjusted. In this paper, an atypical PWM method is proposed for maximizing dc-bus utilization of grid-interactive two-level voltage source inverters (2L-VSI) providing ancillary services. Two important ancillary services, i.e., negative-sequence compensation and harmonic compensation are considered in this paper. The proposed method increases the maximum active- and reactive-power that a 2L-VSI can deliver when providing ancillary services by injecting a common-mode component in the references computed based on instantaneous reference magnitudes. The validity of the proposed technique is verified through simulation, as well as experimental data obtained using a 208-V three phase grid-connected 2L-VSI. [ABSTRACT FROM AUTHOR]

This paper proposes a novel discontinuous pulse-width modulation (DPWM) method to reduce the current harmonics and improve the system efficiency for a single-phase three-level neutral-point clamped inverter. In single-phase inverters, the unipolar pulse-width modulation (UP-PWM) method is commonly used. However, this method has the disadvantage of power losses due to numerous switching operations. Conventional DPWM methods reduce the power losses and improve efficiency but increase the current total harmonic distortion (THD). To overcome these weaknesses, this paper proposes a hybrid DPWM switching method combining two PWM methods: the UP-PWM method and the conventional DPWM method called one-pole clamped PWM method. Since the proposed DPWM method offers all the advantages of both PWM methods, the optimal performance—with regard to the power losses and current THD—is obtained. The combination of two PWM methods is investigated by analyzing the power losses and current THD. Based on the analysis, the process determining the optimal operating condition is introduced. The effectiveness of the proposed DPWM method is demonstrated through simulations and experiments. [ABSTRACT FROM AUTHOR]

This paper presents a quantitative analysis of the losses of the hybrid cascaded modular multilevel converter (HC-MMC). Regulation of full-bridge (FB) submodule-capacitor voltages in an HC-MMC requires dedicated strategies that affect the voltage harmonics generated by the converter's main power stage and hence its switching patterns and losses. This paper uses an electromagnetic transient simulator (PSCAD/EMTDC) to estimate the semiconductor losses using the switches’ turn-on and turn-off characteristics. The paper examines the losses of a 45-MW HC-MMC for two recently introduced voltage-regulation methods based upon the modified sinusoidal pulse width modulation (PWM) and an existing method based upon the trapezoidal PWM. Losses of a conventional FB-MMC that offers dc-fault blocking capability are also investigated and compared with those of HC-MMC. The loss comparison results indicate that: first, the two voltage-regulation methods for HC-MMC based upon the modified sinusoidal PWM result in markedly lower semiconductor losses than the trapezoidal PWM method; second, compared with the original HC-MMC, a mixed submodule HC-MMC may lower the semiconductor losses at certain operating points with proper addition of mixed submodules; and finally, HC-MMC may have up to 9.0% lower semiconductor losses (relative) than the conventional FB-MMC. [ABSTRACT FROM AUTHOR]

The output voltage of power electronic converters is a very important quantity for dynamic control of power electronic systems. In electrical drives without electromechanical position or speed sensor, the terminal reference voltage is used to obtain the rotor position. Dead-time effects and semiconductor voltage drop lead to distortion in the actual output voltage and degrade the control performance when the back electromotive force magnitude is low. Thus, for stable low-speed operation, output voltage sensing becomes necessary. Due to the switching nature of power electronic systems, this is not a trivial task, especially when instantaneous measurement of the terminal voltage is required. In this paper, an instantaneous switching-period average voltage sensing technique is proposed that utilizes a combined approach of oversampling and filtering. Based on the theoretical analysis of the sampling- and filter-induced measurement distortion, a general solution for an optimal filter design is derived. The additional sensing circuit is integrated into the low-side gate driver of the converter outputs. This paper includes details about the hardware implementation and extensive verification measurements. [ABSTRACT FROM AUTHOR]

This paper proposes a new single-phase single-stage switched-boost inverter with four switches. Like the quasi-Z-source inverter and quasi-switched boost inverter (qSBI), the proposed inverter has the main features as continuous input current, buck/boost voltage with single-stage conversion, and shoot-through immunity. Compared to the qSBI, the proposed inverter uses one more capacitor and one less switch. This paper presents the operating principles, pulse-width modulation control strategy, parameter design guidelines, and simulation results for the proposed inverter. To verify the performance of the proposed inverter, an 800-W prototype was built with an 110 V/50 Hz output voltage in stand-alone and grid-connected modes. The simulation and experimental results matched those of the theoretical analysis. [ABSTRACT FROM AUTHOR]

In this paper, two structures are proposed for the switched-inductor quasi-Z-source inverter. In the proposed structures to extend the voltage gain of inverter, two new switched-inductor structures are used. In the proposed structures, voltage across the capacitors in the Z-source network and in the switched-inductor is symmetric and small. The other advantage of proposed inverters is known as achieving higher voltage gain per smaller duty cycle ratio (of shoot-through). Compared with a conventional continuous input current switched-inductor quasi-Z-source inverter at the same gain voltage, there is less of a ripple of input current in the proposed inverters. In this paper, at first the both the conventional and the proposed switched-inductor Z-source inventers are thoroughly investigated to find out their governing relations. Then, the proposed Z-source inverters are compared with the conventional ones by simulating them to assess their performance efficiency. Next, applying the simple boost pulse width modulation the simulation is carried out with PSCAD/EMTDC software. After that, to evaluate the obtained results, the prototypes of the proposed inverters with 48 Vdc input voltage are used. [ABSTRACT FROM PUBLISHER]

This paper proposes a novel fuzzified mechanical sensorless speed estimation technique for permanent magnet direct current (PMDC) brushed motor operated with pulse width modulation (PWM) based terminal voltage. For replacement of conventional mechanical speed sensors, few mechanical sensorless speed estimation techniques have been reported recently in the field of PMDC brushed motor. In this paper, a novel technique is applied over a recently reported semianalytical dynamic time-domain PMDC brushed motor model incorporating space-domain effects, namely slotting effect and commutation phenomenon to simulate the proposed estimation process. Ripple and back electromotive force based standalone estimation approaches are hybridized in order to eliminate uncertainties in all regions of estimation. In this paper, a discrete fuzzified hybrid speed estimation model has been proposed with adequate dynamic simulation responses. Further the proposed discrete speed estimation model has been applied experimentally over a PWM-driven 24-V, 12-teeth, 100-W PMDC brushed motor and various dynamic real-time responses have been compared with conventionally captured speed samples to validate the proposed model. [ABSTRACT FROM PUBLISHER]

The neutral-point voltage-balancing control is a critical issue of a neutral-point-clamped converter. The conventional control strategy is to inject the specific zero-sequence voltage to regulate the redundant vector, but it is unacceptable to the three-phase four-wire system. This paper provides a neutral-point voltage-balancing control by the dipolar modulation, and the control freedom of the zero-sequence voltage is flexible. Therefore, the proposed method is suitable for both three-phase three-wire and three-phase four-wire systems. Besides, the proposed method improves the control dynamic in a reactive power system. The proposed neutral-point voltage-balancing control is verified by the mathematical analysis and experimental results. The control dynamic, power loss estimation, and the output current performance are analyzed in this paper. [ABSTRACT FROM PUBLISHER]

Common-mode voltage output is closely associated with switching states in three-phase three-wire neutral point clamped converter. Detailed analysis shows avoiding redundant states can effectively improve the common-mode voltage, so this paper proposes a pulse width modulation (PWM) technique with zero redundant state to reduce the common-mode voltage output, and evaluates their performance with the conventional PWM schemes. This paper also takes the compensation of neutral point potential deviation into consideration. Laboratory test results are presented to verify the effectiveness of the proposed scheme. [ABSTRACT FROM PUBLISHER]

The aim of this paper is to study the dynamics of a permanent magnet direct current (PMDC) brushed motor while two crucial space-domain effects, namely, slotting effect and commutation phenomenon are taken into account. Semi-analytical dynamic time-domain PMDC brushed motor model inclusive of these space-domain effects is used to analyze and investigate the dynamics. Pulse width modulation operated discontinuous current PMDC brushed motor drive with steady duty cycle is employed to acquire the bifurcation patterns. The chaotic nature due to slotting effect and commutation is identified from the bifurcation patterns and reported. It also has to be admired that such nonlinear dynamical behavior with the same set of parameters at similar operating condition has not been observed when a conventional PMDC brushed motor dynamic model is considered. These space-domain effects, namely, slotting effect and commutation also have a prominent impact to make some time-domain states of a PMDC brushed motor drive chaotic. The role of slotting effect and commutation phenomenon to analyze the chaos over time-domain state variables of the PMDC brushed motor drive is investigated and validated experimentally in this paper. [ABSTRACT FROM PUBLISHER]

This paper targets the reduction of common-mode voltage in an indirect matrix converter (IMC) through an intelligent space-vector-based modulation technique. This mode of control results in lower dV/dt at the motor terminals, thereby, reducing voltage stress to windings; and reduced output voltage distortion resulting in lower machine losses. The conventional indirect space vector pulse-width modulation method of controlling matrix converters involves independent control of either the rectifying stage or the inverting stage of the converter. However, in this paper, by suitable selection of space vectors, the rectifying stage of the matrix converter generates different levels of virtual dc-link voltage. Therefore, the responsibility of formulating output voltages with a particular magnitude and frequency, which can be translated to different machine speeds, has been transferred solely to the rectifying stage of the IMC. Estimation of the degree of distortion in the three-phase output voltage is another facet discussed in this paper, which aids the sizing and designing of output passive filters. The analysis of output voltage distortion and the proposed modulation strategies have been substantiated by simulations in MATLAB/Simulink and experimentally verified on a scaled down laboratory prototype. [ABSTRACT FROM AUTHOR]

An unidirectional single-phase three-wire rectifier is proposed in this paper. Such topology is composed of a noncontrolled leg, two controlled legs, and a capacitor bank. A suitable model, pulse-width modulation, and control strategies of the system are proposed as well. The control strategy includes the synchronization method, in which it imposes the grid currents with the same phase angle of the voltages generated by the rectifier. This method ensures sinusoidal grid currents and mitigates the zero-crossover distortions normally caused by the use of diodes. A comprehensive comparison with two conventional configurations is also presented in this paper. Simulation and experimental results are also presented for validation purposes. [ABSTRACT FROM AUTHOR]

Negative- and zero-sequence internal currents of a modular multilevel converter (MMC) under unbalanced ac-grid conditions can increase the peak voltage of the submodule (SM) capacitors, which should be kept below a maximum voltage limit. This paper investigates the impact of offset pulsewidth modulation (OPWM) and zero-sequence voltage injection on reducing peak SM capacitor voltages of the MMC during unbalanced ac-grid conditions. It is demonstrated that OPWM extends the operating range of the MMC for a given set of restrictions, as it leads to a reduction of capacitor voltage in every phase by utilizing all the SMs in the arms. Zero-sequence voltage injection further reduces the maximum SM capacitor voltage among three phases under certain conditions. Simulation results from an 800-MVA MMC-based high-voltage direct current transmission system demonstrate the effect of OPWM in the operation of the converters and the efficacy of the method compared to standard modulation methods. [ABSTRACT FROM AUTHOR]

Cascaded multicell converter (CMC) is one of the effective solutions for medium-voltage high-power drives. The inability to regenerate power back to the source is one of the limitations of this converter. The regeneration capability is obtained by using a pulsewidth-modulated active rectifier instead of a conventional three-phase passive rectifier in each cell. However, due to their two-level voltage operation at the input side, an inductor is required for each cell to filter out the switching frequency components from the input current. This paper proposes a new configuration of regenerative CMC based on coupled inductor to achieve multilevel voltage at the transformer secondary terminals. This allows us to operate the rectifier devices at reduced switching frequency. The coupled inductor reduces the total harmonic distortion (THD) of the transformer secondary current and thus the transformer size. The size of the filter inductor and the transformer ratings are compared. The operating principle and the detailed analysis are presented. A technique to bypass a faulty module is proposed. The working of the converter is verified through simulation and experimental studies. [ABSTRACT FROM AUTHOR]

In photovoltaic applications, many previous research works have focused on pulsewidth modulation (PWM) resonant converters in order to achieve a high efficiency with a wide input voltage range. Conventional approaches utilized symmetric boosting modulation at the secondary side rectifier to obtain a symmetric operation, and they utilized two boosting modes in a switching period. Among various rectifier structures, the voltage doubler structure has a strong advantage due to a small number of components. However, it suffers from serious hard switching losses in the secondary side rectifier. In this paper, a new converter with a novel asymmetrical modulation is proposed and verified. The strong point of the proposed converter is that it eliminates hard switching turn-on losses from the rectifier, while maintaining the minimized number of components. Although the proposed converter adopts an asymmetric modulation, the offset current on the transformer becomes zero inherently. Furthermore, a “forced half resonance” operation of the proposed converter keeps rms current stresses at the same level as conventional converter although it has a higher peak current. Accordingly, the proposed converter achieves a superior efficiency with the minimum number of components at 35–25 V input and 380 V/300 W output specification. [ABSTRACT FROM AUTHOR]

This paper deals with the analysis of the input dc-link voltage ripple in multilevel inverter based on H-bridge and level doubling network (LDN). The LDN is basically a half-bridge fed by a floating capacitor, with voltage self-balancing capability, recalling the concept of a flying capacitor configuration. The amplitude of the LDN voltage ripple is analytically determined considering both the low-order and the switching harmonic components. In particular, peak-to-peak distributions of voltage ripples over the fundamental period are analytically determined, making possible the design of dc-link capacitor relying only on the dc-voltage ripple requirements. The case study makes reference to negligible switching ripple in the output current. It well represents either grid connection or passive load having almost sinusoidal currents. Numerical simulations carried out by MATLAB/Simulink and a complete set of experimental verifications are given to confirm the theoretical developments. [ABSTRACT FROM AUTHOR]

According to different clamping methods, nine modes (C_MODE1-9) of the traditional discontinuous pulsewidth modulation (DPWM) for neutral-point-clamped three-level converter have been revealed. Since traditional DPWM cannot balance neutral point (NP) voltage under the full range of modulation index (MI) and power factor (PF), two extended modes (E _MODEs) are proposed in this paper, which can balance NP voltage. The proposed extended discontinuous pulsewidth modulation (EDPWM) is characterized by using C_MODEs and E_MODEs alternately.Therefore, EDPWM can balance NP voltage under the full range of MI and PF. Since the switching numbers under C_MODE and E_MODE in one switching cycle are two and three, respectively, the switching loss under EDPWM is lower than that under other pulsewidth modulation (PWM) strategies. The performance of EDPWM is analyzed and compared with traditional DPWM, space vector PWM (SVPWM) and virtual SVPWM (VSVPWM) in terms of switching loss, waveform quality, and the ability of NP voltage control. Finally, the feasibility and superiority of the proposed method are verified by experiments. [ABSTRACT FROM AUTHOR]

The pulse-width modulated (PWM) switching rectification that can achieve a high power factor (PF) for increasing the energy transfer efficiency between an LC resonator and a rectifier and voltage step-up and -down conversion is proposed for a wireless power transfer (WPT) receiver. The proposed method can emulate the switching rectifier as a resistive load by using an inductor and integrated phase synchronizers. Additionally, similar to a switched-inductor converter that controls the duty cycle ratio (D), the proposed PWM rectifier can control the output voltage VOUT when the input is a rectified, wirelessly coupled voltage instead of a constant voltage. Thus, unlike a conventional PWM switching rectifier for ac mains, an additional voltage conditioning circuit would not be needed after the proposed rectifier for WPT. The proposed PWM switching rectification is implemented in the AMS 0.18 μm 1.8 V/5 V CMOS process. PF = 1 is measured, indicating the most efficient energy transfer, compared to only 0.55–0.65 in a peak detection rectifier. Additionally, 88.2% of peak power conversion efficiency of the switching rectifier is achieved, and the maximum output power is 80.3 mW at 500 kHz of the WPT frequency. Moreover, the measured voltage conversion ratios ranging between 0.73× and 2× are demonstrated in this paper. [ABSTRACT FROM AUTHOR]

This paper proposes a generalized design framework for three-phase Vienna rectifiers to handle the neutral point voltage balance issue. On the basis of the design framework, it is convenient to construct various neutral point voltage balancing methods with the guarantee of stability. As demonstration, three representative neutral point voltage balance approaches are presented by choosing different zero-sequence voltages. A comprehensive comparison among the three approaches is given in the aspects of input current quality, capacitor voltage fluctuation, and system efficiency. The comparison results provide guidance for constructing the most appropriate approach based on the specific requirement. Finally, simulation and experimental results verify the correctness and effectiveness of the presented approaches and the related performance analysis. [ABSTRACT FROM AUTHOR]

In order to reduce switching loss of neutral point clamped three-level inverter (NPC TLI), generally discontinuous pulsewidth modulation (DPWM) is used. But it can result in dc offset and ac ripple on neutral point (NP) voltage. So a novel pulse sequence DPWM (NPSDPWM) is proposed to reduce switching loss and control NP voltage simultaneously in this paper. NP voltage is controlled by choosing proper clamping modes. To avoid unexpected switching action during changing clamping mode, an improved pulse sequence is also presented. The switching loss and NP voltage ripple of NPSDPWM, traditional and proposed DPWM in previous literature are compared, respectively. The experimental results show that NPSDPWM has well NP voltage control ability and the switching losses are reduced effectively. [ABSTRACT FROM AUTHOR]

In this paper, a novel discontinuous pulsewidth modulation (DPWM) modulation strategy for a neutral-point-clamped (NPC) three-level converter (TLC) is proposed to reduce the switching loss, reduce common-mode voltage (CMV), and remove dc offset from the neutral-point (NP) voltage simultaneously, which is named as RCMV_DPWM. Based on the space vector diagram with reduced CMV, all clamping modes under RCMV_DPWM are revealed. Then, the NP voltage is controlled by selecting proper clamping mode. The realization of RCMV_DPWM is also discussed. Moreover, the performances of RCMV_DPWM are analyzed and compared with other PWM strategies in term of the NP voltage ripple, switching loss, and waveform quality. Finally, the feasibility and superiority of RCMV_DPWM are verified by experiments. [ABSTRACT FROM AUTHOR]

In this paper, the zero sequence circulating current in open winding permanent magnet synchronous machine (OW-PMSM) drives with common dc bus is systematically analyzed for the first time. It is revealed that the zero sequence circulating current is affected by zero sequence back-electromotive force, cross coupling voltages in zero sequence from the machine side, pulse-width modulation induced zero sequence voltage, and inverter nonlinearity from the inverter side. Particularly, the influences from the cross coupling voltages in zero sequence and parasitic effect of inverter nonlinearity are investigated for the first time in this paper. Then, the synthetic model of the equivalent zero sequence circuit is proposed as well. Each cause is studied independently via analytical modeling, finite element analysis, and experiments. Meanwhile, to tackle this issue, the relevant suppression strategy using frequency adaptive proportional resonant controller is presented and tested on the 3 kW OW-PMSM platform. [ABSTRACT FROM AUTHOR]

Rotor position estimated with high-frequency (HF) voltage injection methods can be distorted by voltage errors due to inverter nonlinearities, motor resistance, and rotational voltage drops, etc. This paper proposes an improved HF square-wave voltage injection algorithm, which is robust to voltage errors without any compensations meanwhile has less fluctuation in the position estimation error. The average position estimation error is investigated based on the analysis of phase harmonic inductances, and deduced in the form of the phase shift of the second-order harmonic inductances to derive its relationship with the magnetic field distortion. Position estimation errors caused by higher order harmonic inductances and voltage harmonics generated by the SVPWM are also discussed. Both simulations and experiments are carried out based on a commercial PMSM to verify the superiority of the proposed method and the investigations in this paper. [ABSTRACT FROM AUTHOR]

This paper studies pulse width modulation (PWM) techniques suitable for a four-level five-phase open-end winding (OeW) drive. The drive comprises a five-phase induction machine, supplied using two two-level voltage source inverters with isolated and unequal dc-link voltages, in the ratio 2:1. A decoupled carrier-based (CB) PWM modulation strategy, based on unequal voltage reference sharing between the two converters, is introduced in this paper. The stability of dc-link voltages in OeW drives is investigated next, using a novel analysis technique. Several modulation methods are analyzed and the results show that application of the coupled PWM technique, with carriers having in-phase disposition, leads to overcharging of the capacitor in the dc-link of the inverter intended to operate with the lower dc-link voltage. On the other hand, the proposed decoupled CB PWM scheme naturally eliminates the dc-link capacitor overcharging problem. These findings are verified experimentally, using open-loop V/f control. Two different decoupled CB modulation methods are compared and the best performing modulation method is selected and incorporated further into an OeW drive with field-oriented control. The presented steady state and transient experimental results demonstrate that the decoupled CB PWM technique is suitable for high-performance variable speed drive applications. [ABSTRACT FROM AUTHOR]

This paper proposes a multilevel series compensator (MSC) to deal with voltage sags/swells, harmonic compensation, or reactive power compensation. Such a device can be considered as a dynamic voltage restorer or a series active power filter (Series-APF). The MSC can improve the power quality of loads located in stiff systems. The configuration is based on three-phase bridge (TPB) converters connected by means of cascaded single-phase transformers. This arrangement permits the use of a single dc-link. A generalization for $K$ -stages in which $K$ -transformers are coupled with $K$-TPB converters is presented. The topology permits generating a high number of levels in the voltage waveforms with a low number of power switches in comparison with a classic topology. The multilevel waveforms are generated by the converters through a suitable pulsewidth modulation (PWM) strategy that takes into consideration the transformer turns ratios. Modularity and simple maintenance make the proposed MSC an attractive solution compared with some conventional configurations. Model, PWM strategy, and overall control are discussed in this paper. Simulation and experimental results are presented as well. [ABSTRACT FROM PUBLISHER]

This paper aims to improve the full speed sensorless drive for permanent-magnet (PM) synchronous machines on the region of initial zero speed and the region of medium speed. At zero and low speed, the saliency-based drive using the square-wave voltage injection has demonstrated the comparable performance to the sensor-based drive using the encoder with hundreds of pulses per revolution. For PM machines at initial state, the magnet polarity is typically identified based on the injection of voltage pulses before the saliency-based drive. Instead of pulses injection, this paper directly adds the polarity detection capability in the saliency-based drive by superimposing the same square-wave voltage. A fast detection period and negligible current spikes are benefits for the drive using the same square-wave injection voltage for both the polarity detection and position estimation. At medium speed, electromotive force voltage can be estimated to replace the saliency for the sensorless drive. To achieve a smooth operation between two estimation methods, a transition algorithm is also proposed based on a single-phase-lock loop by blending two feedback position signals. According to the experimental evaluation, the reduced power consumption as well as the smooth switch between two different drives is achieved. All the sensorless methods are verified by an interior PM machine with a saliency ratio of 1.37 (Lq/ Ld\,= \,1.37 ). [ABSTRACT FROM AUTHOR]

This paper presents a pulse width modulation (PWM) technique for the minimization of the leakage current in the grid-connected/stand-alone transformerless photovoltaic (PV)-cascaded multilevel inverter (CMLI). The proposed PWM technique is integrated with the MPPT algorithm and is applied to the five-level CMLI. Furthermore, using the proposed PWM technique the high-frequency voltage transitions in the terminal and common mode voltages are minimized. Thus, the proposed PWM technique minimizes the leakage current of the PV array and electromagnetic interference filter requirement in the system without addition of any extra switches. Furthermore, this paper also presents the analysis for the terminal voltage across the PV array and the common mode voltage of the inverter based on the switching function. Using the given analysis, the effect of the PWM technique can be analyzed, as it directly links the switching function with the common mode voltage and leakage current. Also, the proposed PWM technique requires reduced number of carrier waves compared to the conventional sinusoidal pulse width modulation technique for the given CMLI. Complete details of the working principle and analysis with the support of simulation and experimental results of the proposed PWM technique are presented in this paper. [ABSTRACT FROM PUBLISHER]

In transformerless high-power pulse width modulation (PWM) current-source drives, common-mode inductor is implemented to attenuate the common-mode voltage (CMV). However, the common-mode inductor is bulky and costly, so that scaling down the size of the common-mode inductor can achieve the system size reduction and efficiency enhancement. The size of the common-mode inductor is mainly related to the maximum common-mode current, which occurs at the resonant frequency of the common-mode circuit when motor speed is low. Previous research demonstrates that 3-segment average-value-reduction (AVR) space vector modulation (SVM) has good common-mode resonance suppression performance by attenuating the third-order CMV from the inverter. However, as studied in this paper, when modulation index of the inverter is lower than 0.4, the performance of 3-segment AVR SVM is affected as the dwell time of zero vector becomes too long to effectively compensate the CMV introduced by the active vectors. To overcome this problem, three modified AVR SVM schemes are proposed in this paper, where the single long zero vector is separated into two segments in the PWM sequence. The working principles, CMV reduction performance, harmonic performance, and switching frequency analysis of the proposed SVM methods are presented in detailed. Experiments are conducted to verify the effectiveness of the proposed methods. [ABSTRACT FROM PUBLISHER]

This paper proposes a dual-space vector control scheme for the open-end winding permanent magnet synchronous motor (OEW-PMSM) drive fed by the dual inverter with a single dc supply. Potential zero-sequence current in the open-end winding drive system has to be considered since it causes circulating current in the winding and leads to high current stress of power semiconductor devices and high losses. Zero-sequence current in open-end winding ac motor drives is usually caused by the zero-sequence voltage, and therefore switching combinations which do not produce zero-sequence voltage are used to synthesize the reference voltage in existing methods. But even so, the zero-sequence voltage can also be produced by the dead time of the inverter. In order to suppress zero-sequence current in the OEW-PMSM drive, a dual-space vector control scheme is proposed and a novel dual-inverter space vector pulse width modulation (PWM) with the zero-sequence voltage reference is employed to regulate system zero-sequence voltage in this paper. Compared with existing dual inverter PWM strategies, the novel algorithm build a regulation mechanism for the zero-sequence voltage. The proposed method is compared with the conventional vector control by simulations and experiments, and the results shown that the proposed scheme can suppress zero-sequence current effectively. [ABSTRACT FROM AUTHOR]

This paper presents the flexible dc capacitor voltages balancing control method for star-connected cascaded H-bridge converters. In this paper, the power flows are analyzed by investigating all the converter's control freedoms. Based on the analyses, users can accomplish the dc capacitor voltage balancing with both negative-sequence current and zero-sequence voltage. These two kinds of control options are further integrated together with the defined weighting factor $K$. The low-voltage ride-through operation of a proposed control method is also discussed in this paper. The control method is verified with a 220-V 1-kVA static synchronous compensators based on the star-connected cascaded H-bridge converters, and the experimental test results show that all the dc voltages are well regulated at the commanded value with different weighting factor $K$. [ABSTRACT FROM AUTHOR]

Magnetically coupled impedance-source (MCIS) networks are recently introduced impedance networks intended for various high-boost applications. It employs coupled magnetic in the circuit to achieve higher voltage gain. Various MCIS networks have been proposed in the literature for myriad applications; however, due to effective role of system modeling in the closed-loop controller design, this paper is allocated to small-signal modeling and analysis of MCIS converters. The modeling is performed by means of the circuit averaging and averaged switch technique. A generalized small-signal derivation is demonstrated for pulse width modulation (PWM) MCIS converters and it is shown that the derived transfer functions can simply be applied to Y-source, Γ-source, and T-source impedance networks. Various transfer functions for capacitor voltage, output voltage, magnetizing current, input and output impedance are derived and have been validated through frequency and dynamic responses of computer simulation results. In addition, a comprehensive analysis has been done for all mentioned PWM MCIS converters regarding their circuit parameters. Furthermore, the effect of considering the equivalent series resistances of capacitor and inductor on the stability margin of MCIS converters is revealed in this paper. Finally, in order to validate the derived transfer functions and to consolidate the perfumed analysis, experimental results are presented for all mentioned MCIS converters. [ABSTRACT FROM PUBLISHER]

Based on the Z-source inverter, this paper proposes a novel commutation torque ripple reduction strategy for brushless DC motor (BLDCM). The proposed strategy employs the same modulation mode in both the normal conduction period and the commutation period, and the commutation torque ripple is reduced by regulating the shoot-through vector and active vector duty cycles. The proposed detection method acquires the end point of commutation by comparing the clamped terminal voltages with reference zero level, and the signal-noise-ratio of the detection is improved by avoiding the attenuation of the terminal voltages. Furthermore, a certain pulse width of the shoot-through vector can not only reduce the commutation torque ripple but also provide a new opportunity to detect the end point of commutation. Moreover, Z-source inverter provides the buck–boost ability for BLDCM drive system, then the dc voltage utilization can be improved, and the safety of the drive system can also be improved. In addition, this paper analyzes the terminal voltages during each vector. The experimental results verify the correctness of the theories and the effectiveness of the proposed approach. [ABSTRACT FROM PUBLISHER]

This paper extends the high-frequency transformer isolation concept to the Z-source (ZS) ac–ac converters and introduces a new family of high-frequency transformer isolated (HFTI) ZS ac–ac converters. The proposed HFTI-ZS converters retain all the benefits of their existing nonisolated counterparts, such as providing a larger range of output voltage with buck–boost functionality, reversing or maintaining the phase angle, reducing the in-rush and harmonic currents, and improving reliability. In addition to these benefits, the high-frequency (20 kHz) transformer (HFT) in the proposed ZS ac–ac converters provides the electrical isolation and safety with high power density as it eliminates the need for bulky and heavy line frequency (50 or 60 Hz) transformer for galvanic isolation, in applications such as dynamic voltage restorers, etc. The dc-blocking capacitor added in series with the HFT results in only ac voltage applied across its windings, which avoids its saturation. Various ZS-based HFTI ac–ac converters are proposed in this paper, and to verify their operation and advantages, example of quasi-ZS (qZS)-based isolated ac–ac converter is considered in detail. The commutation strategy is also developed to achieve the safe commutation, which avoids the current and voltage spikes without using any RC snubber. A 200-W laboratory prototype of HFTI-qZS ac–ac converter is fabricated and experiments are performed to validate the advantages of the proposed ac–ac converters. [ABSTRACT FROM PUBLISHER]

For the case of unbalanced grid voltages, active power of pulse width modulation (PWM) rectifier is reduced due to the current limitation of power switches. Under unbalanced grid voltages, two existing control methods for the PWM rectifier are widely adopted, one for instantaneous active power control, and the other for balanced positive sequence current control. To maximize the PWM rectifier instantaneous active power capability and minimize active power oscillations during voltage dips, a control method combining balanced positive sequence and instantaneous active power control is proposed. The limitations of these two control methods are given, and the fluctuations on active and reactive power using the proposed control method are discussed in detail in this paper. The analysis in this paper is based on p.u. system, and some conclusions are drawn. Corroboration of the expected features of the proposed control method is carried out by means of experiments. [ABSTRACT FROM PUBLISHER]

A modified-virtual-space-vector-based dc-link voltage balancing strategy is proposed in this paper for a three-level inverter. In the proposed strategy, the summation of the three-phase currents for virtual vector needs not to be zero and it also keeps the two capacitor voltages balanced with wider range of load variations. The duty cycles for all the power switches are also derived in this paper using a nearest three-voltage vector scheme. Due to the reduced use of the medium voltage vectors, the proposed control strategy can considerably decrease the neutral-point voltage fluctuation for lower power-factor-based loads as well. Detailed simulation and experimental studies are also carried out to show the effectiveness of the proposed system with a dc-link voltage balancing strategy with permanent magnet synchronous machine. Voltage and current harmonic distortions are also presented with change in modulation index. A Dspace-based real-time operating system is used for real-time implementation with a 6.0-kW surface permanent magnet synchronous motor. [ABSTRACT FROM PUBLISHER]

This paper proposes novel pulsewidth modulation (PWM) schemes for multi-space-vector pulsewidth modulation (MSVPWM), which is used in position sensorless control of interior permanent-magnet synchronous motor drives. The estimation of the rotor position is based on magnetic saliency and employs high-frequency components of voltage and current, which are excited by MSVPWM. The difference between the instantaneously applied voltage vector and the reference voltage vector causes current ripple. Since six or four voltage vectors are generated during a PWM period, the sequences of the error voltage vectors lead to different types of current ripples. In this paper, the proposed MSVPWM schemes employ six sequences for zero-/low-speed operation and 24 sequences for high-speed operation to reduce line current ripple. Experimental results confirm that the proposed MSVPWM schemes lead to significant reduction in harmonic current while maintaining high performance of sensorless estimation. [ABSTRACT FROM AUTHOR]

The increasing interest in multiphase drive systems has led to the extension of inverter topologies and pulse width modulation (PWM) methods from three-phase to multiphase occasions. Carrier-based PWM (CPWM) dominates space vector PWM when the phase number increases, because of its simple computation and modular implementation. Although intensive work has been done on modifying PWM methods to reduce the common-mode voltage (CMV), not enough work has been done on CPWM methods with CMV reduction for multiphase drives. This paper extends the phase-shifted sinusoidal PWM (PS-SPWM) method for five-phase and six-phase two-level voltage-source inverters (VSI) and employs the intersection-plotting method and Fourier analysis to reveal the nature of the CMV. Both experiment and simulation results comply with theoretical analysis that compared with the conventional SPWM, the PS-SPWM can effectively reduce the CMV in peak-to-peak value and RMS value, though it leads to a higher phase current distortion. In addition, the hardware realization of PS-SPWM for multiphase inverters by a distributed control system is presented in this paper. [ABSTRACT FROM AUTHOR]

Two three-level inverters driving an open-end winding induction motor can generate equivalent voltage waveforms as a single five-level inverter-based drive. In addition, it can bring in benefits such as reduced dc-link voltage, less number of devices, and fault-tolerant capability, which is favored in high-power motor drive applications. The main challenge with this type of configuration is the appearance of large zero-sequence current circulating between the two inverters, which generates extra losses in the switching devices and the motor as well as affects the normal operation of the machine. Another challenge is to balance the dc-link neutral point voltage of the two three-level inverters. This paper has proposed a simplified decoupled space-vector pulsewidth-modulation (PWM) strategy to eliminate the averaged zero-sequence voltage in each switching cycle by the placement of redundant vectors of each individual inverter using a time shift. Neutral point voltage balance is further achieved by adjusting the time duration of the redundant vectors. In this paper, it is shown that it is possible to operate this kind of drive configuration with a single dc power supply and achieve averaged zero-sequence voltage elimination and neutral-point voltage balancing at the same time. Experimental results of a 5.5-kW dual three-level inverter drive using the proposed PWM strategy are presented, which validates the control method and drive configuration. [ABSTRACT FROM PUBLISHER]