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The series configuration of fast semiconductor switches seems to be the key component in the high-voltage and fast rising time pulse generation. In this approach, two important issues must be considered. The first is to provide a safe operating condition for the switches in transient intervals. The second is to design a gate drive system with the capability of driving a large number of discrete devices simultaneously. The aim of this paper is to obviate these two requirements. First, different factors affecting the unbalanced voltage sharing between the series switches are discussed. In this investigation, the switch-to-ground parasitic capacitance effect has been recognized as the major effect on the unbalanced voltage sharing in the transient interval. Two schemes for abating this effect are proposed. To solve the unbalanced voltage distribution, the structure with a snubber circuit in the clamp mode operation is suggested. This scheme can be used for any number of switches without destructively affecting their behavior. In addition, the output pulse with a fast rising time could be obtained by the proposed gate drive system. In order to evaluate the operation of the proposed structure, a stacked switch with the voltage capability of 36 kV is tested experimentally. The characteristics of the obtained pulse are the fast rising time (69.5 ns) with the dV/dt of 460 kv/ \mu \texts and the wide range of the pulsewidth adjusting to 0.5–15 \mu \texts . In addition, the voltage variance of the switches level in the series structure is about 10%. [ABSTRACT FROM AUTHOR]

It is difficult to design a standard gate driver for optimal switching control of a static induction thyristor (SI-Thy) because of its unique internal structure and the direct commutation switching characteristic between the gate and cathode terminals during the transient turn-on and turn-off switching phases. Therefore, it is important to develop a simple and effective gate driver for achieving optimal fast turn-on and stable switching operations in an SI-Thy under hard-switching conditions. To achieve faster turn-on switching time with shorter gate delay time, impedance matching between the SI-Thy and the turn-on driving circuit component in the gate driver can be realized with additional circuit modification through this paper. To ensure higher stabilities in the turn-off switching phase, forced commutation techniques and additional auxiliary circuits in the gate driver have been devised to suppress the latchup and to eliminate potential ringing possibility. We have demonstrated that our designed and tested gate driver for realizing optimal switching characteristics of an SI-Thy is effective, particularly in the gate driving circuits for various pulsed-power switching applications. [ABSTRACT FROM PUBLISHER]

This paper describes the operation of a solid-state series stacked topology used as a serial and parallel switch in pulsed power applications. The proposed circuit, developed from the Marx generator concept, balances the voltage stress on each series stacked semiconductor, distributing the total voltage evenly. Experimental results from a 10 kV laboratory series stacked switch, using 1200 V semiconductors in a ten stages solid-state series stacked circuit, are reported and discussed, considering resistive, capacitive and inductive type loads for high and low duty factor voltage pulse operation. [ABSTRACT FROM AUTHOR]