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Voltage-controlled three-phase three-leg inverters are widely applied in various occasions. The inverters are generally switched to the current-controlled mode to limit the fault currents when short-circuit faults happen. Under symmetrical fault, the inverter can be controlled as a symmetrical, three-phase current source. However, the voltage limiting will happen under asymmetrical fault. As a result, the fault phase currents will be distorted and cannot be completely controlled. Considering that the voltage limiting is mainly caused by large load impedance of healthy phase under asymmetrical fault, the voltage limiting is avoided by paralleling the virtual impedance with the output filter capacitor in this paper. As a result, the current limiting loop is not broken and the fault phase currents can be effectively controlled. The implementation of virtual impedance in control system and the influence of virtual impedance on the stability of system are also analyzed in detail in this paper. The theoretical results are validated by experiments. [ABSTRACT FROM AUTHOR]

The modular multilevel converter (MMC), owing to the presence of a large number of submodules (SMs) and energy storing elements, requires a large footprint and initial investment. To address these issues, this paper proposes the switched modular multilevel converter (SMMC). It consists of two major elements; the chain-links (CLs), consisting of cascade connection of SMs as in MMC, and the single-pole-triple-throw (SPTT) switches, which can be realized using either the T-type or NPC-type switch strings. The SMMC works on the principle of connecting all the phase-legs in series and their respective positions are mutually interchanged. It offers a compact structure as the SMs count is reduced to 33% of MMC, which results in a much lower energy storage requirement. Furthermore, it does not have inter-phase circulating current problem and hence the CL inductors can also be avoided. The SMMC structure, operating principles, control, and modulation schemes are explained in detail. A detailed comparison of SMMC with the other major existing converters is carried out to highlight the important features of SMMC. The efficacy of SMMC is validated using PSCAD simulation studies with a 19-level grid-connected SMMC model. A 3-phase 19-level SMMC laboratory prototype is developed to further validate its feasibility. [ABSTRACT FROM AUTHOR]

This paper focuses on the issue of network connectedness (NC) in security-constrained optimal transmission switching problems, which is complicated by branch contingencies and corrective line switching. Two criteria are firstly proposed with the principle of preserving NC as much as possible within reasonable limits. By extending the electrical flow based NC constraints, a proposition is derived to associate different cases of NC with the optimum of a linear program, yielding the mathematical formulation of the NC criteria. By Karush-Kuhn-Tucker conditions, this formulation is further transformed into a tractable version which can be incorporated with existing SCOTS models without affecting the applicability of original solution approaches. Finally, case studies on various networks and SCOTS models demonstrate the efficacy of the proposed approach. [ABSTRACT FROM AUTHOR]

Partial discharge (PD) detection is a fundamental tool for the design and diagnosis of insulation systems, particularly organic materials that must operate throughout their life without PD. While the methods for PD measurements under sinusoidal supply voltage are well-established, the same does not hold under repetitive-pulse voltage waveforms, such as those provided by inverters. Electromagnetic noise generated by electronic switch commutation in inverters can overlap with PD pulses, making it difficult to measure, separate from noise, and identify PD. This is particularly more cumbersome when fast rise-time switches are employed. To address these issues, this paper investigates methods to detect PD pulses on enameled wires under repetitive impulsive voltages with different rise times of 60, 500, and 1000 ns, proposing techniques which allow separation of PD from noise even when they overlap in time and frequency domains. This paper employs a time-domain approach using standard deviation curve acquired from a set of measurements to discriminate PD from repetitive commutation disturbance. These techniques can be implemented to achieve unsupervised noise rejection, which would be an important goal for both offline and online PD testing. The proposed approach is validated successfully through tests carried out on a low-voltage motor. [ABSTRACT FROM AUTHOR]

DC shipboard power systems have been considered as a promising solution for stricter environmental regulations on ships due to their main benefits in fuel savings with variable speed engines and easy integration of energy storage systems. In order to employ the dc solution in the shipboard power systems, the dc power systems have to be protected from a system fault with protection selectivity to minimize impacts of the fault or to avoid other undesirable situations in the system. For low-voltage dc shipboard power systems, a three-level protection has been proposed: 1) fast action (first)—bus separation by solid-state dc bus-tie switch; 2) medium action (second)—feeder protection by high-speed fuse; and 3) slow action (third)—generator–rectifier fault controls. This paper proposes a new method by means of additional bus capacitance added in main dc buses to help reliable operation of the three-level protection. The principle of the proposed method is introduced and the sizing of the additional bus capacitance is addressed in this paper. With the modeling of the dc shipboard power systems, the analyses of voltage drops for the bus separation failure and fault clearing time for the feeder protection are carried out to verify the proposed method. The results show that the proposed method not only mitigates the voltage drop for the bus separation failure, but also achieves the selectivity and the sensitivity for the feeder protection. [ABSTRACT FROM AUTHOR]

This paper proposes a novel polygonal voltage space vector structure (SVS) having 30 sides, for a star-connected induction motor drive. The SVS eliminates the presence of harmonics up to 25th order from motor phase voltage throughout the entire modulation range, providing a torque profile devoid of lower order pulsations. Linear modulation is extended till 99.63% of base speed without exceeding the motor phase voltage rating. Topology consists of a dc-link fed primary inverter and two equal low voltage modular capacitor fed secondary inverters. Here the harmonics generated by the primary inverter is canceled by the secondary inverter which acts as a switched capacitive filter. Detailed description of the SVS generation and timing calculations are provided in this paper. Effectiveness of the proposed scheme is validated using experimental results, inverter loss calculations, and harmonic analysis. [ABSTRACT FROM AUTHOR]

First harmonic analysis (FHA) is arguably the most widely used analytical technique for wireless power transfer (WPT) circuits due to its simplicity. Although FHA can provide closed-form solutions, the existence of rectifier diode forward voltage drop and higher order harmonics, especially the second and third harmonics at variable duty cycle operation, can significantly deteriorate its accuracy. This paper presents an accurate and efficient method called enhanced multiple harmonic analysis (eMHA) for the optimal design and optimal control of WPT systems. The eMHA method considers the nature of nonlinear rectification networks under nonsinusoidal current and reexamines the concept of the equivalent load. As a result, the rectified WPT system is transformed into a series of linear systems with complex load impedances. The steady-state electric quantities can be then explicitly calculated. This enables eMHA to seamlessly work with numerical optimization algorithms to facilitate the automated design and optimization of WPT systems. An example of optimal design and optimal control of a 10 W WPT system is demonstrated. The results obtained by eMHA and FHA are also compared. A prototype of the designed circuit was constructed. The accuracy and effectiveness of eMHA are verified by experimental measurements. This paper is accompanied by a MATLAB-based analytical tool with a graphical user interface demonstrating the effects of circuit variables on electrical quantities and waveforms. [ABSTRACT FROM AUTHOR]

This paper proposes a fifth-order resonant immittance network based dual-active-bridge (DAB) converter and an optimal modulation method that will ensure high-efficiency operation of the converter under wide-range variations in voltage ratio and output power level. The proposed modulation method is based on the concept of total power loss minimization, where a loss model is developed and an optimization algorithm is formulated to compute the optimal set of internal and external phase shift parameters that will lead to the maximum efficiency for a given set of operating parameters including voltage ratio and output power level. It is found that to maintain high-efficiency operation under wide-range variations in voltage ratio and output power level, the DAB converter is required to switch between different operation modes and neither soft-switching operation nor unity-power-factor operation is able to achieve wide-range high efficiency performance when used alone. The importance of $reconfigurability$ of operation mode for achieving wide-range high efficiency performance is clearly illustrated in this paper. [ABSTRACT FROM AUTHOR]

In this paper, many impedance-source inverters with coupled inductors have been investigated to obtain a high step-up boost ratio. However, the leakage inductors in these topologies induce great voltage spikes at the dc link, which will increase the voltage stress of switches. Thus, the power level of inverters is limited. Furthermore, the efficiency of the inverters can be degraded by the losses associated with leakage inductors. To address abovementioned issues, this paper proposes a family of low-spike high-efficiency Y-source inverters. The proposed inverters have the ability of eliminating voltage spikes at the dc link and recycling the leakage energy via the additional diode and capacitor. In order to show the excellent characteristics of the proposed topologies, this paper compares the performances of the proposed inverters and the improved-Y-source inverter in many aspects. Simulation and experimental results have verified the abilities of the proposed inverters. [ABSTRACT FROM AUTHOR]

A space vector modulation (SVM) technique of a dual-inverter system for an open-end winding motor drive is described in this paper, where one inverter has a battery power source and the other has an only capacitor across the dc bus. The SVM must be achieved to operate the motor with field-oriented control and simultaneously to control the capacitor voltage at a constant value by using redundant switching states of the dual-inverter system. The control of the capacitor voltage is carried out by selecting a charging or a discharging mode in each redundant switching state, taking the instantaneous motor power factor into account. In addition, it is also required to reduce the error voltage pulses, which are generated in output multilevel voltage waveforms during the dead time. The compensation method of the existing dead-time scheme and the improved SVM sequence to reduce the error voltage vectors are proposed in this paper. The proposed methods are examined through several experimental tests and are confirmed to generate superior output voltage waveforms from the viewpoint of the measured total harmonic distortion and dv/dt. [ABSTRACT FROM AUTHOR]

This paper presents a novel seven-level inverter topology for medium-voltage high-power applications. It consists of eight active switches and two inner flying capacitor (FC) units forming a similar structure as in a conventional active neutral-point-clamped (ANPC) inverter. This unique arrangement reduces the number of active and passive components. A simple modulation technique reduces cost and complexity in the control system design without compromising reactive power capability. In addition, compared to major conventional seven-level inverter topologies, such as the neutral point clamped, FC, cascaded H-bridge, and ANPC topologies, the new topology reduces the dc-link voltage requirement by 50%. This recued dc-link voltage makes the new topology appealing for various industrial applications. Experimental results from a 2.2-kVA prototype are presented to support the theoretical analysis presented in this paper. The prototype demonstrates a conversion efficiency of around 97.2% ± 1% for a wide load range. [ABSTRACT FROM AUTHOR]

This paper investigates a Vienna rectifier as a charger for series-connected battery packs. Focusing on carrier-based pulsewidth modulation (CBPWM), the ripple current flowing through the neutral point (NP) results in the voltage oscillation if the loads are resistive. To reduce the ripple of average NP current with mitigated distortion under balanced and unbalanced dc-link voltages conditions, a novel CBPWM with segmented component injection scheme (SCIS) is proposed in this paper. After dc component injection, continuous intervals for optimized component injection and clamping intervals for compensation component injection are identified. Optimized components are calculated originally based on unbalanced factor to make the average NP current zero-size in one switching period. Moreover, unique compensation components generate suitable NP current to shape the sinusoidal input currents according to the circuit analysis. In consequence, the SCIS not only keeps the input current with low-harmonic distortion, but also minimizes the oscillation of dc-link voltage under balanced and unbalanced conditions. In addition, the value of the NP current during the clamping intervals is analyzed under various operating conditions. The effectiveness and the performance of the proposed SCIS are verified by simulation and experiments. [ABSTRACT FROM AUTHOR]

This paper presents a neutral-point deviation and ripple compensating control method applied to a three-level neutral-point-clamped (NPC) converter. The neutral-point deviation and its harmonic components are analyzed with a focus on the average current flowing through the neutral-point of the dc link. This paper also proposes a control scheme compensating for the neutral-point deviation and dominant harmonic components under generalized unbalanced grid operating conditions. The positive and negative sequence components of the switching functions and ac input currents are employed to accurately explain the behavior of three-level NPC converter. Simulation and experimental results are presented to verify the validity of the proposed method. [ABSTRACT FROM AUTHOR]

In this paper, a single-inductor dual-output (SIDO) dc–dc converter is proposed. The significant feature of the proposed converter is feeding a constant power load in low-voltage side (LVS) port, where even feeding a variable load at LVS does not have any cross regulation to high-voltage side port with the desired approximation. Magnificently, both merits are obtained in open-loop manner, which is an outstanding characteristic in comparison with that of the existed converters. In this paper, soft commutation and soft switching of switches and diodes are investigated along with the aforementioned main novelty. Moreover, detailed theoretical analyses of the proposed SIDO dc–dc converter in continuous conduction mode are presented besides the comparisons with some other structures. Finally, theoretical analyses are verified through a 1500 W experimental prototype results. [ABSTRACT FROM AUTHOR]

In this paper, a series-capacitor-based interleaving buck power factor correction (PFC) converter is proposed, the intermediate energy storage capacitance of which is operated at discontinuous capacitor voltage mode (DCVM), and automatic power factor (PF) correction for this converter is obtained. Moreover, the voltage across the series capacitor of the proposed PFC converter is clamped at the input voltage, and thus peak voltage stress existed in the traditional DCVM buck PFC could be relieved. By effectively regulating the charge/discharge time for the series capacitor, ultrahigh step-down conversion ratio of the proposed converter is achieved, the conversion ratio of which is independent of the duty cycle and only related to the switching frequency and circuit parameters. Therefore, high PF can be obtained due to very narrow deadtime of the input current. Meanwhile, the proposed PFC converter can realize the soft turn-on of part power switch and soft turn-off of part power diodes. In addition, comparing with the traditional discontinuous inductor current mode PFC, the input current of the proposed PFC converter is continuous so that the peak value and root-mean-square value of input current can be reduced. The operational principle, performance analysis, and parameter design principle are given in this paper. The analysis results show that the PF and total harmonic distortion are also independent of the duty cycle. Finally, a 220-Vac input, 60 W/15 V output experimental prototype is built to verify the validity of the theoretical analysis. [ABSTRACT FROM AUTHOR]

In low-power applications of photovoltaic (PV) systems, the transformerless grid-connected inverters have been preferred to increase the efficiency and reduce the cost, size, and power losses when they are compared to the ones with the transformer. A transformerless single-phase inverter topology with a single dc-link capacitor for the grid-connected PV systems is proposed in this paper. The proposed inverter has been simulated by using a cooperation process of the MATLAB and SPICE package programs and it has been implemented for experimental verification. The proposed inverter reduces the high-frequency common-mode leakage current caused by parasitic capacitances of PV panels, whereas it is controlled with the unipolar sinusoidal pulsewidth modulation. Also, the results show that the common-mode voltage remains constant. The efficiency of the proposed inverter has been compared to that of the most common topologies having the dc-link decoupling during the zero voltage states. This paper is accompanied by a video file demonstrating the power loss distribution in the inverter. [ABSTRACT FROM AUTHOR]

This paper describes a dc-link voltage control method of a single-phase back-to-back cascaded H-bridge inverter (SBCI) for a medium-voltage motor drive system. The main advantage of the SBCI topology over the conventional regenerative cascaded H-bridge topology with a three-phase active front-end (AFE) is a simple system structure, which is composed of an input transformer, a power cell, a current sensor, etc. However, the challenging points of the SBCI are larger voltage ripple in the dc-link capacitor and imbalance of dc-link voltages of each phase. The asymmetric dc-link voltage of each power cells could cause unstable operation such as over-modulation due to the lack of the dc-link voltage of a particular phase and result in over-voltage or under-voltage faults. In this paper, the control strategy of the dc-link voltage for the SBCI that uses the negative-sequence voltage of the converter is described. The proposed control method is verified with a computer simulation whose target is a 6.6-kV–1.25-MW medium-voltage drive system. Also, through the experimental setup with the prototype SBCI whose power rating is 16.2 kVA, the dc-link voltage of each AFE has been controlled within a 0.5% error of its reference value at the full load. [ABSTRACT FROM AUTHOR]

This paper presents Space Vector Modulation (SVM) sequences that reduce Common Mode Voltage (CMV) in Dual Three-phase Asymmetrical Induction Motor (DTAIM). At first, two existing SVM techniques such as Reference SVM (RSVM) and CMV1 are studied. Additionally, three new switching sequences are developed as CMV2, CMV3 and DCMV3, which reduce peak magnitude of CMV by 66.8% in comparison with RSVM technique. In SVM techniques, to obtain least CMV, zero vectors are usually replaced by two opposite large Active voltage Vectors (AV) with equal time duration. In such topologies like CMV1, total six AVs are utilized to synthesize the reference vector. The proposed SVM technique CMV2 utilizes only five large AVs to synthesize the reference vector and reduces CMV. Selection of five neighbouring AVs is reflected in reduction of harmonic flux trajectories and stator current ripple in proposed techniques. Additionally, two more switching sequences (CMV3 and DCMV3) are developed related to utilization of specific zero voltage vectors in all sectors (7 and 56) that produce zero CMV. These two switching sequences also provide easy implementation feature during the development of c-code program. In this study, CMV and stator current ripple are considered as performance parameters for different SVM techniques. All SVM techniques are analysed by analytical results, computer simulations, and using prototype test setup of DTAIM fed by Dual Three-phase Voltage Source Inverters (DTVSIs). [ABSTRACT FROM AUTHOR]

This paper proposes a capacitor voltage regulation method for the dual converter with a floating bridge for aerospace applications. This topology has previously been reported, but with a constrained voltage utilization factor due to the need for capacitor voltage regulations. In this paper, the effect of switching states on the voltage variation of capacitor is quantitatively modeled and an enhanced space vector modulation scheme with current feedback is proposed to achieve an active control of the floating capacitor voltages. This proposed method also allows further exploitation and utilization of converter voltage. The relationship between the allowed modulation index of dual converter and load power factor is obtained and expressed using a fitted polynomial equation. The advantages of the proposed method include boosted voltage utilization and superior performance in term of capacitor voltage balance. These advantages have been proven through simulation and experimental results on RL loads as well as with an open-end winding induction motor. The proposed modulation scheme can boost the converter voltage utilization by at least 10% while achieving full four-level operation. More importantly, the higher available voltage allows extending the constant torque region of the motor, the further beginning of field weakening operation could be postponed. [ABSTRACT FROM AUTHOR]

This paper proposes a visible light communication (VLC) system consisting of a single-stage buck–boost power factor correction converter operating in the discontinuous conduction mode with dimming capability. Additionally, this paper proposes the on–off M-frequency shift keying modulation for the VLC system. This modulation allows for the transmission of more than a single bit for each switching period without affecting the dimming characteristics of the light-emitting diode luminaire. The design of the whole system is discussed in detail, including both transmitter and receiver modules. A 20-W laboratory prototype was built in order to verify the proposed modulation scheme. The experimental evaluation showed a good performance of the transmitter, which was able to perform simultaneously the desired functions, namely power factor correction, dimming, and data transmission. The receiver also achieved the desired performance with a low bit error rate (BER). The results showed that the proposed system was able to transfer data between emitter and receiver with a bit rate of 1.11 Mb/s at a frequency of up to 375 kHz over a distance of 10 m, and with a BER lower than $10^{-3}$ under the influence of external lighting sources with illuminance levels up to 500 lx. [ABSTRACT FROM AUTHOR]

The extra-LC auxiliary-resonant-snubber-based converter (ELCARSC), as a soft-switching converter, has the advantages of low switching loss, low electromagnetic interference noise, and low-output distortion caused by the dead-time effect. However, the dead-time effect is still the main problem in a high-precision application. Besides, the traditional control and compensation methods rely on the accuracy of the circuit parameters, especially the junction capacitance, thus resulting in compensation error. Therefore, this paper proposed a novel high-precision control method through modulating the initial resonant current to eliminate the dead-time effect of ELCARSC. The method does not need complicated online calculation and reduces the dependence on the accuracy of the circuit parameters, especially the influence of the junction capacitances of the switches. In this paper, the dead-time effect of the ELCARSC is analyzed. The output voltage error with the conventional variable-timing control method is analyzed. Subsequently, the proposed modulated initial resonant current control is introduced. Finally, a prototype was developed that verified the effectiveness of the control method. The quality of the output current and voltage is improved by utilizing the proposed control method. However, the peak current of the auxiliary switch is increased. [ABSTRACT FROM AUTHOR]

A trinary multilevel converter uses a few heterogeneous H-bridge submodules (SMs) to synthesize an output voltage with multiple levels. Two major limitations of this converter are that it needs multiple dc sources and it cannot operate under pulsewidth modulation (PWM). This paper addresses these limitations by adding a low-voltage H-bridge SM to this converter and proposing a new switching algorithm. The resulting PWM-based asymmetric cascaded H-bridge converter uses only one dc source and synthesizes a high-quality output voltage. This improved converter can be a potential choice for real and reactive power support in power system applications. This paper also proposes methods for stability analysis and design of this converter. Experimental case studies evaluate the performance of the proposed converter for both standalone and grid-connected modes of operation. [ABSTRACT FROM AUTHOR]

This paper discusses electrical distribution for refrigerated containers (reefers) in port terminals, characterized as parks of uniform distributed loads. Power systems of uniform distributed loads need configurations with modularity whenever possible, to ensure an easier installation, operation, and maintenance with significant cost reductions. This paper shows what has been the practice at ports in the past to provide Low Voltage (LV) supply to reefers from medium voltage (MV)/LV substations to cluster of reefer outlets panel with group of outdoor receptacles, used to connect power supply cord to each reefer. In the new method of power distribution system for the reefers, it is suggested to use a main MV underground distribution and portable containerized MV/LV transformer substations with close coupled LV distribution panel including reefer outlets. This potable power supply unit can be installed inside the reefer racks to supply locally a modular LV distribution to the reefers. This new method of supplying power to reefer racks has benefits over the past practice. It can offer a relevant flexibility for expansions and endorses development of new fitting components. [ABSTRACT FROM AUTHOR]

The planned China fusion engineering test reactor (CFETR) needs one or more negative-ion-based neutral beam injectors (N-NBIs) with a beam energy of 500 or even 1000 keV. In order to prepare for CFETR, a prototype of CFETR N-NBI is being designed. The prototype needs an acceleration grid power supply (AGPS) rated at 200 kV/25 A with a maximum pulselength reaches to 3600 s. The AGPS adopted a single-stage inverter-type high-voltage power supply (HVPS). The output voltage ripple is an important specification of the AGPS, which can affect the efficiency and stability of N-NBI system by influencing the beam divergence. However, the conventional methods cannot be used to limit the output voltage ripple of the inverter-type HVPS used as AGPS of CFETR N-NBI prototype. This paper simplified the AGPS to an insulated three-phase three-level (TPTL) dc–dc converter connected with a dual dc link. The working process of the TPTL dc–dc converter with duty-cycle modulation has been analyzed, and two main continuous conduction modes are described. The influence of key parameters such as duty cycle of inverter, leakage inductance of transformer, and output current on output voltage ripple is analyzed. Based on the analysis results, a so-called combined control strategy was proposed to keep the output voltage ripple at a level. The proposed strategy is suitable for the cases where the object output voltage is below 175 kV. Some simulations were carried out by using MATLAB/Simulink. The results showed that the analysis in this paper is reliable and the proposed control strategy has a good performance. [ABSTRACT FROM AUTHOR]

This paper analyzes the effects of shunt capacitors installed on the low voltage sides of 10/0.4 kV distribution transformers on the operation of these transformers. Using the results of an extensive measurement campaign, this paper compares: real and reactive power losses, secondary-side current, and primary-side apparent power before and after the installation of transformer capacitors. The following four cases of reactive power compensation are considered and discussed: adequate, conditionally adequate, and total compensation, as well as overcompensation. The presented analysis helps to identify transformer substations where the initial compensation should be changed or adjusted, in order to improve transformers’ operational performance. Voltage dependencies of real and reactive power demands of the transformer-supplied loads are taken into account, based on the previously identified load characteristics in the considered networks as well as voltage dependence of reactive power of shunt capacitors. The result with and without including these voltage dependencies in the analysis is compared and discussed. [ABSTRACT FROM AUTHOR]

This paper proposes a novel dc power electronic transformer (DCPET) topology for locomotive, ac/dc hybrid grid, dc distribution grid, and other isolated medium-voltage and high-power applications. Compared with conventional PET topology, the proposed DCPET has fewer power semiconductor devices and high-frequency isolation transformers, which can improve the power density and reliability. Fault handling or redundancy design can be achieved to further improve the reliability when some dc–dc modules break down. Also, input voltage sharing control can be omitted to simplify the control system and improve the stability. Meanwhile, soft switching is guaranteed for all the switches, which is beneficial to increase switching frequency and improve power density. In this paper, the principle, evolution, and control of the proposed DCPET are respectively presented and studied in detail. Finally, a prototype of the proposed DCPET is built and the experimental results verify the validity and superiority of the proposed topology. [ABSTRACT FROM AUTHOR]

This paper proposes a novel method for instantaneous balancing of neutral-point (NP) voltages with stacked multilevel inverters (MLIs) for variable-speed drives. The stacked MLI uses series-connected dc sources and NPs (connecting points of dc sources) to obtain the desired levels. The balancing of NP voltages are obtained by using a low-voltage-capacitor-fed cascaded H-bridge (CHB) per phase of a symmetrical six-phase induction machine (IM), which ensures zero current drawn from NPs (at any given instant). Since no current is drawn from NPs, the single dc-link operation with stacked capacitors is also possible. The scheme is suitable for applications, where low-voltage dc sources and batteries are stacked to form a dc link. A variable-speed operation is done using a seven-level inverter scheme for a symmetrical six-phase IM, which is formed by three dc-link stacked capacitors cascaded with two low-voltage-capacitor-fed CHBs per phase. Furthermore, the method is extended for an open-end IM to obtain a seven-level common-mode eliminated space vector structure using a single dc link. The generalization of this method for any stacked $n$ -level inverter without NP voltage deviation is also presented in this paper. The experimental results and analysis are included to validate the proposed method. [ABSTRACT FROM AUTHOR]

This paper introduces an averaging control strategy of the phase-unit losses of modular multilevel converters (MMCs). The quantitative analysis of the MMC phase-unit loss distribution under unbalanced ac conditions is carried out by investigating the individual component of the MMC arm currents. It shows that the unbalanced arm currents will result in unbalanced phase-unit losses. To address this issue, this paper proposes a predictive closed-loop-control-based zero-sequence voltage injection method that results in much averaged loss distribution under unbalanced ac conditions. The essence of the new method is that it adjusts the three-phase sinusoidal references so that the unbalanced arm currents are fully utilized to average phase-unit losses. This paper shows the effectiveness of the new approach by electromagnetic transient simulations on PSCAD/EMTDC. [ABSTRACT FROM AUTHOR]

The hybrid switch concept of paralleling a higher-current main Si IGBT and a lower-current auxiliary SiC mosfet offers an improved cost/performance tradeoff in power converters. Currently, the gate control strategy of these two internal devices emphasizes on minimizing the total power loss, and is referred to as the efficiency control mode in this paper. However, there is a serious risk of overheating and reliability degradation of the SiC mosfet if solely relying on this control strategy. In this paper, we propose a new method of gate control optimization, referred to as the thermal balance control mode, to keep the junction temperature of both devices within the specified temperature range, and to minimize the total power loss simultaneously. We first investigate the dependency of the hybrid switch switching losses on the gate control pattern both theoretically and experimentally. We then extensively study control optimization in these two distinct control modes in a dc–dc boost converter. It is found that the thermal balance control mode can achieve almost the same total power loss as the efficiency control mode, but much lower and more balanced junction temperatures of the two internal devices. Experimental results demonstrate that the Si/SiC hybrid switch in an optimal thermal balance control mode can achieve a 163% higher power handling capability in the 20-kHz boost converter or four times higher switching frequency in the 4-kW boost converter than a single IGBT solution with hard switching condition, and yet a considerably lower component cost than a single SiC mosfet solution in the boost converter. [ABSTRACT FROM AUTHOR]

This paper discusses a novel methodology to increase the voltage droop compensation range in generalized solid-state bipolar high-voltage Marx modulators with one resonant stage. To maintain the modularity characteristic of bipolar Marx modulators, the imbedding of additional resonant stages is not straightforward. Nevertheless, this paper proposes to add a second resonant stage to the already existing resonant-type voltage droop compensation stage. This second stage increases the voltage droop compensation percentage of a generalized solid-state bipolar Marx generator. The compensation of the bipolar pulse voltage droop is now achieved by adding two auxiliary synchronous compensation resonant voltages, to the output capacitive decaying voltage. Simulation and experimental results are presented for six Marx plus two resonant stages, 16% voltage droop, with 3-kV pulse amplitude, 100- $\mu \text{s}$ pulsewidth, 40-ms relaxation time, and 10-Hz pulse repetition rate. [ABSTRACT FROM AUTHOR]

This paper proposes a high-efficiency single-phase T-type boundary conduction mode (BCM) microinverter. The conventional full-bridge BCM microinverter has achieved zero voltage switching (ZVS) and thereby improved the efficiency, but it suffers from high switching losses under light load conditions. The proposed T-type BCM microinverter reserves ZVS and uses a multilevel technique to further decrease the switching losses. The BCM operation with multilevel technique will have too low switching frequency when the grid voltage approaches half of the dc link voltage. To solve this problem, this paper adopts a third operation mode for the T-type switching leg to maintain the switching frequency above a minimum value. The corresponding mode transitions are also detailed to ensure a smooth operation. Because of the turn-offdelay of the freewheeling transistor, the actual lower current boundary deviates from the programmed one, which will distort output current. To address this issue, this paper also proposes a boundary compensation method. A prototype has been built for performance verification, which can test both full-bridge and T-type topology. Compared with the full-bridge BCM microinverter, the proposed T-type BCM microinverter has a higher efficiency over the whole load range. [ABSTRACT FROM AUTHOR]

This paper proposes data transmission method between primary and secondary of the flyback converter without additional communication circuit while simultaneously transferring power. In some application such as a battery charger, the data exchanges between the primary and secondary sides are necessary. In the conventional system, an additional line or wireless communication modules is used for data exchanges, thereby increasing the system and connector size. The proposed system, in comparison, does not use additional signal transceiver but instead exchanges data by simply alternating operation mode of the flyback converter, thus adding communication function while not increasing the volume of the terminal and overall system. The waveform of transformer voltage is used to count the number of resonant pulses, which is used for decoding and encoding the data packet. Bidirectional communication between primary and secondary sides is possible while power is transferred to the output using an appropriate communication protocol. This paper proposes data transmission method for both single output and the multioutput cases. Also, both half-duplex and full-duplex communication using the proposed method is explained. The experimental results are presented to verify the performance of the proposed communication method. [ABSTRACT FROM AUTHOR]

In this paper, a new soft-switching bridgeless single-phase power factor correction (PFC) converter is presented and analyzed. Employing an auxiliary switch, the input current dead angle that is the main drawback of the existing buck-type PFCs is omitted, and thus, the power factor (PF) is improved, which is the main contribution of the paper. Proposed PFC converter operates under discontinuous conduction mode (DCM) and draws sinusoidal input current from power supply inherently. All switches and diodes are turnedonandoffunder soft switching, which leads to low switching losses and elimination of diode reverse recovery problems. Also, minimum numbers of semiconductor devices are in the power flow path that reduce the conduction losses. A 120-W laboratory prototype is implemented and experimental results verify the validity of theoretical analysis and show efficiency of 92.1%. In addition, total harmonic distortion (THD) of 3.3% is achieved and the input current harmonics complies with IEC61000-3-2 Class D requirements. [ABSTRACT FROM AUTHOR]

This paper presents the digital implementation of a boundary controller with unipolar switching characteristic for single-phase voltage source full-bridge inverters. This paper expands the application of a second-order switching surface-based control method to unipolar switching of single-phase voltage source inverters (VSIs) using a finite-state machine. The finite-state machine has been formulated considering four different states of the inverter; positive,zero1, negative, andzero2. The second-order boundary control governs the current state of the system and provides proper switching action to keep the system within the desired reference. The control law is implemented digitally in F28m35x digital control card. A full-bridge inverter topology is used to achieve the three-level voltage switching. Various simulations and experiments were performed in a 550 VA, 120 V, 60 Hz VSI with a digitally implemented controller to verify the theoretical predictions. A high-quality voltage output was obtained for various loading conditions. The transient performance of the controller was investigated using a reference and load changes. A comparison of the implementation was made with the existing classical controllers to verify the fast-dynamic response of the system. [ABSTRACT FROM AUTHOR]

A high step-up dc–dc converter is proposed in this paper. The presented converter benefits from some advantages such as high voltage gain and continuous input current, which makes it suitable for the renewable energy applications. The presented converter is based on the SEPIC converter. However, the converter voltage gain is improved by employing a coupled inductor and two voltage multipliers. A passive clamp circuit is also added to the proposed converter that increases the voltage gain and reduces the voltage stress on the main switch. Thus, a switch with low $R_{{\text{DS(on)}}}$ will be needed that decreases the conduction loss. Besides, the voltage stress on the output diode in the proposed converter is reduced, which alleviates reverse recovery problem. The steady-state analysis of the proposed converter is discussed in this paper. The analysis is verified with experimental results under the output power of 245 W. [ABSTRACT FROM AUTHOR]

Inductive power transfer systems deployed in material handling have traditionally used parallel-tuned (current-sourced) boost regulators to independently control and regulate the load on each secondary. This paper evaluates the current doubler as an alternative parallel-tuned secondary controller within this application to better match the current and voltage requirements in the secondary resonant tuning network in high-power applications. This enables designs that enable the secondary magnetic pickup to achieve a smaller profile and fit within typical space constraints of material-handling vehicles. This paper presents the design approach needed for this regulator and compares its operation and performance against a traditional boost controller using both the simulation and the measurement of two built 5-kW secondary regulators. The current doubler naturally achieves a lower output ripple due to its interleaved switching and is found to have a comparable efficiency to the boost controller but requires slightly more components. [ABSTRACT FROM AUTHOR]

Achieving high efficiency and high power density features of intermediate bus converter (IBC) in data center application is very critical. This paper proposes a nonisolated switched-tank dc–dc converter (STC) to meet the high requirement of IBC. The proposed STC has fixed voltage conversion ratio. Theoretical analysis provides the guideline for designing resonant tank and nonresonant tank as well as selecting proper deadtime for the proposed circuit. With resonant operation feature of the proposed circuit, zero current switching is realized on all switching devices to help the high-efficiency operation of the proposed converter. Through the proposed design methodology in this paper, power loss on switching devices and planar inductors can be minimized. In addition, detailed power loss analysis and breakdown provide hints for further efficiency improvement. Simulation has been performed to validate the operating principle of the proposed STC. A designed 6x STC (450 W nominal/600 W maximum) based on eGaNFETs is demonstrated. With 54 V typical input voltage, the output of the 6x STC is 9 V. The GaN-based prototype achieves a peak efficiency of 98.55%. Also, it achieves 97.18% efficiency and 750 W/in3 power density at 450 W. [ABSTRACT FROM AUTHOR]

This paper presents a study of the losses in the integrated buck–flyback converter (IBFC) used as high-power-factor LED driver. The aim of the study is to investigate the possibilities of increasing the efficiency of the IBFC converter. The procedure of the improvement is done by obtaining the equations of the current through each component in terms of converter parameters. The current is found in an average value or rms value, depending on the type of the parasitic component, whether it is modeled by a parasitic forward voltage source or by a parasitic resistance, respectively. Using these equations and the parasitic model, the losses of each element of the converter are estimated. This paper proposes a technique to increase the efficiency of the IBFC by redesigning the converter parameters. Furthermore, this paper presents a case of study with a step-by-step efficiency enhancement process of an existing driver. The driver is operating under universal input conditions, and 38 V output, supplying an LED luminary of 26.5 W. The new design shows an improvement of the efficiency from 82% in the old design to 89% in the proposed one. Moreover, the new design shows an improvement in the power factor and the THD and a 50% reduction in the output current ripple. Furthermore, a reduction in the number of components has been achieved, as it is found by the analysis that by adjusting the converter parameters, one diode can be removed. Finally, the presented methodology is explained in detail so that it can easily be applied to other dc–dc converters. [ABSTRACT FROM AUTHOR]

This paper proposes a novel discontinuous pulse-width modulation (DPWM) method to reduce the current harmonics and improve the system efficiency for a single-phase three-level neutral-point clamped inverter. In single-phase inverters, the unipolar pulse-width modulation (UP-PWM) method is commonly used. However, this method has the disadvantage of power losses due to numerous switching operations. Conventional DPWM methods reduce the power losses and improve efficiency but increase the current total harmonic distortion (THD). To overcome these weaknesses, this paper proposes a hybrid DPWM switching method combining two PWM methods: the UP-PWM method and the conventional DPWM method called one-pole clamped PWM method. Since the proposed DPWM method offers all the advantages of both PWM methods, the optimal performance—with regard to the power losses and current THD—is obtained. The combination of two PWM methods is investigated by analyzing the power losses and current THD. Based on the analysis, the process determining the optimal operating condition is introduced. The effectiveness of the proposed DPWM method is demonstrated through simulations and experiments. [ABSTRACT FROM AUTHOR]

This paper proposes a new high-efficiency photovoltaic (PV) converter for grid connection through a high-leg delta transformer. The converter is composed of a symmetrically connected boost converter and three half-bridge inverters. One of the three half-bridge inverters is connected to the boost converter, and the others are directly connected to the PV terminals. As a result, this circuit configuration enables to reduce the power losses in both boost converter and inverters. This paper also proposes a new cooperative control method between the symmetrically connected boost converter and inverter. The control method can reduce the average switching frequency to 75% of that in a conventional one, resulting in a great reduction in the switching power loss. Experimental results confirm that the proposed circuit configuration makes it possible to improve its European efficiency from 91.6% to 94.5%. Moreover, system performance is evaluated on the assumption of maximum power point tracking operation. [ABSTRACT FROM AUTHOR]

Dual active bridge (DAB) based converters offer the benefit of smaller volume due to high-frequency isolation and controllability of active power flow, making them attractive for various applications, such as renewable energy generation, plug-in hybrid vehicles, and distribution systems. This paper presents a novel converter topology along with a modulation strategy for a DAB-based three-phase ac to dc converter. The major benefits are single-stage conversion, no unreliable intermediate dc-link capacitor, reduced number of switches, i.e., only two active switches on the ac side, simple control scheme, open-loop unity power factor operation, bidirectional power flow, and partial soft-switching. This paper presents the analysis of all the operating modes of the converter, resulting in the analytical estimation of power transfer and rms winding current and investigation of soft-switching conditions for the power devices. Simulation and experimental results have been presented to demonstrate the advantages of the proposed technique and accuracy of the analysis.1 [ABSTRACT FROM AUTHOR]

This paper presents the design and construction of a sample of Marx pulsed generator based on boost converter (BC) pulse-forming networks (BCPFNs). BCPFN is used instead of the conventional Marx floors for constructing this pulsed generator. BCPFN is carried out by connecting inductors and capacitors in series and parallel modes, respectively, by using solid-state switches, and during this procedure the pulsed generator converts to BC temporarily and increases the voltage of capacitors uniformly to a considerable value. This technique causes an increase in the discharging voltage level to the load that is many times more than its dc voltage source by charging the capacitors to a greater level. In order to take advantage of the benefits of Marx generator and PFN, this paper suggests a new circuit with the minimum number of switches. It means, to compose BCPFN and Marx, we have tried to design the circuit with fewer switches and instead of it we have achieved our desired performance with changing the operating mode in the states of BC, PFN, BCPFN, and BCPFN Marx. The results are simulated with MATLAB software. At the end, the experimental results of the construction of the above-mentioned system at low-power levels are presented, and the topology’s accuracy is proved by comparing them to the results of simulation. [ABSTRACT FROM AUTHOR]

The introduction of metal nanocrystals (NCs) has been confirmed to improve electrical uniformity of oxide-based resistive random access memory (RRAM) devices significantly; however, the current reports do not systematically elucidate the relationship between the size/distribution of NCs and the electrical uniformity of RRAM devices. In this paper, we focused on the impact of metal NCs size and areal density on the resistive switching (RS) performances of oxide RRAM by atomic layer deposition (ALD) based on the experimental results and theoretical calculation. The dependence of ALD cycles of 50–130 during Pt or CoPtx NCs growth on the RS parameters of Al2O3 or HfO2 memory units has been evaluated systematically. The RRAM embedded Pt or CoPtx NCs shows the trends: with increasing ALD cycles, the forming voltage, set/reset voltage, the resistance in off and on state, and ${R}_{ \mathrm{\scriptscriptstyle OFF}}/{R}_{ \mathrm{\scriptscriptstyle ON}}$ ratio entirely first decrease, then flatten, and increase later with a minimum value at about 100 cycles. Although all metal NCs with various sizes enhance the electric field strength compared to at the planar region, only metal NCs with proper NCs size and areal density (9 nm/6– $10\times 10^{\textsf {11}}$ /cm2 in this paper) can effectively produce stronger localized electric field at the tip of metal NCs, leading to optimal RS behavior. [ABSTRACT FROM AUTHOR]

This paper investigates the performance of switch-mode power supplies used in desktop PCs (PC-SMPS’) across the entire range of operating powers. Experimental results show that at low to medium operating powers, the input ac current might lose its periodicity with supply voltage frequency, when PCS-MPS’ can be an unexpected source of interharmonics and dc component. In such cases, there is a significant increase of PC-SMPS’ current waveform distortion and a substantial decrease of efficiency and operational power factors, which requires application of appropriate measurement and calculation procedures during the analysis. To correctly assess these power-dependent changes in performance and power quality indicators, this paper introduces a novel testing and evaluation methodology, based on the known or assumed PC-SMPS operating cycle. [ABSTRACT FROM AUTHOR]

This paper introduces the comparison of four predictive torque control schemes for a permanent-magnet synchronous machine (PMSM). The first method is the finite-set model predictive control (FS-MPC). In FS-MPC, the optimal switching state is selected based on the evaluation and minimization of a cost function for all possible voltage space vectors (VSVs) of the inverter. The second method performs a simplified FS-MPC where the selection and evaluation of the possible VSVs are reduced to only three. The third method is based on the principle of predictive direct torque control (PDTC), where the duty cycle of the switching state is optimized for application in the inverter. Finally, a method that combines FS-MPC and PDTC named model predictive torque control is presented. This paper introduces the methodology and the results of a comprehensive comparison of the four predictive schemes based on different criterions. The control schemes are implemented on a field-programmable gate array and are applied to a PMSM. Experimental results are presented to validate the presented comparison and discussion. [ABSTRACT FROM AUTHOR]

This paper proposes a medium-frequency (MF) solid-state transformer (SST) based grid interface for high-power multipulse rectifiers. In the proposed approach, the low-frequency ac (grid) voltage is transformed to MF voltage via front-end converters. The three single-phase MF outputs from these converters are fed to the primary side of a three-phase, five-limb multiwinding isolation transformer (or alternately three one-phase transformers). The secondary side windings from the transformer are configured in a certain “zig-zag” arrangement, which are connected to the inputs of three-phase diode rectifier modules as in a typical multipulse system. The proposed topology can better than double the power density by reducing volume (or weight) of the required front-end isolation transformer while maintaining the same input current quality as a conventional low-frequency transformer based approach. Usage of an open-loop square wave pulse width modulation for the front-end converters makes this approach simple to implement. This paper explains the proposed concept taking an adjustable speed drive application's perspective using modeling, simulation, and experimental results from a scaled down laboratory prototype. [ABSTRACT FROM AUTHOR]

This paper discusses dynamic behavior of a dual-active-bridge (DAB) dc–dc converter. Conventional phase-shift control methods for the DAB converter may cause dc offsets in both inductor current and transformer magnetizing current in transient states. The dc offset in the inductor current would introduce an excessive peak current through the switching devices. The dc offset in the magnetizing current may induce magnetic-flux saturation. Conventional methods simultaneously turn on and off the diagonal switches in each H-bridge converter and produce a square-wave voltage with a 50% duty ratio. In contrast, the proposed method in this paper independently controls each switch to modify the duty ratio in transient states. This paper clearly derives the requirements of each switch to eliminate the dc offsets in both currents with a settling time shorter than half the switching period. Experimental results using a 5-kW 20-kHz system verify the validity of the proposed control method, which is effective not only in a single step change, but also in a continuous change in the phase-shift reference. [ABSTRACT FROM AUTHOR]

In high-power applications, parallel-operated T-type three-level pulse width modulation (PWM) rectifiers (T3LPRs) are widely employed to improve the power capacity and system reliability. For parallel-operated T3LPRs, there are two important issues need to be properly addressed: 1) the neutral-point potential (NPP) balancing, and 2) the zero sequence circulating current (ZSCC) between the common ac and dc bus. In this paper, the fluctuation of NPP in a T3LPR and the generative mechanism of ZSCC in parallel-operated T3LPRs are first investigated. The zero sequence voltage (ZSV) difference between the parallel-operated T3LPRs is identified as the main excitation source of the ZSCC problem. Meanwhile, the disconnection of the neutral point and the control effect difference of NPP balancing in each T3LPR also affect the ZSCCs within the parallel-operated T3LPRs. To adjust the ZSV of T3LPRs, the dwell time of the positive small voltage vector in each switching period of the converter, which is usually adjusted to balance the NPP, is also required to be controlled to suppress ZSCC. Therefore, in this paper, to avoid the possible conflict, an improved modulation mechanism is designed to guarantee simultaneous ZSCC suppression and NPP balancing. The neutral points of each T3LPR are connected. Then, by adjusting the dwell time of the positive small voltage vector, the charging time of two dc capacitors is adjusted to balance the NPP, and the ZSV differences between different T3LPRs are adjusted to suppress ZSCCs. To avoid the control effect difference of independent NPP balancing in different T3LPRs, all T3LPRs share the same value marking the difference between two dc capacitor voltages. Thus, a communication with a greatly reduced baud rate requirement is needed for NPP balancing to transfer the difference between the two dc capacitor voltages. Moreover, no extra circuit is needed for ZSCC suppression. These approaches make the proposed improved space vector PWM strategy much more practical and easy to employ. The proposed method is verified with experiments on two 3-kW T3LPR prototypes. [ABSTRACT FROM AUTHOR]