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Light-emitting diodes (LEDs) are widely used in street lighting, landscape lighting, liquid crystal display (LCD) backlighting, healthcare, etc. As an important part of LED lighting products, LED driver plays a vital role in maintenance costs reduction, energy saving and lifetime prolongation. In this paper, a single-stage LED driver is proposed, which is integrated by a totem-pole bridgeless power factor correction (PFC) unit and several modular LCL-T resonant rectifiers. The totem-pole bridgeless PFC unit and the LCL-T resonant rectifiers are integrated by sharing switches, which can simplify the circuit and reduce the system cost. The output current can be regulated by applying the variable inductor control. Constant duty cycle and fixed switching frequency operation can be achieved as well. The operating principle and the performance of the proposed converter are analyzed in this paper. In addition, a precise parameter design method is proposed by considering the high-order harmonics. At last, an experimental prototype is established to validate the proposed parameter design and variable inductor control method. [ABSTRACT FROM AUTHOR]

This paper investigates the Multilevel Current Source Converter (MCSC) STATCOM. It proposes a new method of modulation. The new modulation method produces less THD and di/dt at the terminals of the MCSC STATCOM when compared to the widely used Phase-Shifted Carrier SPWM (PSC-SPWM). To ensure the inductors' currents remain balanced, a Current Balancing Algorithm (CBA) is presented. The CBA does not require any controls. It relies on assigning optimum switching states to each CSC module in real-time. In addition, two control strategies are presented in this paper. The first one assumes the STATCOM to be a SISO. Therefore, it only requires one PI controller. However, the gains for the controller must be changed if the STATCOM was to transition from capacitive mode to inductive mode, or vice versa. The second control strategy overcomes this problem by implementing a TITO integral state feedback controller. The contributions of this paper are validated via simulation and experimental results. [ABSTRACT FROM AUTHOR]

This paper proposes a new class of topologies of single-stage high-frequency ac-link power converters, which is capable of providing both voltage step up/down within a wide frequency and voltage ranges. The proposed family, which supports bidirectional power flow, can interface various single/multi-port dc and/or single/multi-phase ac systems to provide dc–dc, dc–ac, ac–dc, or ac–ac power conversion. In this family of converter, which offers a very modular structure, a small inductor that forms the link exchanges power entirely or partially between the source and load. The proposed family can function in buck, boost, and/or buck–boost modes of operation, and a combination of these modes of operation is also feasible. In comparison to the parallel inductive four-quadrant link converters, the proposed family features a significantly reduced link peak current, reduced switch ratings, and reduced total number of power switches. These features enhance the efficiency, reduce the total cost, and increase the power density of the system. In order to further improve the overall efficiency of the system, minimize the current/voltage stress over all utilized semiconductor devices, and lower electromagnetic interference (EMI), a small capacitor is placed in parallel with the link inductor to realize soft-switching operation for the proposed configurations. Moreover, the proposed converters have the potential to incorporate a lightweight single-phase high-frequency transformer for electrical isolation. The proposed circuit topologies prevent reverse recovery issues and eliminate losses corresponding to body diodes of power switching devices via utilizing power switches in conjunction with external fast recovery diodes. The proposed family offers a very high level of reliability owing to its immunity from short circuit of input and output terminals and open circuit of the link inductor, which may occur in other power converters due to commutation problem resulting from a short deadtime or an overlap time between switches, unwanted control command, delay in electronic circuits, or EMI noise's misgating on or off, in addition to the absence of electrolytic capacitors in the power circuit. A control approach is also developed to regulate input and output currents in one stage of power conversion. A detailed theoretical analysis, operation, design methodology, and control strategy of the proposed family are provided in this paper, and the effectiveness and performance of the proposed converter family are verified via simulation results and experimentally. [ABSTRACT FROM AUTHOR]

In this paper, a new class of bidirectional partial-resonance power converters is presented. The proposed family can be configured to interface single- or multi-port dc, single- or multi-phase ac systems at input-side and/or output-side. The proposed family offers a very modular structure, which can lead to cost reduction from a common designed module. In this converter, which accomplishes power conversion in a single stage, a small inductor placed in series with the input and output switch-bridges forms the link. This small link inductor is responsible for transferring power between different ports of the system. The proposed topologies can operate in buck, boost, and buck–boost modes of operation to step up and/or step down the voltage. In buck–boost mode of operation, the converter is controlled such that the power is entirely transferred through the link inductor; whereas, in buck or boost modes of operation only a fraction of the power is transferred through the link inductor, and the remaining power is directly transferred from input phases to the output phases. Galvanic isolation, which is typically a prominent factor contributing to power density of a converter, can be provided by means of a compact and lightweight single-phase high-frequency transformer added to the link. In comparison with earlier generations of partial-resonance inductive-link power converters, in the proposed converter, the level of link peak current and consequently power-loss, as well as voltage and current stress of switches are dramatically decreased. A very small film capacitor can be placed in parallel with the link inductor to facilitate zero-voltage-switching (ZVS) operation for all the switches/diodes. Apart from increasing the overall efficiency, minimized dv/dt stress and improvement in power density are achieved by adding the link capacitor. The proposed converter employs four-quadrant switches, i.e., bidirectional-conducting bidirectional-blocking switches, and charges the link inductor in both positive and negative directions in each cycle. In view of this, better utilization of the link inductor and lower total harmonic distortion (THD) are offered. Furthermore, two distinct switching algorithms are developed for the proposed family of converters. In this paper, the detailed behavior of the proposed family is investigated analytically, and simulation and experimental results are presented to evaluate the performance and effectiveness of the proposed converter. A low-power proof-of-concept prototype with input voltage of 59 V/161 V, load voltage of 178 V/73.5 V, maximum switching frequency of 4.9 kHz/3.65 kHz at 215 W/450 W in a step-up/step-down operation is considered for the experimental verification. [ABSTRACT FROM AUTHOR]

Inductor current is an important feedback parameter in synchronous buck converters (SBCs). It is used for overcurrent protection, current sharing among interleaved modules, and current-mode feedback regulation, among others. While implementing a digital controller, inductor current is sensed and fed into the controller through a high sampling frequency analog to digital converter (ADC). As the switching frequency of the converter becomes higher, the need for an even higher sampling frequency ADC also goes up, which is a distinct disadvantage in terms of the overall cost. This paper discusses a simple current estimation technique that avoids use of any expensive current sensor and high sampling frequency ADCs. The paper shows that in a buck converter, inductor current can be estimated by tracking the width of the switch node voltage. Implementation and limitations of the proposed current estimation scheme are discussed in detail. The proposed method is validated using a 3.3 V–15 A SBC prototype and results show the estimation technique is accurate within 5% with a converter switching frequency of 800 kHz. In order to prove the effectiveness of the technique in feedback regulation, the current estimation technique is used to implement average current mode and hysteretic current mode control on a SBC. To prove the effectiveness of the proposed current estimation scheme, it is used in closed-loop control of the SBC to verify the dynamic responses, such as start-up transient, step change in load, and reference. [ABSTRACT FROM AUTHOR]

In this paper, a new structure for a nonisolated boost dc–dc converter is proposed. The proposed converter generates higher voltage gain than some conventional nonisolated boost dc–dc converters. In this paper, the voltage and current equations of the elements and voltage gain in continuous conduction mode and discontinuous conduction mode are extracted. Then, the critical inductance converter is extracted and the current stresses in the switches are calculated. To achieve high voltage gain, a generalized structure based on the proposed structure generates for dc–dc converters. Meanwhile, the root mean square current relations of devices are obtained for an extended structure. Finally, the results of PSCAD/EMTDC software and laboratory prototype are used to reconfirm theoretical concept. [ABSTRACT FROM AUTHOR]

This paper proposes a new single-phase single-stage switched-boost inverter with four switches. Like the quasi-Z-source inverter and quasi-switched boost inverter (qSBI), the proposed inverter has the main features as continuous input current, buck/boost voltage with single-stage conversion, and shoot-through immunity. Compared to the qSBI, the proposed inverter uses one more capacitor and one less switch. This paper presents the operating principles, pulse-width modulation control strategy, parameter design guidelines, and simulation results for the proposed inverter. To verify the performance of the proposed inverter, an 800-W prototype was built with an 110 V/50 Hz output voltage in stand-alone and grid-connected modes. The simulation and experimental results matched those of the theoretical analysis. [ABSTRACT FROM AUTHOR]

In this paper, two structures are proposed for the switched-inductor quasi-Z-source inverter. In the proposed structures to extend the voltage gain of inverter, two new switched-inductor structures are used. In the proposed structures, voltage across the capacitors in the Z-source network and in the switched-inductor is symmetric and small. The other advantage of proposed inverters is known as achieving higher voltage gain per smaller duty cycle ratio (of shoot-through). Compared with a conventional continuous input current switched-inductor quasi-Z-source inverter at the same gain voltage, there is less of a ripple of input current in the proposed inverters. In this paper, at first the both the conventional and the proposed switched-inductor Z-source inventers are thoroughly investigated to find out their governing relations. Then, the proposed Z-source inverters are compared with the conventional ones by simulating them to assess their performance efficiency. Next, applying the simple boost pulse width modulation the simulation is carried out with PSCAD/EMTDC software. After that, to evaluate the obtained results, the prototypes of the proposed inverters with 48 Vdc input voltage are used. [ABSTRACT FROM PUBLISHER]

A novel hybrid pulse width modulation (PWM) technique is proposed in this paper for two parallel interleaved, two-level, three-phase voltage source inverters (VSIs). The two parallel interleaved VSIs are analyzed as a three-level (3L) inverter. A 3L inverter provides minimum line current ripple when nearest three voltage vectors are applied. In this paper, a novel carrier-based PWM technique is developed that ensures the application of nearest voltage vectors, keeping average circulating current to zero over a switching period. For carrier-based implementation of the proposed PWM, generalized common-mode (CM) offsets are derived in terms of maximum and minimum values of reference signals. Each 3L space-vector sector is divided into seven subsectors. For each subsector, a CM offset is calculated, addition of which to reference signals ensures the minimum line current ripple and zero average circulating current. Simulation and experimental results are provided to validate the proposed technique. [ABSTRACT FROM PUBLISHER]

This paper proposes the use of advanced bus clamping switching sequences to reduce the impedance network inductor current ripple of the three-phase Z-source inverter (ZSI). Proposed technique is named as ABC4_MCB. MCB denotes that the maximum constant boost control method is used for the voltage boosting. One of the conventional space vector pulsewidth modulation of ZSI, “ZSVM6,” is termed as ZSVM6_MCB under the maximum constant boost control method. The switching sequences of ABC4_MCB technique are designed in such a way that it offers around 34% reduction in the maximum instantaneous inductor current ripple as compared to the ZSVM6_MCB for the equal average switching frequency. The factor of percentage reduction in the inductor current ripple using the proposed technique is constant over the entire range of shoot through duty ratio (0–0.48). Theoretical findings have been verified using simulation and experimental results. [ABSTRACT FROM AUTHOR]

This paper presents a new single-phase ac–dc–ac three-level three-leg converter composed of three coupled-inductors and six active switches. The system model, operation principles, and a control strategy are presented and discussed. Additionally, a space-vector pulsewidth modulation technique is developed to double the effective frequency of the grid and load voltages and to reduce the switching losses. The proposed converter is compared to other similar converters in terms of switch count, harmonic distortion, and power losses. The results show that the proposed topology has improved power quality and uses fewer switches and gate drive circuits. These characteristics can potentially reduce the costs and the complexity of the system. In addition, the proposed converter eliminates the requirement for dead time to prevent short circuit of the dc-link. In order to validate the theoretical analysis, simulated and experimental results are presented and discussed. [ABSTRACT FROM AUTHOR]

Photovoltaic (PV) systems having rechargeable batteries are prone to be complex and costly because multiple converters are necessary to individually regulate a load, PV panel, and battery. This paper proposes novel nonisolated multiport converters (MPCs) integrating a bidirectional pulsewidth modulation (PWM) converter and phase-shift-switched capacitor converter (PS-SCC) for standalone PV systems. A PWM converter and PS-SCC are integrated by reducing the total switch count, realizing the simplified system and circuit. In the proposed MPCs, two control freedoms of duty cycle and phase shift angle are manipulated to individually regulate the load, PV panel, and/or battery. The detailed operation analysis was performed to mathematically derive gain characteristics and zero voltage switching operation boundaries. For the battery discharging mode, in which the PV panel is not available and the MPC behaves as a single-input–single-output converter with two control freedoms available, the optimized control scheme achieving the lowest rms current is also proposed to maximize power conversion efficiencies. Various kinds of experimental verification tests using a 200-W prototype were performed to verify the theoretical analysis and to demonstrate the performance of the proposed MPC. [ABSTRACT FROM AUTHOR]

A novel PWM full bridge (FB) dc–dc converter for large power industrial applications is proposed in this paper. The soft switching mode of the primary switches can be varied under different input and output conditions to achieve optimum system efficiency. In the zero-voltage and zero-current switching (ZVZCS) mode, the turn-on and turn-off switching loss can be optimized because the soft switching conditions of the turn-on and turn-off instants are well decoupled. In the zero-voltage switching (ZVS) mode, the turn-off switching loss can also be optimized because there is no requirement for light load operation in this mode. Four mosfets with ultra-low on-state resistance are used, thus, the added conduction loss is small. The auxiliary mosfets with high switching frequency are turned on with zero-current and off with zero-voltage, hence, the added switching loss can also be neglected. Furthermore, some drawbacks of the conventional ZVS and ZVZCS converters, e.g., narrow ZVS load range, high primary circulating current, incomplete reset of the primary current, and unreasonable VA rating of the added components, have been well solved. The operation principles and soft switching characteristics are discussed. Experimental results from an 18-kW prototype are provided to verify the proposed converter. [ABSTRACT FROM AUTHOR]

The inductance is an important parameter impacting current ripple calculation, usually with the assumption that the designed inductance performs ideally in most of voltage source inverters (VSIs) applications. However, the initial permeability of magnetic material usually descends when the winding current reaches or goes beyond the saturation limit. In such region of saturation, the implemented inductor does not perform as expected in design stages and its value varies with the bias current. In this paper, analysis and calculation of the current ripple are presented for a three-phase VSI with powder cores-based inductors, which reveals the calculation error of current ripple caused by the soft saturation nature of powder cores. Based on the equivalent single-phase model, the influence of inductance saturation on current ripple can be quantitatively evaluated. Then, a comparison of the current ripple calculation between considering and ignoring inductance saturation of implemented inductors is drawn in detail. Furthermore, under the condition of inductance saturation, the output current ripple peak-to-peak value of three phases is used as the constraint for variable switching frequency pulsewidth modulation (VSFPWM) design. A comprehensive method is developed to compensate the effect of inductance saturation in VSFPWM. At last, the effectiveness of the proposed strategy is verified by the detailed simulation and experiment. [ABSTRACT FROM AUTHOR]

Unipolar-pulsewidth modulation (UP-PWM) inverter takes advantages of high power efficiency and small output chokes which is widely used in the industry. However, UP-PWM inverters cannot be used in parallel operation due to a current unbalance problem. This paper studies the current unbalance problem of paralleled UP-PWM inverters with common dc bus and ac bus. First, the problem of unbalanced inductor current is defined and analyzed. Second, a technique to eliminate unbalanced currents is proposed. The proposed current balancing technique only requires one more current sensor in an inverter module rather than changing converter topology or modulation method, which makes it possible to apply UP-PWM inverters in parallel-operation while keeping the advantages of unipolar switching. The proposed current balancing method is verified by both simulation and hardware experiment. Experimental verification is performed on two 1 kW, 400 V input, and 120 V/60 Hz output prototypes, which shows a good agreement to the analytical study. [ABSTRACT FROM AUTHOR]

Parallel interleaved two-level (2L) three-phase voltage source inverters (VSIs) are widely used due to their distinct advantages of high power delivery, modularity, low current rating devices, etc. Along with these advantages, the parallel interleaved 2L VSIs could also be analyzed as a single three-level (3L) VSI. Conventionally parallel interleaved 2L VSIs are modulated using the 2L pulsewidth modulation (PWM) techniques. However, implementation of parallel interleaved 2L VSIs using the 2L PWM techniques may generate a higher ac side current ripple as compared to implementing the parallel interleaved 2L VSIs using 3L PWM techniques. This paper proposes a carrier-based method for implementing different 3L discontinuous PWM (DPWM) techniques for parallel interleaved 2L three-phase VSIs. Comparison of different 2L switching sequences for implementing a 3L DPWM switching sequence based on circulating current, line current ripple, and switching loss is also carried out. Simulation and experimental results are also displayed to validate the proposal. [ABSTRACT FROM AUTHOR]

Droop control is broadly used in dc power distribution systems, e.g., dc microgrids. Implementing droop control for switch mode power supplies requires the measurement of average current. Synchronous sampling is used in digital control systems to obtain the average of a triangular inductor waveform. However, the dead time, semiconductor turn-on and turn-off delays, and signal conditioning delays shift the sensed waveform and change the effective duty cycle, resulting in a misalignment and measurement error from the average value. This paper proposes a duty cycle weighted averaging method based on double sampling. By sampling twice per switching period and averaging the results using duty cycle as the weighting factor, the error due to waveform misalignment is theoretically eliminated. The result always equals the average value of the triangle. This method does not rely on the knowledge of circuit delays, making it easy to implement and robust to parameter variations. Simulations and experimental measurements validate the superior performance compared with conventional single and double sampling methods. The experiment on a droop-controlled dc–dc converter demonstrates a more accurate droop characteristic. [ABSTRACT FROM AUTHOR]

The pulse-width modulated (PWM) switching rectification that can achieve a high power factor (PF) for increasing the energy transfer efficiency between an LC resonator and a rectifier and voltage step-up and -down conversion is proposed for a wireless power transfer (WPT) receiver. The proposed method can emulate the switching rectifier as a resistive load by using an inductor and integrated phase synchronizers. Additionally, similar to a switched-inductor converter that controls the duty cycle ratio (D), the proposed PWM rectifier can control the output voltage VOUT when the input is a rectified, wirelessly coupled voltage instead of a constant voltage. Thus, unlike a conventional PWM switching rectifier for ac mains, an additional voltage conditioning circuit would not be needed after the proposed rectifier for WPT. The proposed PWM switching rectification is implemented in the AMS 0.18 μm 1.8 V/5 V CMOS process. PF = 1 is measured, indicating the most efficient energy transfer, compared to only 0.55–0.65 in a peak detection rectifier. Additionally, 88.2% of peak power conversion efficiency of the switching rectifier is achieved, and the maximum output power is 80.3 mW at 500 kHz of the WPT frequency. Moreover, the measured voltage conversion ratios ranging between 0.73× and 2× are demonstrated in this paper. [ABSTRACT FROM AUTHOR]

In this paper, a generalized switching modification method is proposed to reduce the root-mean-square (rms) current flowing into a dc-link capacitor in a dc–dc–ac structure consisting of a boost converter and a three-phase inverter. To analyze the current flowing into the capacitor, we analyze the currents at the respective converter and inverter sides. Based on this analysis, we derive an analytical method to find the modification time between the converter and inverter pulsewidth modulation (PWM) carriers through a Fourier series and approximation to facilitate real-time implementation. Real-time implementation of the modification time calculated by the derived method is described. To verify the validity of the proposed method, experimental results are presented based on a 1-kVA dc–dc–ac prototype. The proposed method has a better capacitor rms current reduction performance than the conventional method in various inverter power factors and PWM strategies. Especially, it has an excellent performance in mid-power factor level (0.95–0.1). [ABSTRACT FROM AUTHOR]

This paper proposed a new half-bridge (HB) LLC resonant converter family with pulse-width modulated (PWM) auxiliary switch (sLLC converter) for hold-up mode operation. The proposed sLLC converters could operate with synchronous rectifier, which is suitable for low-output voltage applications. In the proposed converters, an auxiliary switch is added at the primary side to provide charging path for the series resonant inductor. For nominal 400-V input, sLLC achieves same performance as conventional LLC converter, and all the good features such as soft switching are naturally retained. For slight input voltage fluctuation, frequency modulation is used to regulate the output voltage. When the input voltage reduces further, HB switches will operate at constant minimum frequency, and the auxiliary switch will operate in the PWM mode to energize the resonant inductor with the bus voltage directly during hold-up period. Thus, the converter achieves higher voltage gain, and the output voltage can be maintained at desired level. To verify the effectiveness of the proposed sLLC converter, operational principle and equivalent circuits will be carefully explained and analyzed in this paper. A 300-W prototype is built for 250–400-V input 12-V output application. [ABSTRACT FROM AUTHOR]

In this paper, a new soft switching flyback dc–dc converter with a simple zero-voltage and zero-current switching (ZVZCS) cell is proposed. The auxiliary resonant cell consists of one switch, one diode, one inductor, and two capacitors. It provides ZVZCS not only for the main switch but also for the auxiliary switch at both turn-on and turn-off times. In addition, all the auxiliary diodes and body diodes of the switches operate under full ZVZCS except the output diode which turns off only with zero current switching. This soft switching technique makes the proposed converter have less switching losses which leads the converter to operate in higher frequencies and efficiency. Another outstanding feature of the proposed converter is using the auxiliary resonant cell out of the main power path to have lower voltage stress on the switches. In this paper, pulse width modulation (PWM) is employed to control the main switch. A detailed mode analysis of the proposed converter operation is presented along with design procedure. Finally, the accuracy performance of the converter is verified through a 60 W experimental prototype results. [ABSTRACT FROM AUTHOR]

In several electrical dc–ac power conversions, the ac output voltage is higher than the input voltage. If a voltage-source inverter (VSI) is used, then an additional dc–dc boosting stage is required to overcome the step-down VSI limitations. Recently, several impedance source converters are gaining higher attentions [1], [2], as they are able to provide buck-boost capability in a single conversion stage. This paper proposes the merging of the boost stage and the VSI stage in a single stage dc–ac power conversion, denoted as split-source inverter (SSI). The proposed topology requires the same number of active switches of the VSI, three additional diodes, and the same eight states of a conventional space-vector modulation. It also shows some merits compared to Z-source inverters, especially in terms of reduced switch voltage stress for voltage gains higher than 1.15. This paper presents the analysis of the SSI and compares different modulation schemes. Moreover, it presents a modified modulation scheme to eliminate the low frequency ripple in the input current and the voltage across the inverter bridge. The proposed analysis has been verified by simulation and experimental results on a 2.0-kW prototype. [ABSTRACT FROM PUBLISHER]

Pulse-width-modulated (PWM) converters have been widely applied for power processing, and they are typically the stems of other types of converters, such as quasi-resonant, Z-source, and switched-inductor hybrid converters. Development of PWM converters has been spanning over a century, starting from the buck converter. The well-known PWM converters include buck, boost, buck–boost, Ćuk, single ended primary inductive converter (SEPIC), zeta, Z-source, quasi-Z source, etc. Many attempts have been proposed to develop these converters based mostly on canonical cell concepts and by introducing extra LC filters to the cells. This paper presents an enhancement to the layer and graft schemes by introducing the ideas of dc voltage/current offsetting, capacitor/inductor component splitting, diode grafting, and inverse operation of PWM converters. The PWM converters, which can be operated in continuous conduction mode (CCM) or discontinuous conduction mode (DCM), therefore can be synthesized systematically according to decoded transfer gains. Decoding and synthesizing PWM converters uniquely bridge transfer gains to converter topologies and provide readers a comprehensive understanding of PWM-converter evolution from the original converter, the buck converter. Additionally, in this paper, the Ćuk, SEPIC, and zeta converters all with the same transfer gain of $D/(1 - D)$ are proved to be equivalent to the buck–boost converter with an extra LC filter. For further illustrating the proposed approaches, various types of Z-source converters, switched-capacitor/switched-inductor hybrid converters, and a single-stage interleaved converter are reviewed, and new PWM converters are developed. [ABSTRACT FROM AUTHOR]

This paper introduces a three-phase grid-connected inverter for commercial-scale photovoltaic systems. The circuit topology combines an ac-inductor-less active bridge with a parallel-connected pulsewidth modulation inverter acting as an instantaneous reactive power compensator. The active bridge, called a 120° conduction inverter, operates at a switching frequency equal to the grid frequency and outputs a 120° rectangular current, while the compensator eliminates the harmonic currents included in the rectangular current. The main advantage of this strategy is the reduction in size of the required ac inductor by a factor of 4, as well as the reduction of power losses in the switching devices. The theoretical analysis clearly shows that the compensator can synthesize a sinusoidal output current by controlling only instantaneous reactive power, thus eliminating the need for electrolytic capacitors. A 5-kW experimental setup validates the operating principle and the control method of the proposed inverter and exhibits an inverter efficiency as high as 99.2% with Si superjunction mosfets. [ABSTRACT FROM AUTHOR]

Two parallel interleaved two-level (2L) three-phase voltage source inverters (VSIs) can be analyzed as a single three-level (3L) VSI. A generalized carrier-based method is proposed in this paper for implementing different 3L pulsewidth modulation (PWM) techniques using two parallel interleaved 2L VSIs. The proposed method modifies the given three-phase reference signals of 3L VSI for implementation of the PWM technique using two parallel interleaved 2L VSIs. The influence of nonidealities on the equivalent 3L PWM switching sequences is also discussed. To overcome the effect of nonidealities, a new modified discontinuous PWM technique (MDPWM1) is proposed. The analysis of different performance indices is carried out for different 3L PWM techniques, and the key advantages of different PWM techniques are identified. Simulation and experimental results are also presented. [ABSTRACT FROM AUTHOR]

A switching-capacitor-based buck–boost converter (with common ground) for point of load applications is proposed in this paper. It is capable of operating in stand-alone buck or boost mode in addition to its primary operation of performing the buck–boost conversion. The striking feature of the proposed converter is low source current ripple content irrespective of its mode of operation (buck–boost, buck, or boost). First, feasible pulsewidth modulation schemes for the proposed converter are identified and thereafter the corresponding circuit performance analysis, steady-state analysis, and state-space modelling is established. Through steady-state analysis, voltage gain expressions are formulated and equations defining L-C components are derived in terms of their ripple quantities. The state-space models are used to formulate small-signal analysis and to obtain the relevant transfer functions required in the controller design. A voltage-mode/current-mode controller is designed, with a tradeoff in bandwidth, to control the proposed converter and transit it from buck to boost mode or vice versa seamlessly. A 30–55 W, 100 kHz, prototype point of load converter with 36-V input dc source is built to supply power at constant load voltage of either 48 or 28 V. The proposed converters’ effectiveness is demonstrated experimentally in terms of reduced source current ripple along with seamless transition from buck to boost mode and vice versa. [ABSTRACT FROM AUTHOR]

This paper proposed a novel family of pulsewidth modulation (PWM) strategies for single-phase quasi-switched boost inverter (qSBI). By combining shoot-through (ST) mode in the inverter's switches and the turning-on state of an additional switch, the qSBI produced a high voltage gain without adding any passive components. Compared to the conventional PWM strategy for the same input and output voltage gain, the introduced PWM strategies for qSBI could reduce voltage stress across semiconductors and capacitor with the following additional merits: having smaller high-frequency inductor current and capacitor voltage ripples, using high modulation index with low ST duty cycle, and having higher efficiency. Circuit analysis, operating theories, and simulation results of the single-phase qSBI with the introduced PWM5 strategy are shown. A 500-W laboratory prototype was constructed and the effectiveness of the introduced PWM strategy was validated. The qSBI with the proposed PWM strategies is suitable for applications where the required voltage gain lies between 2 and 3. [ABSTRACT FROM AUTHOR]

Photovoltaic (PV) systems containing a rechargeable battery as an energy buffer require multiple dc–dc converters for PV panel control and battery regulation, and hence, they are prone to be complex and costly. To simplify the system by reducing the number of converters, this paper proposes the nonisolated switched capacitor converter (SCC)-based multiport converter (SC-MPC) for standalone PV systems. The proposed SC-MPC can be derived by integrating a bidirectional pulsewidth modulation (PWM) converter, series-resonant converter (SRC), and an SCC with sharing switches. PWM and pulse frequency modulation (PFM) controls are employed for the PWM converter and SRC, respectively, to regulate either a battery voltage, output voltage, or input power from a PV panel, depending on power balance among the input, battery, and load. The 150-W prototype was built for an experimental verification, and the results demonstrated the output voltage could be regulated independently on the battery voltage or input port of PV panels. [ABSTRACT FROM AUTHOR]

High step-down voltage conversion is necessary to bridge the voltage gap between main power converters and low-voltage auxiliary electronics in power conversion systems. Switched capacitor converters (SCCs) are an attractive candidate as a high step-down converter, but their poor voltage regulation capability may limit their applications. Pulsewidth modulation (PWM) SCCs with adjustable high step-down voltage conversion are proposed in this paper. The proposed PWM SCCs can be derived from traditional SCCs by replacing an energy transfer capacitor with a switched-capacitor-inductor (SCL) cell that comprises inductors, capacitors, and diodes to realize PWM-controllable voltage conversion. The voltage step-down ratio of the proposed PWM SCCs is not only PWM controllable but also adjustable with structures of SCCs and SCL cells. Two representative PWM SCCs were taken as examples to perform the operational analysis. The prototypes of both representative PWM SCCs were built and tested to demonstrate the proposed concept. [ABSTRACT FROM AUTHOR]

In this paper, a novel direct ac–ac converter based on the coupled inductor Z-source networks is proposed that offers a wide range of buck–boost operation. A total of two Z-source networks, called the coupled switched inductor and the modified switched coupled inductor, are employed that enable the ac–ac converter to deliver a wide voltage range. The proposed converter with both networks provides free-wheeling current paths for the inductors currents during the state transitions, which results in solving the commutation problems and the need for snubber circuits. A simple switching strategy is then proposed that helps to share a common magnetic core between the coupled inductors. For any particular voltage gain, the proposed structures require a smaller duty cycle compared to the conventional ones; therefore, a smaller inductance is required. Simulation and experimental results are provided to confirm the theoretical achievements. [ABSTRACT FROM AUTHOR]

Recent power systems, such as renewable energy systems consisting of solar panels and rechargeable batteries, contain multiple power sources and need multiple converters in proportion to the number of power sources, resulting in increased system complexity and cost. This paper proposes a multiport converter (MPC) integrating a bidirectional PWM converter and series-resonant converter. Not only is the switch count halved with the proposed MPC, but also magnetic components can be integrated, reducing the circuit complexity and volume. A 150-W prototype of the proposed MPC was built for the experimental verification. The measured voltage conversion characteristics and transient responses demonstrated that the proposed MPC could control load and battery voltages independently by pulse width modulation and pulse frequency modulation controls, respectively. [ABSTRACT FROM AUTHOR]

In this paper, a three-level quasi-switched boost T-type inverter (3L qSBT2I) is proposed. A new pulse-width modulated (PWM) control method is presented to reduce the inductor current ripple of the qSBT2 I. In the introduced PWM technique, the shoot-through duty cycle is maintained constant to keep the modulation index as high as possible. Then, the only control parameters of the qSBT2I are the duty cycles of the two additional switches. By controlling the duty cycles of the two additional switches, the voltage gain of the proposed qSBT2 I can be improved to a value larger than that of the conventional 3L impedance source inverters. The steady-state analysis, operating principles, and comparisons with the impedance source-based 3L inverters are presented. A 1-kW prototype is constructed to verify the operating principle of the 3L qSBT2I. An indirect dc-link voltage regulator and a capacitor voltage-balance controller are applied to the proposed qSBT2I. Simulation and experimental results are presented. [ABSTRACT FROM AUTHOR]

In order to incorporate the advantage of the $V^{2}$ control scheme and the benefits of digital implementation, this paper proposes a digital $V^{2}$ control with hybrid capacitor current ramp compensation, which includes the estimated output capacitor current ramp and the external ramp. Since capacitor current responds to the load change immediately, the proposed method has faster transient response than either digital inductor current compensation or external ramp compensation. The proposed estimator does not require high sampling rate and avoids the current ramp distortion due to the parasitic resistance and inductance. The small-signal model is derived by describing function to understand the dynamic characteristics of the proposed control scheme. The model provides design criteria of the current feedback gain and the external ramp slope. The effectiveness of the proposed control architecture and the current ramp estimator is verified by simulation and experimental results. Compared with the benchmark, the proposed control has 70% reduction on settling time and 20% reduction on undershoot deviation. [ABSTRACT FROM AUTHOR]

This paper investigates a multilevel inverter composed of series/parallel-connected H-bridges. The presented structure can be used for applications in which the use of semiconductor switches with low-voltage and low-current ratings is intended. A comprehensive system model, an overall control strategy to adjust the output voltage with constant magnitude and frequency, and a level-shifted PWM (LS-PWM) strategy based on a voltage vectors unidimensional analysis and a plane analysis are presented. The LS-PWM is capable of mitigating the low-frequency circulating current, thus generating multilevel voltage signals with low harmonic distortion, maximum number of levels, and low dv/dt. In addition, considering a wide range of values of voltages and currents and various power levels, the total converter losses are reduced compared with the conventional multilevel converters. Two multilevel conventional inverters with the same number of semiconductor switches are used for comparison. Simulation and experimental results demonstrate the feasibility of the studied converter. [ABSTRACT FROM AUTHOR]

This paper proposes a new bidirectional three-phase push–pull converter that has a simple structure and achieves zero-voltage switching turn-on of switches. Also, due to use of a single inductor, an imbalance among phase currents on the low-voltage high-current side is trivial in the proposed converter although no current sharing control is employed. In this paper, a new dual asymmetrical pulse width modulation (PWM) switching method is proposed for bidirectional power flow control with seamless mode change. The proposed switching method offers reduced circulating current and makes the converter easier to implement compared to the PWM plus phase shift-based control method since it is a general PWM method having two independent duty cycle controls on each side. Experimental results from a 3-kW prototype are provided to validate the proposed concept. [ABSTRACT FROM PUBLISHER]

Single-stage power-factor-corrected (S2PFC) power supplies usually suffer from high voltage stress, due to lack of control on the intermediate bus capacitor voltage. In the past, analysis of such voltage stress was mostly based on steady-state condition without providing sufficient explanation during the transient circuit operation. This paper revisits the problem at circuit level and reports that the root cause is due to the inherent negative current feedback property of the output inductor or the transformer operating in continuous conduction mode (CCM). Based on the finding, this paper further proposes a new approach to reducing the voltage stress by adding an auxiliary circuit branch to existing S2PFC converters. The additional circuit branch limits the effect of negative current feedback by suppressing the change of output current slope due to change of load. This assists the pulsewidth modulation controller to track the change of load better such that the bus capacitor voltage range is reduced through duty cycle control. The auxiliary circuit branch also reduces reverse-recovery-related losses of the converter under CCM operation. A laboratory prototype using the popular boost PFC converter combined flyback dc/dc converter was built and tested to confirm the analysis and effectiveness of the approach. [ABSTRACT FROM AUTHOR]

Switch fault diagnosis is an important design aspect for pulse width modulation (PWM) dc-dc power converters. It can prevent power converters from further damage, and also make preparations for remedial actions. In this paper, a fast switch fault diagnostic method is proposed for PWM dc-dc converters operating in continuous conduction mode. The proposed method utilizes the magnetic component (inductor or transformer) voltage for fault diagnosis. Based on the real-time voltage measurement and switch gate-driver signals, characteristics of switch open-circuit faults and short-circuit faults are rapidly extracted, and thus, switch faults can be quickly detected. The magnetic component voltage can be measured by an auxiliary winding in the magnetic core, and gate-driver signals can be easily got from the control circuit. Moreover, the fault detection can be implemented by a low-cost logical hardware circuit, and this circuit can be integrated into the control circuit. The fault diagnosis principle, design considerations, and implementation are discussed in this paper. Experiments are conducted to verify the theoretical analysis. [ABSTRACT FROM AUTHOR]

Paralleled inverters are not only a suitable approach to increase the power capacity, but also have the capability of common mode voltage (CMV) reduction, or even elimination. The original zero CMV modulation scheme for paralleled inverters suffers from the current jump problem in phase-leg currents. This current jump phenomenon amplifies the peak values of differential-mode circulating current (DMCC) and zero-sequence circulating current (ZSCC), which is adverse for the design of coupled inductor and common-mode inductor. This paper introduces the modified modulation scheme, which can keep volt-seconds balance in whole fundamental period and mitigate the current jump in phase-leg currents. In addition, the reduction effect of the DMCC and ZSCC can be achieved. To verify the analysis, both the simulation and experimental results are presented, which validates the proposed methods and show that they are beneficial for DMCC and ZSCC reduction. [ABSTRACT FROM AUTHOR]

Conventional zero-voltage and zero-current-switching (ZVZCS) full-bridge converters are widely used because they can realize zero-voltage switching (ZVS) for the leading leg and zero-current switching (ZCS) for the lagging leg. However, the large turn-off loss of the leading leg is still unacceptable in high-voltage high-power applications where insulated-gate bipolar transistors (IGBTs) with current tailing are employed. Hence, it is preferable to achieve ZCS for all IGBTs of full-bridge converters. This paper analyzes the ZCS conditions for pulsewidth modulated (PWM) full-bridge converters and proposes a general strategy for achieving ZCS for main switches, including the control strategy and design method of the topology. Based on this theory, a novel ZCS PWM full-bridge converter with simple auxiliary circuit is derived and tested. It can achieve ZCS not only for the main switches of full-bridge converter, but for the auxiliary switch as well, and obtain high efficiency. The operation principle of the proposed ZCS PWM full-bridge converter and the design procedure are presented. The experimental results of a 600 V/2.5 kW prototype are also included to verify the theoretical analysis. [ABSTRACT FROM PUBLISHER]

Soft switching pulse-width modulation (PWM) dc–dc full-bridge converter with controlled rectifier on the secondary side of the high-frequency power transformer is presented in this paper. An active secondary switch, including new nondissipative passive energy recovery turn-off snubber on the secondary side and modified PWM control algorithm, provide conditions for zero-voltage and zero-current turn-on and zero-current turn-off of IGBT transistors on the primary side of the high-frequency dc–dc converter. The simple passive energy recovery snubber ensures also zero-voltage turn-off of the transistor on the secondary side of the power transformer. The principle of operation is explained and analyzed and consequently verified on a 2 kW, 50 kHz laboratory model of the converter. [ABSTRACT FROM PUBLISHER]

This paper extends the trans-Z-source concept to ac–ac power conversion and proposes a novel single-phase trans-Z-source ac–ac converter. The proposed converter retains the advantages of its existing Z-source/quasi-Z-source counterparts in which the output voltage can be boosted and in-phase with the input voltage or bucked/boosted and out-of-phase with the input voltage. Meanwhile, a coupled inductor is introduced into the proposed converter, and the turns ratio of the coupled inductor become another control variable beside the duty cycle to obtain extreme voltage gain. Importantly, the input voltage and output voltage share the same ground, and the input current could be continuous, which is a benefit for reducing input current harmonics. Most important of all, the safe-commutation strategy for the proposed converter is deep developed, and analytic expression between the switches state and loop circuit voltage/current condition is derived out. Hence, the current/voltage ripple can be avoided without a loss snubber circuit, which benefits a reduced cost and enhanced reliability. The performance analysis is discussed in consideration of parasitic resistance, and system parameter design is optimized based on theoretic calculation. A laboratory prototype is fabricated, and experiments are performed to verify the validation of the proposed converter. [ABSTRACT FROM PUBLISHER]

Interleaved converter legs are typically modulated with individual carriers per leg and phase-shifted pulse width modulation (PS-PWM) as it facilitates current balancing amongst the legs. Phase-disposition PWM (PD-PWM), despite the better harmonic performance, cannot be directly used due to the resulting current imbalance that may damage the converter. This paper addresses the current sharing issue and proposes a sorting algorithm implementation that enables single-carrier PD-PWM technique for interleaved two-level converter legs. An extension of the proposed algorithm through a switching state feedback loop, limiting the average switching frequency, is also developed. In both cases, the output current is of high quality and shared amongst the phase-legs, while the deviation between the phase-leg currents is well regulated. Simulation results demonstrate the general function of method for multiple interleaved legs as well as its current sharing capabilities for high-power applications. Experimental results from a low-power laboratory prototype validate the operation of the proposed approach. [ABSTRACT FROM PUBLISHER]

This paper proposes a pulse width modulation plus phase-shift (PPS) control for nonisolated high gain soft-switching bidirectional dc–dc converter (HSBDC). The phase-shift angle is used to control the direction and amount of power flow of the bidirectional dc–dc converter, while the duty cycle is used to balance the voltage between two high voltage side (HVS) capacitors. The HSBDC with PPS control has the advantages of simple control structure and symmetrical switching patterns, ensured soft-switching in both forward and backward modes at all load under wide voltage range, and reduced voltage ratings of the HVS capacitors and switches. The operation principle of the HSBDC with PPS control is analyzed in detail. Based on the analysis the passive component is designed to achieve higher efficiency. A 3-kW prototype is implemented and tested to verify the validity of the proposed method. [ABSTRACT FROM AUTHOR]

This paper introduces series work of common-mode (CM) voltage reduction for the paralleled inverters. The paralleled inverters’ phase-legs are connected through coupling inductors and the combined three-phase currents are provided to the load. Interleaving is an approach to reduce the CM voltage for the paralleled inverters but it cannot eliminate CM voltage. A novel pulse-width-modulation (PWM) method for paralleled inverters which can theoretically achieve zero CM voltage is developed. Considering the basic voltage vectors in each inverter, novel paralleled voltage vectors which have zero CM voltage are proposed to combine the reference voltage vector. The action time's distribution and voltage vectors’ sending sequence for each inverter are also introduced. The proposed PWM method can make sure the voltage of the two inverters are balanced in each switching cycle and limits the circulating current through small coupling inductors. Similar to interleaving space vector PWM, the proposed zero CM PWM also has the ability to reduce the output current ripple and electromagnetic interference (EMI). Simulation and experimental results are provided to show the advantage of paralleled inverters in CM voltage reduction and validate the proposed method has good performance to reduce CM current and CM EMI noise. [ABSTRACT FROM PUBLISHER]

In this paper, dual-buck structured single-stage buck–boost inverters that use power MOSFETs to achieve high efficiency are presented. The proposed inverters require fewer switches, and half of the switches have reduced current stresses. They have no shoot-through problem; therefore, high system reliability can be obtained. The dead-time in PWM signals can be minimized or eliminated, which improving the quality of the output ac voltages and increasing the efficiency. In the proposed inverters, MOSFETs can be used without reverse-recovery issues of their body diodes to boost the efficiency and increase the switching frequency. To further improve the efficiency and stability of the proposed single-phase inverter, PWM strategies combining high- and low-frequency modulation are presented. A hardware prototype of the single-phase inverter was built and tested using resistive, inductive, and nonlinear loads. Experimental results for a 300-W prototype inverter show a 97.4% peak efficiency with a 25 kHz switching frequency. [ABSTRACT FROM AUTHOR]

A dual-buck inverter (DBI) possesses no shoot-through worries and can boost efficiency by using power mosfet s. The main drawback of a DBI is the use of more inductors than in a traditional full-bridge inverter. This greater number of inductors decreases the power density and increases system cost. In this paper, a modified cascaded full-bridge DBI is proposed. It retains all the advantages of the conventional cascaded full-bridge DBI, possesses no shoot-through issues, and can be operated with no pulse-width-modulation dead-times. It can be implemented with power mosfet without reverse recovery issues of a body diode to boost efficiency. The cascaded modules in the proposed inverter share current limiting inductors. Therefore, the number of inductors and inductor footprints, the complexity of the circuit layout, required inductance, and magnetic volume can all be decreased. To show the advantages of the proposed inverter, detailed theoretical analysis and experimental results are provided. [ABSTRACT FROM PUBLISHER]

This paper presents a comparative evaluation of eight high-voltage step-up converters based on different associations of boost and zeta standard dc–dc pulse width modulation (PWM) cells. These eight converters present different characteristics such as cascaded and stacked PWM cell associations, as well as isolated winding coupled inductors, tapped winding coupled inductors, and noncoupled inductors. In order to explore the advantages and address the limitations of each topology, several comparative evaluations concerning static voltage gain, power losses, current and voltage stresses, component stress factors, power density, relative cost, and efficiency were carried out. From the theoretical analysis and experimental results, the association named stacked boost–zeta with autotransformer yielded the highest efficiency and power density and resulted in the most attractive converter for the case study. [ABSTRACT FROM PUBLISHER]