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Clamp mode snubbers are very well suited for the series structure of the insulated-gate bipolar transistors (IGBTs) in pulsed power applications. They properly meet the necessities expected from them such as the fast operating of the series IGBTs since they have no effect on the gate side. In addition, they can provide safe voltage condition for the IGBTs in short circuit faults, which are very probable in pulsed applications. The clamp mode snubber can perform its voltage balancing task whenever the power capacity of the snubber can support the injected powers due to the voltage unbalancing factors. This paper initially introduces the main factors injecting power to the snubbers. Then, it will be illustrated that the exact injected power to each predetermined snubber cannot be determined due to the uncertainties about the effect of the voltage unbalancing factors. Although it is impossible to determine the exact value of the power injected to each snubber, the total injected powers to the snubbers can be calculated. Therefore, as an effective remedy, this paper proposes a concentrated snubber. Using the proposal, all the injected powers are conducted to a centralized circuit and can be easily managed. In addition, analytical expressions are provided for proper dimensioning of the proposed concentrated snubber elements. Furthermore, the performance of the proposed concentrated snubber is evaluated using simulations and experimental prototyping. [ABSTRACT FROM AUTHOR]

Aimed at the problem that the auxiliary commutation circuit (ACC) of auxiliary resonant commutated pole (ARCP) inverters has a high loss in commutation processes, this paper presents a novel modulation strategy with shunt dead time based on a double ARCP (DARCP) inverter. In comparison with the original modulation strategy, this modulation strategy cannot only achieve soft switching for all switches, but also avoid the superposition of resonance current and load current at commutation moments in double ACCs (DACCs) and make the maximum current through DACCs approximately equal to load current in commutation processes. So, the circulating current loss in DACCs and the current stress of auxiliary switches can be effectively reduced. According to the equivalent circuits in different operation modes under the novel modulation strategy, this paper analyzes the operation principle, soft-switching implementation condition, and optimal parameter design procedure of the DARCP inverter. Finally, a 10-kW–16-kHz DARCP inverter prototype with insulated gate bipolar transistor-based switches is built. Experimental results are given to demonstrate the validity and features of the DARCP inverter under the novel modulation strategy. [ABSTRACT FROM AUTHOR]

Piezoelectric vibration energy harvesting (PVEH) has been proved to be much promising in making low power electronics completely self-powered due to wide availability and high energy density. Self-powered synchronized switching harvesting on an inductor (SSHI) circuits have been proved to greatly increase the performance of a PVEH device and peak detector-based self-powered switches are widely used. In practice, however, the switch is impossible to turn on simultaneously at peak displacements due to nonlinear components so that switching delay (SD) always exists. Furthermore, the SD will degrade the performance of PVEH devices, so it must be reduced. Therefore, for this kind of SSHI circuits, the purpose of this paper is to explore basic causes of generating SD and investigate the corresponding solution. First, theoretical model of SD in self-powered parallel SSHI (SP-PSSHI) is derived and the SD is first proved to be positive. Then, effects of key component parameters on the SD are studied. Based on above results, an improved SP-PSSHI (ISP-PSSHI) circuit is proposed by adding a voltage divider and its SD is proved to be less than that of the SP-PSSHI circuit. Next, the key factor is discussed, namely the divider resistor. Circuit simulations validate theoretical results and also expose that there are optimal resistor and capacitor of the envelope detector for achieving the maximum harvested power. In the end, experimental results show that the ISP-PSSHI circuit can improve the averaged harvested power about 11% more than that of the SP-PSSHI circuit under choosing optimal components. [ABSTRACT FROM AUTHOR]

The STRETCH meat grinder is one typical inductive pulsed-power supply topology for electromagnetic launch system. It has remarkable current amplification ability as a single unit, but one module cannot provide enough amplitude and width for the load current of the railgun launching. This paper discusses the effects of different triggering delays on the load current with two STRETCH meat grinder modules. To reduce the magnetic field coupling between the two modules, the two main switches are opened simultaneously. To make the load current waveform with no notch, the thyristor of the first module is triggered when its pulse-forming capacitor is fully reversely charged. For the thyristor of the second module, we consider several time points of triggering delay. Because of the practical constraint for the maximum rail current that ensures no rail erosion, the rectangular waveform is the most appropriate load current waveform. Therefore, the comparing criterion can be defined as the ratio of the load current waveform area and its maximum rectangle area at different current levels. Higher ratio means that the current is more like a rectangular wave and is better accordingly. Based on the above criterion and extensive simulation research, we found that the best delay time is the moment when the capacitor is reversely charging the inductor completely. This paper and the result are of great theoretical significance for the further study on the collaborative triggering of multiple STRETCH meat grinder modules. [ABSTRACT FROM PUBLISHER]

A new cascade topology for multilevel converter is introduced in this paper which comprises series connection of several submultilevel units. To determine the magnitudes of the dc sources, two new methods are described. The proposed topology is optimized to generate any levels with minimum number of components and peak voltage on switches. The presented topology can be used in high-voltage applications due to using the switches with low voltage rating. To indicate the merits of the proposed structure, comparison studies are provided with other topologies in terms of the number of elements and peak voltage on switches. The comparison results prove that the presented cascade multilevel converter requires fewer components. Moreover, it is shown that the total peak voltage on switches in the proposed topology is less than other structures. Experimental work is presented to demonstrate the performance of the presented multilevel converter. [ABSTRACT FROM PUBLISHER]

Due to the higher attenuation of switching frequency current harmonics, the $LCL$ filter has been widely used in grid-connected inverters. To deal with the resonance of the $LCL$ filter, the capacitor current is usually fed back to damp the resonance actively. However, the computation and pulsewidth modulation (PWM) delays in the digital control system have a significant influence on the active damping method, resulting in poor system robustness. Meanwhile, these delays also reduce the control bandwidth greatly and thus impose a severe limitation on the low-frequency gains. In this paper, a real-time computation method with dual sampling mode is proposed to remove the computation delay from the inner active damping loop and the outer grid-current control loop simultaneously; thus, the system robustness and the control performance can be greatly improved. Moreover, the time duration between the sampling instant and the switching transition of the inverter bridge is extended by the proposed method, which effectively prevents the switching noise distorting the sampled signals. Therefore, the noise immunity of the inverter is also improved greatly. Experimental results from a 6-kW $LCL$-type single-phase grid-connected inverter confirm the theoretical expectations and the effectiveness of the proposed method. [ABSTRACT FROM PUBLISHER]

This paper presents the derivation and experimental verification of the closed-form subharmonic instability condition of the constant-frequency peak-current-controlled buck converter with closed voltage feedback loop. The well-known open-voltage-loop instability condition becomes a special case. The instability limits in the converter parameter space are readily obtained from the result. It is found that closing the voltage feedback loop tends to degrade the stability margin. One can clearly see the effects of all converter parameters (such as the pole, zero, and gain of the voltage-loop compensator, the equivalent series resistance of the output capacitor, the presence of a second output capacitor, and the switch turn-off delay) on the instability. [ABSTRACT FROM AUTHOR]

This paper presents a modulation strategy for symmetrical cascaded multilevel converters that simultaneously balances the individual DC voltages and reduces switching losses by eliminating redundant or unnecessary commutations. The voltage regulation is based on a 1-bit digital signal indicating whether the DC link voltage of each H-bridge is above or below the set point. The system command identifies commutations that can be suppressed without causing output voltage distortion, thus reducing converter losses. The voltage balancing is reached by postponing each switching commutation for a short lapse of time. Simulation and experimental results for an active filter application validate the proposed methods. [ABSTRACT FROM PUBLISHER]

This paper presents a hybrid switch that parallels a power MOSFET and an insulated-gate bipolar transistor (IGBT) as the main switch of a zero-voltage switching (ZVS) inverter. The combination features the MOSFET conducting in the low-current region and the IGBT conducting in the high-current region, and the soft switching avoids the reverse recovery problem during the device turn-on. A custom hybrid switch module has been developed for a variable-timing-controlled coupled-magnetic-type ZVS inverter with a nominal input voltage of 325 V and the continuous output power of 30 kW for a traction motor drive. Experimental results of the hybrid-switch-based inverter with the total loss projected by temperature indicate that the inverter achieves 99% efficiency at the nominal condition and demonstrate ultrahigh-efficiency operation over a wide load range. At 375-V input, the maximum measured efficiency through temperature projection and loss separation analysis is 99.3%. [ABSTRACT FROM PUBLISHER]