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A multilevel multiphase space vector pulsewidth modulation (SVPWM) algorithm has been introduced recently, in which the reference is separated into an integer part and a fractional part. The fractional part is, in essence, a two-level multiphase space vector algorithm. This paper shows that, with appropriate adaptations, the fractional part of the general space vector multilevel multiphase PWM can be applied as a stand-alone PWM method in conjunction with two-level voltage-source converters with any number of phases. Simulation results of the five- and six-phase cases are shown, and the new algorithm is compared with another recent multifrequency SVPWM algorithm, which follows the standard approach of selecting the switching vectors and calculating their application times using dq planes. The experimental verification is provided using a five-phase two-motor series-connected induction motor drive, supplied from a custom-designed five-phase voltage-source inverter. [ABSTRACT FROM AUTHOR]

This paper applies nearest level control (NLC) to the modular multilevel converter (MMC). Since there are a number of submodules (SMs) in high-voltage applications of MMC and all SM voltages are required to be measured and sorted, if the uniform sampling frequency is not high enough, the SM will not be triggered as quickly as possible. Thus, the converter-output voltage levels and voltage harmonics will be affected. A method to systematically analyze the voltage harmonics is presented, considering the uniform sampling frequency. In order to select a proper sampling frequency, two critical values, which significantly influence the output voltage levels and voltage total harmonic distortions, are calculated. Simulation results based on PSCAD/EMTDC proved the validity of the proposed modulation scheme and the importance of a properly selected sampling frequency. [ABSTRACT FROM AUTHOR]

This paper presents a neutral point voltage control strategy for the three-level active neutral point clamped (ANPC) converter using selective harmonic elimination pulsewidth modulation (SHE-PWM). The control strategy introduces a small change in the switching angles, which varies the duty cycle of the zero-level switching state, controls the neutral point current and, therefore, the neutral point voltage. The decision to vary a given switching angle takes into account the polarity of the output currents and the voltage across the lower dc-link capacitor. The effectiveness of the proposed strategy is verified through extensive simulation studies and experimentally validated using a low power laboratory prototype. [ABSTRACT FROM AUTHOR]

A novel H-bridge multilevel pulsewidth modulation converter topology based on a series connection of a high-voltage diode-clamped inverter and a low-voltage conventional inverter is proposed in this paper. A dc link voltage arrangement for the new hybrid and asymmetric solution is presented to have a maximum number of output voltage levels by preserving the adjacent switching vectors between voltage levels. Hence, a 15-level hybrid converter can be attained with a minimum number of power components. A comparative study has been carried out to present high performance of the proposed configuration to approach a very low total harmonic distortion of voltage and current, which leads to the possible elimination of the output filter. Regarding the proposed configuration, a new cascade inverter is verified by cascading an asymmetrical diode-clamped inverter, in which 19 levels can be synthesized in output voltage with the same number of components. To balance the dc link capacitor voltages for the maximum output voltage resolution as well as synthesize asymmetrical dc link combination, a new multi-output boost converter is utilized at the dc link voltage of a seven-level H-bridge diode-clamped inverter. Simulation and hardware results based on different modulations are presented to confirm the validity of the proposed approach to achieve a high-quality output voltage. [ABSTRACT FROM PUBLISHER]

This paper addresses the problem of time-optimal load-transient response in digitally controlled dc–dc buck converters incorporating an inductor current limitation. The concept of current-limited, time-optimal control (CL-TOC) is introduced and compared to the conventional unconstrained time-optimal solution. A fundamental tradeoff between maximum-allowed current overshoot and voltage recovery time is recognized and analytically formulated, thus providing the engineer with the necessary analytical tools for performance evaluation. Furthermore, the minimum number of switching actions required to handle a generic CL-TOC transient is determined, thus leading to the formulation of a minimum-switch CL-TOC concept. Two distinct approaches for implementing minimum-switch digital CL-TOC are then introduced. The first method extends a parameter-independent time-optimal control that has the advantage of achieving the time-optimal switching sequence without the need for a prior knowledge of the output filter LC parameters or input voltage. The second approach implements a near CL-TOC employing the switching-surface concept and defining the current limitation in the state space. Experimental results are provided to validate the theory and demonstrate the effectiveness of the approaches. [ABSTRACT FROM PUBLISHER]

The output voltage quality of some of the single-phase multilevel inverters can be improved when their dc-link voltages are regulated asymmetrically. Symmetrical and asymmetrical multilevel diode-clamped inverters have the problem of dc-link capacitor voltage balancing, especially when power factor of the load is close to unity. In this paper, a new single-inductor multi-output dc/dc converter is proposed that can control the dc-link voltages of a single-phase diode-clamped inverter asymmetrically to achieve voltage quality enhancement. The circuit of the presented converter is explained and the main equations are developed. A control strategy is proposed and explained in details. To validate the versatility of the proposed combination of the suggested dc–dc converter and the asymmetrical four-level diode-clamped inverter (ADCI), simulations and experiments have been directed. It is concluded that the proposed combination of introduced multioutput dc–dc converter and single-phase ADCI is a good candidate for power conversion in residential photovoltaic (PV) utilization. [ABSTRACT FROM PUBLISHER]

This paper proposes a method to obtain the rotor position of switched reluctance motors (SRMs) by means of voltage measurements. It is shown that the combination of a motor and a power-electronic converter defines a resonant circuit, comprising the motor phase inductances and the parasitic capacitance of converter switches, power cables, and motor phase windings. For salient machines, in general, the associated resonance frequency of the circuit depends on the rotor position. In the position-estimation method, an initial voltage distribution is imposed over the impedances of the resonant circuit after which the circuit is let to oscillate freely. During this phase of free oscillation, the induced voltage over a phase winding exhibits a damped oscillatory behavior, from which position information can be retrieved. An overview is given of the different possibilities to trigger the voltage resonance. It is shown that the proposed position-estimation method has favorable characteristics such as measurement of large-amplitude voltages, robustness against temperature deviations of motor and power semiconductors, very high update rates for the estimated position, and absence of sound and disturbance torque. Experimental results are given for a sensorless commutation scheme of an SRM under small load. [ABSTRACT FROM AUTHOR]