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In this paper, many impedance-source inverters with coupled inductors have been investigated to obtain a high step-up boost ratio. However, the leakage inductors in these topologies induce great voltage spikes at the dc link, which will increase the voltage stress of switches. Thus, the power level of inverters is limited. Furthermore, the efficiency of the inverters can be degraded by the losses associated with leakage inductors. To address abovementioned issues, this paper proposes a family of low-spike high-efficiency Y-source inverters. The proposed inverters have the ability of eliminating voltage spikes at the dc link and recycling the leakage energy via the additional diode and capacitor. In order to show the excellent characteristics of the proposed topologies, this paper compares the performances of the proposed inverters and the improved-Y-source inverter in many aspects. Simulation and experimental results have verified the abilities of the proposed inverters. [ABSTRACT FROM AUTHOR]

This paper proposes a high-efficiency single-phase T-type boundary conduction mode (BCM) microinverter. The conventional full-bridge BCM microinverter has achieved zero voltage switching (ZVS) and thereby improved the efficiency, but it suffers from high switching losses under light load conditions. The proposed T-type BCM microinverter reserves ZVS and uses a multilevel technique to further decrease the switching losses. The BCM operation with multilevel technique will have too low switching frequency when the grid voltage approaches half of the dc link voltage. To solve this problem, this paper adopts a third operation mode for the T-type switching leg to maintain the switching frequency above a minimum value. The corresponding mode transitions are also detailed to ensure a smooth operation. Because of the turn-offdelay of the freewheeling transistor, the actual lower current boundary deviates from the programmed one, which will distort output current. To address this issue, this paper also proposes a boundary compensation method. A prototype has been built for performance verification, which can test both full-bridge and T-type topology. Compared with the full-bridge BCM microinverter, the proposed T-type BCM microinverter has a higher efficiency over the whole load range. [ABSTRACT FROM AUTHOR]

This paper proposes a new high-efficiency photovoltaic (PV) converter for grid connection through a high-leg delta transformer. The converter is composed of a symmetrically connected boost converter and three half-bridge inverters. One of the three half-bridge inverters is connected to the boost converter, and the others are directly connected to the PV terminals. As a result, this circuit configuration enables to reduce the power losses in both boost converter and inverters. This paper also proposes a new cooperative control method between the symmetrically connected boost converter and inverter. The control method can reduce the average switching frequency to 75% of that in a conventional one, resulting in a great reduction in the switching power loss. Experimental results confirm that the proposed circuit configuration makes it possible to improve its European efficiency from 91.6% to 94.5%. Moreover, system performance is evaluated on the assumption of maximum power point tracking operation. [ABSTRACT FROM AUTHOR]

This paper proposes a new single-phase single-stage switched-boost inverter with four switches. Like the quasi-Z-source inverter and quasi-switched boost inverter (qSBI), the proposed inverter has the main features as continuous input current, buck/boost voltage with single-stage conversion, and shoot-through immunity. Compared to the qSBI, the proposed inverter uses one more capacitor and one less switch. This paper presents the operating principles, pulse-width modulation control strategy, parameter design guidelines, and simulation results for the proposed inverter. To verify the performance of the proposed inverter, an 800-W prototype was built with an 110 V/50 Hz output voltage in stand-alone and grid-connected modes. The simulation and experimental results matched those of the theoretical analysis. [ABSTRACT FROM AUTHOR]

In this paper, two structures are proposed for the switched-inductor quasi-Z-source inverter. In the proposed structures to extend the voltage gain of inverter, two new switched-inductor structures are used. In the proposed structures, voltage across the capacitors in the Z-source network and in the switched-inductor is symmetric and small. The other advantage of proposed inverters is known as achieving higher voltage gain per smaller duty cycle ratio (of shoot-through). Compared with a conventional continuous input current switched-inductor quasi-Z-source inverter at the same gain voltage, there is less of a ripple of input current in the proposed inverters. In this paper, at first the both the conventional and the proposed switched-inductor Z-source inventers are thoroughly investigated to find out their governing relations. Then, the proposed Z-source inverters are compared with the conventional ones by simulating them to assess their performance efficiency. Next, applying the simple boost pulse width modulation the simulation is carried out with PSCAD/EMTDC software. After that, to evaluate the obtained results, the prototypes of the proposed inverters with 48 Vdc input voltage are used. [ABSTRACT FROM PUBLISHER]

In this paper, new half-bridge and full-bridge topologies for a switched-boost inverter are proposed. These topologies have a high boost factor in comparison with conventional types. In addition, the proposed topologies have continuous input current and can generate zero-voltage level in output. In this paper, the operation of the proposed inverters in different operating modes is analyzed. Then, the values of inductors and capacitors are designed. Moreover, the used switching pattern and its logical diagram are introduced. A comprehensive comparison between the proposed and conventional topologies in terms of the boost factor, the number of elements, and the efficiency shows the good features of the proposed inverters. Finally, to verify correct operation of the proposed topologies and derived equations, simulation and experimental results are presented. [ABSTRACT FROM AUTHOR]

In this paper, two topologies are presented for the enhanced-boost quasi-Z-source inverters (qZSI), namely continuous input current configuration and discontinuous input current configuration of enhanced-boost qZSI with two-switched impedance networks. Similar to enhanced-boost impedance-source inverters (ZSIs), these proposed inverter topologies possess very high boost voltage inversion at low shoot-through duty ratio and high modulation index to provide an improved quality output voltage. Compared to enhanced-boost ZSIs with two-switched Z-source impedance networks, these proposed inverter topologies share common ground with source and bridge inverter, overcome the starting inrush problem, and draw continuous input current and the lower voltage across the capacitors. Moreover, the input ripple current is negligible. This paper presents the operating principles and analysis of continuous input current configuration enhanced-boost qZSI with two-switched impedance networks and compares with ZSI, switched inductor ZSI, DA/CA-qZSI, and enhanced-boost ZSIs. The theoretical analysis is done and is validated through simulation and experimental results. [ABSTRACT FROM PUBLISHER]

In order to provide high and extendable power levels for inductive power transfer (IPT) system, a parallel multi-inverter system based on modular inverter is presented. Various power requirements can be implemented by an adjustment of the number of paralleled inverters, which provides a high modularity. A master−slave scheme is employed for the switching-driver signals of parallel inverters, where one acts as a leader while others act as followers. Despite the master−slave scheme, the proposed circuit topology has natural robustness because of the equality in terms of the hardware configuration of each modular inverter. For proper parameters, the output phase (current lagging corresponding voltage) of an inverter is lower than the average of output phase of all inverters, when its output voltage lags behind others, and vice versa. Based on this approach, PI controllers are designed to implement phase synchronization for output voltages of all inverters. An IPT prototype supplied by the proposed parallel multi-inverter with three inverters was designed, built, and tested. Experiments show that the proposed parallel multi-inverter system has not only good circulating current suppression capacity but also excellent performance of phase synchronization. The maximum dc−dc efficiency was 94% at a 35.1 kW receiving power. This paper is accompanied by a Matlab/Simulink file demonstrating phase synchronization control. [ABSTRACT FROM AUTHOR]

Impedance-source inverters using coupled inductors have been investigated as alternatives for providing high step-up voltages. However, leakage inductances of the coupled inductors have commonly led to lower overall effectiveness, in addition to generating high dc-link voltage spikes. The latter raises voltage stresses of switches, which in turn, may reduce the power levels of the inverters. A high step-up Y-source inverter has therefore been proposed in this paper to provide a high boost with a smooth dc-link voltage ensured by proper recycling of the leakage energy. These features have been verified by comparing simulation and experimental results of an existing Y-source and the proposed inverters. Factors compared are their respective boost ratios, voltage stresses, current stresses, and dc-link voltage spikes. [ABSTRACT FROM AUTHOR]

A 1-φ hybrid nine-level inverter (H9LI) topology has been proposed in this paper. The proposed H9LI topology uses a simple phase disposition pulsewidth modulation strategy to generate nine-voltage levels in the output. The main advantage of this topology is that it has a low switch count (ten switches) compared to the existing nine-level inverter topologies. To regulate the voltage across auxiliary capacitor, two innovative control techniques are proposed, which are integrated with the inverter modulation technique itself. Hence, it does not require any extra voltage balancing circuits to maintain the voltage across the auxiliary capacitor and input dc capacitors. A major advantage of these control techniques is that they eliminate the sensing of the coupled inductor current. Another significant advantage of H9LI is that loss distribution among all the power switches is more uniform compared to existing nine-level inverters. Due to low part count and absence of extra voltage balancing circuits, the H9LI achieves higher efficiency (η ≍ 94.5%) and lower cost. Furthermore, the requirement of filter size reduces due to the presence of coupled inductor in H9LI. The proposed 1-φ grid connected H9LI is verified through MATLAB/Simulink simulations and validated through experiments on a laboratory prototype of 400-VA rating. [ABSTRACT FROM AUTHOR]

The three-phase four-wire inverter with split dc-link capacitors can supply unbalanced loads. For the purpose of reducing the filter inductors, a neutral inductor could be introduced into the neutral line. This paper analyzes the operation principle of the three-phase four-wire inverter with split dc-link capacitors when a neutral inductor is introduced. It is illustrated that the neutral inductor can reduce the zero-sequence switching harmonics in the voltages between the phase-leg midpoints and the output neutral point, thus the filter inductors can be reduced. The optimized design of the neutral inductor and filter inductors is proposed with the considerations of the inductor current ripple, the ability of supplying unbalanced loads, and the total energy stored in the inductors. The equivalent circuits of the three-phase four-wire inverter with split dc-link capacitors and neutral inductor is derived in the α–β–0 frame, and the zero-axis voltage regulator is modified to suppress the third-order harmonic in the zero-sequence current caused by the deadtime of the drive signals for the power switches. Finally, the experimental results from a 9-kW prototype are provided to prove the effectiveness of the proposed optimized design of the neutral inductor and filter inductors and the control strategy of the inverter. [ABSTRACT FROM AUTHOR]

This paper proposes a new diode-clamped multilevel inverter that can effectively balance the voltages of dc capacitors. For the proposed inverter, the inductors are inserted between the diodes and the main switches. Also, the voltage balance of the dc capacitors can be guaranteed by controlling the opening time of the corresponding main switches in particular modes. Thus, the parallel circuits on the dc side in the conventional inverters are canceled. Consequently, the proposed topology requires fewer switches, diodes, and capacitors, although it adds the compensation currents to the corresponding main switches. Both the simulation and experimental results demonstrate the suitability and applicability of the proposed topology. [ABSTRACT FROM AUTHOR]

This paper investigates a multilevel inverter composed of series/parallel-connected H-bridges. The presented structure can be used for applications in which the use of semiconductor switches with low-voltage and low-current ratings is intended. A comprehensive system model, an overall control strategy to adjust the output voltage with constant magnitude and frequency, and a level-shifted PWM (LS-PWM) strategy based on a voltage vectors unidimensional analysis and a plane analysis are presented. The LS-PWM is capable of mitigating the low-frequency circulating current, thus generating multilevel voltage signals with low harmonic distortion, maximum number of levels, and low dv/dt. In addition, considering a wide range of values of voltages and currents and various power levels, the total converter losses are reduced compared with the conventional multilevel converters. Two multilevel conventional inverters with the same number of semiconductor switches are used for comparison. Simulation and experimental results demonstrate the feasibility of the studied converter. [ABSTRACT FROM AUTHOR]

Leakage current minimization is one of the most important considerations in transformerless photovoltaic (PV) inverters. In the past, various transformerless PV inverter topologies have been introduced, with leakage current minimized by the means of galvanic isolation and common-mode voltage (CMV) clamping. The galvanic isolation can be achieved via dc-decoupling or ac-decoupling, for isolation on the dc- or ac-side of the inverter, respectively. It has been shown that the latter provides lower losses due to the reduced switch count in conduction path. Nevertheless, leakage current cannot be simply eliminated by galvanic isolation and modulation techniques, due to the presence of switches' junction capacitances and resonant circuit effects. Hence, CMV clamping is used in some topologies to completely eliminate the leakage current. In this paper, several recently proposed transformerless PV inverters with different galvanic isolation methods and CMV clamping technique are analyzed and compared. A simple modified H-bridge zero-voltage state rectifier is also proposed, to combine the benefits of the low-loss ac-decoupling method and the complete leakage current elimination of the CMV clamping method. The performances of different topologies, in terms of CMV, leakage current, total harmonic distortion, losses and efficiencies are compared. The analyses are done theoretically and via simulation studies, and further validated with experimental results. This paper is helpful for the researchers to choose the appropriate topology for transformerless PV applications and to provide the design principles in terms of common-mode behavior and efficiency. [ABSTRACT FROM AUTHOR]

Generally, single-stage buck–boost inverters consist of distinct circuits operating individually in buck/boost or positive/negative modes, the latter definitely leading to crossover distortion in the output current. This paper proposes a switching strategy that changes the bimodal operation of a single-stage buck–boost topology to a single-mode inverter. This is due to the consequent voltage gain that ensures that the output voltage polarity, apart from its magnitude, is an exclusive function of the duty ratio. Operational principle and salient hardware design are explained with the help of equivalent circuits. Details about the dynamic model are presented, based on which controller design is carried out for both stand-alone and grid-connected operation. Experimental results obtained from a 300-W, 110-V laboratory prototype are presented to validate the performance of the proposed switching strategy. [ABSTRACT FROM PUBLISHER]

In this paper, dual-buck structured single-stage buck–boost inverters that use power MOSFETs to achieve high efficiency are presented. The proposed inverters require fewer switches, and half of the switches have reduced current stresses. They have no shoot-through problem; therefore, high system reliability can be obtained. The dead-time in PWM signals can be minimized or eliminated, which improving the quality of the output ac voltages and increasing the efficiency. In the proposed inverters, MOSFETs can be used without reverse-recovery issues of their body diodes to boost the efficiency and increase the switching frequency. To further improve the efficiency and stability of the proposed single-phase inverter, PWM strategies combining high- and low-frequency modulation are presented. A hardware prototype of the single-phase inverter was built and tested using resistive, inductive, and nonlinear loads. Experimental results for a 300-W prototype inverter show a 97.4% peak efficiency with a 25 kHz switching frequency. [ABSTRACT FROM AUTHOR]

The parallel three-phase grid-connected converters sharing dc and ac bus can increase the system power level effectively. However, the zero sequence circulating current (ZSCC) will occur inevitably under space vector pulse width modulation or discontinuous pulse width modulation (DPWM). In this paper, the mechanism and the mathematical model of ZSCC are studied. Then, a hybrid PWM (HPWM) strategy is proposed to suppress the ZSCC based on the same zero sequence voltage injected, which is dependent on the common grid information. The dc voltage utilization of HPWM can be extended compared with sinusoidal PWM (SPWM). The number of parallel modules can be infinity theoretically by using HPWM. It is noted that there is no internal commutation among modules (expect the dq current reference). Finally, the feasibility and the effectiveness of the proposed method are verified by experiments. [ABSTRACT FROM AUTHOR]

The battery energy-stored quasi-Z-source (BES-qZS)-based photovoltaic (PV) power generation system combines advantages of the qZS inverter and the battery energy storage system. However, the second-harmonic ( \text2\omega ) power ripple degrades the system's performance and affects the system's design. An accurate model to analyze the \text2\omega ripple is very important. The existing models did not consider the battery, or assumed a symmetric qZS network with $L_{{1}}= L_{{2}}$ and $C_{{1}}= C_{{2}}$, which limits the design freedom and causes oversized impedance parameters. This paper proposes a comprehensive model for the single-phase BES-qZS-PV inverter system, where the battery is considered and there is no restriction of $L_{{1}}= L_{{2}}$ and $C_{{1}}= C_{{2}}$ . Based on the built model, a BES-qZS impedance design method is proposed to mitigate the \text2\omega ripple with asymmetric qZS network. Simulation and experimental results verify the proposed \text2\omega ripple model and impedance design method. [ABSTRACT FROM AUTHOR]

This paper presents a variable switching point predictive current control (VSP $^2$CC) for the quasi-Z-source inverter (qZSI). The proposed VSP $^2$CC aims to remove the output current error on the ac side, as well as the inductor current and capacitor voltage errors of the quasi-Z-source network on the dc side of the converter. Unlike the previously presented direct model predictive control (MPC) strategies for the qZSI, the proposed control scheme can directly apply the switching signals not only at the discrete time instants, but at any time instant within the sampling interval. Consequently, the shoot-through state can be applied for a shorter time than the sampling interval, resulting in lower output and inductor currents ripples. Experimental results based on field programmable gate array are provided to verify the effectiveness of the introduced control method. As it is shown, the proposed method leads to lower inductor current ripples and less output current total harmonic distortion when compared with the conventional direct MPC. [ABSTRACT FROM AUTHOR]

Traditional load regulation methods for a resonant converter mainly rely on frequency modulation. It is always a tradeoff between the design of the resonant network and the range of load. Especially for wireless power transfer (WPT) systems, the resonant network usually has a high quality factor. Small variation on frequency leads to huge drop in gain and efficiency. Due to this problem, many WPT systems are unregulated and they need one or two more front-end stages to regulate the dc bus voltage and perform power factor correction (PFC). In order to lower the cost and complexity of two- or three-stages structure, a single-stage solution with a silicon carbide (SiC) based Z-source resonant converter (ZSRC) was recently proposed. The Z-source network provides high reliability as being immune to shoot-through problems. Additionally, a ZSRC can boost the dc bus voltage while the traditional voltage-source inverter can only produce a lower voltage. However, the load regulation of this new topology has not been addressed. Two effective load regulation methods with constant frequency are presented for this SiC-based ZSRC specifically. Operation principle of the two load regulation methods are described in this paper. Experimental results based on a 200-W scale-down prototype with a full-bridge series resonant dc–dc converter are presented to illustrate the mechanism of these two methods. [ABSTRACT FROM AUTHOR]

The Z-source inverter (ZSI) employs an LC impedance network between the main inverter bridge and the power source. The unique feature of the ZSI is that it can operate either in buck or boost mode with a wide range of obtainable output voltages from a given input voltage. This topology also exhibits better electromagnetic-interference noise immunity when compared to a traditional voltage-source inverter (VSI). However, the LC impedance network of ZSI significantly increases the size and cost of the power converter and can make it unsuitable for low-power applications. This paper proposes a novel topology called switched boost inverter (SBI) which exhibits similar advantages of ZSI with lower number of passive components and more active components compared to ZSI. The steady-state and small-signal analyses of SBI, along with its pulsewidth modulation (PWM) control strategies, have been discussed in this paper. This paper also presents a comparison of SBI and ZSI with the same input and output parameters. The theoretical analysis given in this paper has been validated using a laboratory prototype of SBI, and the experimental results are presented for verification. The experimental harmonic spectrum of the inverter's output voltage with the proposed PWM technique is also plotted and compared with that of a traditional VSI. All the experimental results show good correlation between theory and experiments. [ABSTRACT FROM PUBLISHER]

This paper focuses on the common dc-link voltage between a three-phase diode rectifier and a modular multilevel cascade inverter based on double-star chopper cells (MMCI-DSCC) for a medium-voltage motor drive. This motor drive can be operated even when no capacitor exists on the dc link. However, a nonnegligible, but predictable, amount of switching-ripple voltage occurs on the dc link. This paper achieves modeling and analysis of the switching-ripple voltage, thus making it possible to design a small-sized dc passive filter consisting of series connection of a film capacitor and a damping resistor. A 400-V, 15-kW down scaled system is used to confirm the effectiveness of the analysis and the dc filter. Experimental results show that the switching-ripple voltage can be attenuated satisfactorily by the dc filter, and that the power loss dissipated in the damping resistor is negligible, compared to the rated power of 15 kW. [ABSTRACT FROM AUTHOR]

This paper presents a new single-phase switched-coupled-inductor dc–ac inverter featuring higher voltage gain than the existing single-phase qZ-source and semi-Z-source inverters. Similar to the single-phase qZ-source and semi-Z-source inverters, the proposed inverter also has common grounds between the dc input and ac output voltages, which is beneficial especially for photovoltaic inverter systems. The inverter volume and maximum current flowing can be reduced significantly through the coupling of all inductors. A theoretical analysis of the proposed inverter is described and a 280-W experimental prototype is built to verify the performance of the inverter. [ABSTRACT FROM AUTHOR]

This paper proposes a single-phase, single-stage buck–boost inverter for photovoltaic (PV) systems. The presented topology has one common terminal in input and output ports which eliminates common mode leakage current problem in the grid-connected PV applications. Although it uses four switches, its operation is bimodal and only two switches receive high-frequency pulse width modulation signals in each mode. Its principle of operation is described in detail with the help of equivalent circuits. Its dynamic model is presented, based on which a bimodal controller is designed. Experimental results, in stand-alone and grid-connected mode, obtained with a 300-W laboratory prototype are presented to validate its performance. [ABSTRACT FROM AUTHOR]

This paper presents a new family of hybrid Z-source boost dc–dc converters intended for photovoltaic applications, where the high step-up dc–dc converters are demanded to boost the low-source voltages to a predefined grid voltage. Because the boost capabilities of the traditional Z-source networks are limited, the proposed converters are composed of combine traditional Z-source networks in different ways to enhance the boost abilities of the traditional Z-source networks. The new version of the proposed Z-source converters is termed as hybrid Z-source boost dc–dc converters to satisfy the traditional benefits of Z-source networks with stronger voltage boost abilities which can also be applied to dc–ac, ac–ac, and ac–dc power conversions. The performances of the proposed converters are compared with other Z-source networks behaviors. The simulation and experimental results of the proposed converters are validated at different operating conditions. [ABSTRACT FROM PUBLISHER]

A new single-phase \uppi-\texttype 5-level inverter using 3-terminal switch-network (3TSN) is proposed in this paper. The topology is considered as a variant of T-type 3-level structure or dual-buck inverter with coupled inductors. This new inverter is suitable for multilevel power inversion with low dc-bus voltage. The merit of the proposed topology is to apply only four active power switches to achieve 5-level operation. Other benefits include double frequency operation of output inductor and equal division of the current that flows through power switches and filter inductor. Hence, it leads to high efficiency and low harmonics. These characteristics allow improvement of losses distribution and volume reduction of output filter inductor. The operation scenario with sinusoidal pulsewidth modulation (SPWM) is described in details. Meanwhile, the magnetic analysis and design are studied and discussed. Finally, a prototype is built to verify the theoretical analysis and demonstrate the benefits of the proposed topology. [ABSTRACT FROM AUTHOR]

Voltage source inverter cannot provide an output voltage higher than its input and needs a dead-time scheme for its switches to prevent dc-link short circuit due to spurious turn-on of switches by electromagnetic interference (EMI). Impedance source inverters have eliminated these disadvantages by providing boost functionality with improved EMI immunity. Coupled inductor-based impedance source inverters provided increased gain at the expense of increased coupled inductor turns-ratio. In this paper, a coupled inductor based high gain inverter is proposed, which achieves higher gain by increasing the coupled inductor turns-ratio (n = n2/n1) within a very narrow turns-ratio range of $0 \leq n < 1$, which is a major improvement over the other coupled inductor based high boost impedance source inverters. The proposed inverter, named Improved Trans–Current–Fed Switched Inverter, is described along with its equivalent operating states and relation between its input and output variables are derived. The steady-state inverter waveforms are shown using PSpice simulations. The operation of the inverter is validated by the experimental results, which show strong correlation with the theoretical analysis. A 110-V RMS ac output is obtained from 26-V dc input using a coupled inductor with turns-ratio of 0.33 to demonstrate its high-boost operation. [ABSTRACT FROM PUBLISHER]

This paper describes novel single-phase solutions with increased inverter voltage levels derived by means of a nonstandard inverter configuration and impedance source networks. Operation principles based on special modulation techniques are presented. Detailed component design guidelines along with simulation and experimental verification are also provided. Possible application fields are discussed, as well as advantages and disadvantages. Finally, future studies are addressed for the new solutions. [ABSTRACT FROM PUBLISHER]

This paper deals with a new family of high boost voltage inverters called switched-inductor quasi-Z-source inverters (SL-qZSIs). The proposed SL-qZSI is based on the well-known qZSI topology and adds only one inductor and three diodes. In comparison to the SL-ZSI, for the same input and output voltages, the proposed SL-qZSI provides continuous input current, a common ground with the dc source, reduced the passive component count, reduced voltage stress on capacitors, lower shoot-through current, and lower current stress on inductors and diodes. In addition, the proposed SL-qZSI can suppress inrush current at startup, which might destroy the devices. This paper presents the operating principles, analysis, and simulation results, and compares them with those of the SL-ZSI. To verify the performance of the proposed converter, a laboratory prototype was constructed with 48 Vdc input and an ac output line-to-line voltage of 120 Vrms. The simulation and experimental results verified that the converter has high step-up inversion ability. [ABSTRACT FROM AUTHOR]

A family of isolated buck–boost dc/dc converter for wide input-voltage range is proposed in this paper, and the full-bridge (FB) boost converter, being one of the typical topologies, is analyzed. Due to the existence of the resonant inductor (including the leakage inductor), the FB-boost converter can only adopt the two-edge-modulation (TEM) scheme with the FB cell being leading-edge modulated and the boost cell being trailing-edge modulated to minimize the inductor current ripple over the input-voltage range, and a phase-shift-control-scheme-based TEM with the use of the market available controller IC such as UC3895 is proposed, which realizes phase-shifted control for the FB cell to achieve zero-voltage switching. In order to improve the reliability and efficiency of the FB-boost converter, a three-mode dual-frequency control scheme is proposed, in which the FB-boost converter operates in boost, FB-boost and FB modes in low, medium and high input voltage regions, respectively, and for which the expression of the inductor current ripple is derived in this paper. As the input voltage in the FB-boost mode is close to the output voltage, the inductor current ripple in this mode is much smaller than that in the other modes, and the switching frequency of the boost cell in this mode can be lowered to one-(2N+1)th of the preset switching frequency to reduce the switching loss, and hence, to improve the efficiency. A 250–500 V input, 360 V output, and 6 kW rated power prototype is fabricated to verify the effectiveness of the design and control method. The average efficiency over the input-voltage range is 96.5%, and the highest efficiency attained is 97.2%. [ABSTRACT FROM AUTHOR]

In many modern energy conversion systems, a dc voltage, which is provided from a sustainable energy source or energy storage device, must be boosted and converted to an ac voltage with a fixed amplitude and frequency. In this paper, a switching pattern based on the concept of the conventional space-vector pulsewidth-modulated (SVPWM) technique is developed for single-stage, three-phase boost-inverters using the topology of current-source inverters. The six main switching states, and two zeros, with three switches conducting at any given instant in conventional SVPWM techniques are modified herein into three-charging states and six discharging states with only two switches conducting at any given instant. The charging states are necessary in order to boost the dc input voltage. The developed switching pattern was experimentally verified through a laboratory-scaled three-phase 500-W boost inverter and the results are presented in this paper. [ABSTRACT FROM AUTHOR]

The conventional current-source inverter has two major problems: unidirectional power flow and voltage boost operation, which make it impossible to be used in many applications, such as hybrid electric vehicles and general-purpose variable-speed motor drives. Z-source inverters (ZSIs) can solve both problems. Quasi-ZSIs (qZSIs) were recently proposed as an important improvement to traditional ZSIs. Besides the advantages inherited from ZSIs, qZSIs also have several of their own merits. This paper presents a comprehensive study on the new features of current-fed qZSI, including the advantageous buck–boost function, improved reliability, reduced passive component ratings, and unique regeneration capability. The current-fed qZSIs are bidirectional with an additional diode, unlike the voltage-fed ZSI that needs a switch to achieve bidirectional power flow. A modified space vector pulse-width-modulation method is proposed, and the available operating regions for motoring and regeneration operation are analyzed in this paper. Since the current-fed qZSI has the same operation as the current-fed ZSI, many results of this paper are also applicable to the current-fed ZSI. A reverse-blocking insulated-gate bipolar-transistor-based current-fed qZSI prototype was developed in the laboratory. Simulation and experimental results are shown to verify the theoretical analysis. [ABSTRACT FROM PUBLISHER]

In this paper, a new topology for half-bridge switched boost inverter (HB-SBI) is proposed. The proposed half-bridge inverter uses more active elements rather than capacitors and inductors in comparison with the conventional half-bridge Z-source inverter with two Z-networks, which results in reduction of weight, size, and cost. Moreover, the proposed inverter has the capability of eliminating inverter leg short-circuit issues and is able to further increase the output voltage level in comparison with its conventional types. Generating zero-level output voltage is also another advantage of this topology. Based on theoretical calculations, the steady-state and small-signal analysis of the proposed topology in different operating modes are performed and the ripple of inductors’ current and capacitors’ voltage are also calculated. A comprehensive comparison is also made between the proposed inverter and the conventional types. Finally, the experimental results are provided to reconfirm the performance of the proposed inverter. [ABSTRACT FROM PUBLISHER]

In this paper, a common grounded Z-source dc–dc converter with high voltage gain is proposed for photovoltaic (PV) applications, which require a relatively high output–input voltage conversion ratio. Compared with the traditional Z-source dc–dc converter, the proposed converter, which employs a conventional Z-source network, can obtain higher voltage gain and provide the common ground for the input and output without any additional components, which results in low cost and small size. Moreover, the proposed converter features low voltage stresses of the switch and diodes. Therefore, the efficiency and reliability of the proposed converter can be improved. The operating principle, parameters design, and comparison with other converters are analyzed. Simulation and experimental results are given to verify the aforementioned characteristics and theoretical analysis of the proposed converter. [ABSTRACT FROM PUBLISHER]

Class EF and Class E/F inverters are hybrid inverters that combine the improved switch voltage and current waveforms of Class F and Class F-1 inverters with the efficient switching of Class E inverters. As a result, their efficiency, output power and power output capability can be higher in some cases than the Class E inverter. Little is known about these inverters and no attempt has been made to provide an in depth analysis on their performance. The design equations that have been previously derived are limited and are only applicable under certain assumptions. This paper is the first to provide a comprehensive set of analytical analysis of Class EF and Class E/F inverters. The Class EF$_2$ inverter is then studied in further detail and three special operation cases are defined that allow it to either operate at maximum power-output capability, maximum switching frequency, or maximum output power. Final design equations are provided to allow for rapid design and development. Experimental results are provided to confirm the accuracy of the performed analysis based on a 23-W Class EF$_2$ inverter at 6.78-MHz and 8.60-MHz switching frequencies. The results also show that the Class EF $_2$ inverter achieved an efficiency of 91% compared to a 88% efficiency when operated as a Class E inverter. [ABSTRACT FROM AUTHOR]

This paper proposes a new topology for an enhanced-boost Z-source inverter (ZSI) with combined two Z-impedance networks. By two Z-impedance networks and low shoot-through duty cycle, the proposed inverter produces high output voltage gain. In traditional ZSIs for high boosting voltage, a low modulation index is required; hence, under these conditions, the output voltage will have low quality with high total harmonic distortion. Compared with the conventional high-boost ZSI topologies, the proposed inverter uses shorter shoot-through duration and a larger modulation index to improve the output waveform quality. Comparison between the proposed topology and previously proposed schemes, in terms of inductor numbers, voltage and current stresses on elements, sizes of inductors and capacitors, efficiency, and switching device product (SDP) factors of diodes, is made, and the results verify the priority of the proposed topology. The operating principle of the proposed topology is analyzed in detail. Both simulation and experimental results verify the high performance of the proposed inverter. [ABSTRACT FROM PUBLISHER]

This paper proposes a new topology named the active-switched-capacitor/switched-inductor quasi-Z -source inverter (ASC/SL-qZSI), which is based on a traditional qZSI topology. Compared to other qZSI-based topologies under the same operating conditions, the proposed ASC/SL-qZSI provides higher boost ability, requires fewer passive components such as inductors and capacitors, and achieves lower voltage stress across the switching devices of the main inverter. Another advantage of the topology is its expandability. If a higher boosting rate is required, additional cells can easily be cascaded at the impedance network by adding one inductor and three diodes. Both the simulation studies and the experimental results obtained from a prototype built in the laboratory validate proper operation and performance of the proposed ASC/SL-qZSI. [ABSTRACT FROM AUTHOR]

In this paper, an analysis and calculation of the dc-link current and voltage ripples are presented for a three-phase inverter with unbalanced load. A comparison of the dc-link average and root-mean-square (rms) currents between considering and ignoring high frequency harmonics of the output current is drawn. It is shown that high frequency harmonic currents have little effect on the dc-link current, and therefore, they can be ignored. Based on the symmetrical components method, the dc-link average and harmonic rms currents are derived, and the dc-link voltage ripple is compared between the balanced and unbalanced loads. It can be found that the dc-link current and voltage ripples consist of not only high frequency harmonics but also the double fundamental frequency harmonic, and the voltage ripple is independent of the positive-sequence component and determined by the negative-sequence component, under the unbalanced load. Experimental results are shown to verify the accuracy of the theoretical analysis. [ABSTRACT FROM AUTHOR]

This paper presents a new family of high efficiency dc/ac grid-tied inverter with a wide variation of input dc voltage. It is a “boost in boost, buck in buck” inverter, meaning that only one power stage works at high frequency in order to achieve minimum switching loss. The minimum voltage drop of the filtering inductor in the power loop is achieved to reduce the conduction power loss in both “boost” and “buck” mode. The principle of operation is demonstrated through the analysis on the equivalent circuits of a “half-bridge” single-phase inverter. The theoretical analysis shows that when input dc voltage is larger than the magnitude of the ac voltage, it is a voltage-source inverter, and on the contrary it is current-source inverter in the other mode. A 220 V/50 Hz/ 2000 W prototype has been constructed. Simulations and experiments show that it has a good control and system performance. [ABSTRACT FROM AUTHOR]

The quasi-Z-source cascaded multilevel inverter (qZS-CMI) presented many advantages over conventional CMI when applied in photovoltaic (PV) power systems. For example, qZS-CMI provides the balanced dc-link voltage and voltage boost ability, saves one-third modules, etc. However, current research studies only disclosed control of single-phase qZS-CMI-based PV power systems, and there was no literature related to control of three-phase qZS-CMI-based PV power systems. In this paper, for the first time, three-phase qZS-CMI's control is proposed and demonstrated for application to PV power systems. The models of PV-panel-fed qZS H-bridge module and qZS-CMI-based PV power system are built to accurately design control algorithms for each module and the whole system. The proposed control method includes the distributed maximum power point tracking for each module, dc-link peak voltage balance control for all modules, and grid-tie control for the whole system; moreover, a new multilevel space vector modulation method is proposed for the three-phase qZS-CMI. Simulation and experimental results on a test bench with a three-phase seven-level qZS-CMI-based PV power system verify the proposed control and modulation methods. [ABSTRACT FROM PUBLISHER]

On the basis of the classical Z-source inverter (ZSI), this paper presents a novel ZSI which only contains inductors and diodes in Z-source network. The inverter uses a unique inductor and diode network for boosting its output voltage, provides a common ground for the dc source and inverter, and avoids the disadvantage causing by capacitor in the classical ZSI and SL-ZSI, especially in prohibiting the inrush current at startup and the resonance of Z-source capacitors and inductors. The inverter can increase the boost factor through adjusting shoot-through duty ratio and increasing the number of inductor. The working principle of the proposed ZSI and comparison with the classical ZSI and SL-ZSI are analyzed in detail. Simulation and experimental results are given to demonstrate the operation features of the inverter. [ABSTRACT FROM AUTHOR]

This paper proposes the modeling and controller design of an autonomous PV module (APVM) which is composed of a PV panel and a four-switch buck-boost converter (FSBBC) for series-connected distributed maximum power point tracking (DMPPT) PV system applications. The FSBBC can operate in buck, boost, and buck-boost modes with less passive component counts and noninverted output voltage polarity. The switching strategy of the FSBBC with smooth transition during mode change is explained. The parameter design criteria and the small-signal ac model of the APVM are developed. Moreover, the design of controller based on the developed small-signal ac model and the stability analysis of the APVM are presented. Computer simulation and hardware experiment results are used to verify the accuracy of the small-signal model and the controller performance of the APVM. [ABSTRACT FROM AUTHOR]

This paper introduces a new dc-ac converter with the feature that it produces an instantaneous output voltage higher or lower than the input dc voltage without an intermediate power stage or transformers. This feature is provided by using one switching cell including two switches, two diodes, one inductor, and one capacitor on each inverter leg. Validating the theoretical analysis, a prototype was designed, built, and tested for an output rated power of 1 kW, a dc input voltage of 96Vdc, and output voltage of 110 Vrms. Furthermore, the fundamental output frequency was established at 60 Hz and the switching frequency at 20 kHz. [ABSTRACT FROM AUTHOR]

This paper presents a novel direct current-fed interleaved phase-modulated single-phase unfolding inverter for fuel-cell applications. Two active-clamped zero-voltage switching current-fed half-bridge isolated converters are interleaved in parallel input and series output configuration. Phase modulation is proposed to control these two converter cells, which generate a rectified sinusoidal pattern at the dc link. A simple H-bridge unfolding dc–ac inversion is used to produce single-phase sine voltage at line frequency switching using square-wave control. This not only simplifies the inversion stage in terms of modulation but also reduces the switching losses. Direct front-end current-fed based unfolding inverter is not reported in literature yet. Detailed analysis and design of the proposed direct current-fed single-phase unfolding inverter has been presented. Simulation waveforms using PSIM 9.0.4 are given to verify the presented analysis and design. Experimental results on a laboratory prototype rated at 200 W are demonstrated to support the investigation, to validate the accuracy of the proposed analysis and design, and to test the performance. [ABSTRACT FROM PUBLISHER]

In high current applications, paralleling three-phase voltage sourced inverters represents a modular solution for improving the system power conversion quality. Single-phase output reactors are often inserted between the output terminals of the two inverters that supply the same phase output. One function of these inductors is to limit circulating currents between the two inverters. These currents are produced by common-mode voltage differences between the three-phase output terminals of the two inverters. Since standard interleaved pulse width modulation (PWM) techniques naturally produce high-frequency common-mode voltage differences between parallel connected inverters, this paper describes a modified discontinuous PWM scheme that eliminates these voltage differences. As a result, a three-phase parallel inverter system can be operated using a single three-limb coupled inductor, significantly improving the system power conversion density as a result. An experimental 3 kW prototype system is used to compare the operation of the resultant inverter against one using separate single-phase coupled inductors. [ABSTRACT FROM PUBLISHER]

This paper proposes a high step-up solar power optimizer (SPO) that efficiently harvests maximum energy from a photovoltaic (PV) panel then outputs energy to a dc-microgrid. Its structure integrates coupled inductor and switched capacitor technologies to realize high step-up voltage gain. The leakage inductance energy of the coupled inductor can be recycled to reduce voltage stress and power losses. A low voltage rating and low-conduction resistance switch improves system efficiency by employing the incremental conductance method for the maximum power point tracking (MPPT) algorithm. Because of its high tracking accuracy, the method is widely used in the energy harvesting of PV systems. laboratory prototypes of the proposed SPO that have an input voltage range of 20 to 40 V and a maximum PV output power of 400 V/300 W are applied. The highest PV power conversion efficiency is 96.7%. The maximum MPPT accuracy is 99.9%, and the full load average MPPT accuracy is 97.8%. [ABSTRACT FROM AUTHOR]

This paper introduces a design methodology for a resonant boost converter topology that is suitable for operation at very high frequencies. The topology we examine features a low parts count and fast transient response, but suffers from higher device stresses compared to other topologies that use a larger number of passive components. A numerical design procedure is developed for this topology that does not rely on time-domain simulation sweeps across parameters. This allows the optimal converter design to be found for a particular main semiconductor switch. If an integrated power process is used where the designer has control over layout of the semiconductor switch, the optimal combination of converter design and semiconductor layout can be found. To validate the proposed converter topology and design approach, a 75-MHz prototype converter is designed and experimentally demonstrated. The performance of the prototype closely matches that predicted by the design procedure, and the converter achieves good efficiency over a wide input voltage range. [ABSTRACT FROM AUTHOR]

This paper is devoted to the step-up dc/dc converter family with a cascaded quasi-Z-source network (qZS-network). The cascaded (two-stage) qZS-network could be derived by the adding of one diode, one inductor, and two capacitors to the traditional quasi-Z-source inverter (qZSI). The proposed cascaded qZSI inherits all the advantages of the traditional solution (voltage boost and buck functions in a single stage, continuous input current, and improved reliability). Moreover, as compared to the conventional qZSI, the proposed solution reduces the shoot-through duty cycle by over 30% at the same voltage boost factor. Theoretical analysis of the two-stage qZSI in the shoot-through and non-shoot-through operating modes is described. The proposed and traditional qZS-networks are compared. A prototype of a step-up dc/dc converter with the cascaded qZS-network was built to verify the theoretical assumptions. The experimental results are presented and analyzed. Finally, a further optimization method of the cascaded qZS-network is proposed, and some practical design issues are discussed. [ABSTRACT FROM PUBLISHER]

In this paper, a novel single-phase five-level inverter is proposed using coupled inductors. This inverter can output five-level voltage with only one dc source. No split of the dc voltage capacitor is needed, totally avoiding the voltage balancing problem in conventional multilevel inverters. The level of the output voltage is only half of the dc-link voltage in all conditions, leading to much reduced dv/dt . This inverter is based on the widely used three-arm power module and the voltage stresses on all the power switches are the same, making it very easy to construct. Operation mechanism of this inverter is analyzed and the possible switching patterns are investigated. Based on these analyses, a novel optimized modulation scheme is presented. With this modulation method, no dc components exist in the inductor currents, which is very helpful for minimization of the inductors. Simulation and experimental results show the validity of the proposed inverter together with the optimized modulation scheme. [ABSTRACT FROM AUTHOR]

This paper proposes an indirect current control algorithm for seamless transfer of three-phase utility-interactive voltage source inverters. With the proposed method the inverter is able to provide critical loads with a stable and seamless voltage during the whole transition period including both clearing time and control mode change. The LCL filter design which is suitable for the indirect current control is also proposed to meet the harmonic limits. The proposed control method is validated through simulation and experiment. [ABSTRACT FROM AUTHOR]