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This article proposes a new pixel circuit that is operated at a low frame rate using low-temperature polycrystalline silicon thin-film transistors (TFTs) for use in active-matrix organic light-emitting diode (AMOLED) smartwatch displays. The proposed circuit uses a new leakage-prevention method (LPM) to balance the off currents at the gate node of the driving TFTs, eliminating the drop of the driving voltage. Uniform OLED currents are thus generated throughout the extended emission period. Also, the OLEDs are all turned off except in the emission stage to suppress image flicker. To confirm the feasibility of the proposed pixel circuit, a 1.41-inch panel, based on the proposed circuit, is fabricated. Experimental results demonstrate that diminishing the off currents maintains the driving capability of the pixel circuit to stabilize the luminance of the fabricated panel. The exhibitions of red, green, blue, and white images at frame rates from 60 Hz to 15 Hz are uniform, verifying that the proposed pixel circuit with LPM has high potential for use in AMOLED smartwatch displays with a low frame rate.

This work proposes a new LTPS gate driver circuit that can generate the simultaneous or progressive output waveforms in two periods. The falling and rising times are below 0.85 µs and 0.53 µs. Thus, the proposed circuit can be applied to high‐resolution AMOLED displays with SE driving method.

This work proposes a novel pixel circuit based on amorphous indium-gallium-zinc-oxide thin-film transistors (a-IGZO TFTs) for blue-phase liquid crystal displays (BPLCDs) with the in-plane switching (IPS) mode. The proposed pixel circuit provides a charging current as a constant current source to produce a wide operating voltage range for maximum transmittance of the BPLCs. Based on the simulation results, the proposed pixel circuit supplies a maximum output voltage of 30.14 V with an input voltage swing of 0 V to 9 V generated by the practical source driver integrated circuits (ICs), effectively compensating for the insufficient driving voltage of IPS BPLCDs.