Search

As the physical size of metal‐oxide‐semiconductor field effect transistor approaches the end of scaling down, the effect of process‐induced variations such as gate edge roughness on device performance cannot be neglected. For gate‐all‐around devices, the three‐dimensional gate profiles make the evaluation of gate edge roughness different and more complicated than that in planar metal‐oxide‐semiconductor field effect transistors. In this work, an evaluation algorithm was proposed to model the three‐dimensional gate edge roughness in a real gate‐all‐around device. The results show that the typical trapezoidal gate is more likely to suffer from gate edge roughness effect than the ideal rectangular gate. The effect of the size of the gate and the correlation coefficient of the edges on the effective channel length variation was also studied.

An adjustable mounting structure is proposed to compensate for surface deformation of a mirror caused by the assembly process. The mount adopts a six-point support based on the kinematic mount principle. Three of the support points are adjustable, and they are moved along the axial direction by actuators. Surface deformation is expressed by Zernike coefficients in this paper, and a sensitivity matrix of the surface deformation is established by varying the unit displacement of each adjustment support point and getting the corresponding Zernike coefficient changes. The surface deformation is measured, and the compensation adjustment of each adjustable support point is then obtained by anti-sensitivity calculation. Finally, the feasibility of present support structure design and surface figure compensating method are verified by experiments. The experimental results show that the present structure and method could significantly reduce the surface deformation caused by the assembly process. The surface deformation is 4.6 nm RMS after assembly and it is decreased to 1.3 nm RMS after four iterations of compensation, which is close to the 1.1 nm RMS after optical polishing.