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Consumer Electronics (CE) has experienced remarkable advancement in transformative technologies, to name a few, Internet-of-Things (IoT), Artificial Intelligence (AI), Machine Learning (ML), cloud computing, etc.

The tremendous advancement of Internet-of-Things (IoT) has proliferated the interaction between the physical and cyber worlds. Consumer electronics, as the first tier in the physical world, would play a crucial role to enable ubiquitous information exchange. The adoption of IoT technologies will inevitably enhance the maturity of consumer products and services, proliferating the market of consumer electronics. Nonetheless, the ever-growing number of uncoordinated connections and unregulated integrations of technologies would pose various challenges and threats, resulting in vulnerability to consumer electronics. Thus, there is an urgent need for defining the trusted infrastructure and research directions for consumer electronics. In this paper, the next-generation (next-gen) consumer electronics would be defined for the first time. Also, the state-of-the-art architecture of next-gen consumer electronics would be presented, in compliance with the emerging IoT standard IEEE 2668. To address the underlying challenges in next-gen consumer electronics, this paper will classify the essential research topics for consumer electronics and present future research opportunities, such as the exploitation of complex network analysis, cybersecurity measures, etc., to foster the development of consumer electronics in a reliable, efficient, safe, and secure manner.

Complex networks have been studied in various fields. In particular, topology and routing algorithms have been studied with the aim of preventing packet dropping and congestion in communication networks. When chaotic circuits are connected together to form complex networks, it is found that the synchronization rates around the high-degree nodes (hubs) are higher than those around low-degree nodes. By setting the coupling strengths between circuits while taking the degree of each node into consideration, it is possible for the synchronization rates around the hubs to be set to be significantly higher. Therefore, we propose a routing method that selects a route based on the high or low synchronization rates. As a result, it is confirmed that selection of a route with a low synchronization rate avoids congestion at the hubs and reduces packet dropping.

Now is the age of neuromorphic computing that creates brain circuits. The analog and digital circuit theory changes because the values of the basic conductance elements can be made variable by learning. The computer structure changes to in-memory computing technology in cooperation with a von Neumann architecture. In this paper, we propose a gyrator neuron (GN) that enables analog computer operations by nodal equation. The GN is constructed based on memristor elements. The GN executes learning by back propagation processing and association by forward propagation processing.

We propose two van der Pol oscillators with high-order nonlinearities coupled with an inductor and investigate various types of multimode oscillations. We confirm that these oscillations are stably excited by numerical calculations, theoretical analyses and circuit experiments. In particular, we aim to show relations between the multimode oscillations and the number of order nonlinear characteristics. [ABSTRACT FROM AUTHOR]