Search

Signal hiding countermeasures have been extensively investigated in the early side-channel attacks’ literature. Due to design and physical imperfections, their stand-alone use only leads to a limited reduction of the attacks’ complexity. As a result, more algorithmic countermeasures providing a more formal cost vs. security tradeoff (e.g., shuffling and masking) have gained more attention. Yet, since the cost associated with these is high, designers aim at combining countermeasures, leveraging the strength of each. In this manuscript, we demonstrate that by asking less to both signal hiding and algorithmic countermeasures (as stand-alone), we can develop combined countermeasures that indeed provide higher security at lower cost. For this purpose, we show how we can stack signal reduction and amplitude randomization techniques with ultra low cost automatic design flows and standard tools, and reach attractive security levels in combination with masking. Concretely, we examine two natural strategies for signal hiding and their combination: namely WDDL and a simple, local, scalable and easy-to-implement noise generation engine. A 65nm technology ASIC is evaluated with multiple isolated AES cores, leveraging recent information theoretic bounds which are connected to masking security proofs, significantly reducing the side-channel information leakage. We further quantify performance gains for masked designs. [ABSTRACT FROM AUTHOR]

This paper extends the analysis of the effectiveness of Leakage Power Analysis (LPA) attacks to cryptographic VLSI circuits on which circuit level countermeasures against Differential Power Analysis (DPA) are adopted. Security metrics used for assessing the DPA-resistance of crypto core implementations, such as the minimum number to disclosure (MTD) and the asymptotic correlation coefficient, have been extended to the case of LPA. The LPA-resistance has been evaluated in terms of MTD as a function of the on chip noise. Noise variances up to 10000 times greater than the signal variance have been taken into account and LPA attacks have been successfully executed for all the logic styles under analysis using less than 100000 measurements. Moreover the role of process variations has been investigated through extensive Monte Carlo simulations in order to evaluate their impact on the leakage model for the logic styles under analysis. Results show that LPA attacks can be successfully carried out on the different anti-DPA logic styles even in presence of process variations. To the best of our knowledge, this work proves for the first time the effectiveness of LPA attacks in a real scenario where on chip noise and process variations are taken into account. [ABSTRACT FROM AUTHOR]

Abstract: Zhang’s three countermeasures are known to be secure against certain first-order side channel attacks such as differential power analysis and correlation power analysis. This security comes from the countermeasures’ use of random points to blind the message and random integers to blind the secret scalar. In this paper, we propose first-order side channel attack methods that can perfectly break these three countermeasures. Even though Zhang’s countermeasures use random points and random integers our attacks are made possible by the fact that intermediate values computed by these countermeasures are dependent on specific values that we can guess. The experimental results verify that the proposed attack methods can successfully break existing countermeasures. [Copyright &y& Elsevier]