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In recent years, there is an increased use of passive filters in both transmission and distribution systems due to the proliferation of power electronic devices. However, the problem of filter design has not been well addressed in the past and one example is the application of high-pass filters in a filter package. Three types of HP filters are widely used to mitigate multiple harmonics, i.e., 2nd HP filter, 3rd HP filter and C-type filter. There is still a lack of research to clearly reveal the characteristics of each filter, which makes it difficult for the designer to select the optimal filter topology under different circumstances. The main goal of this paper is to solve the problem of how to select a proper configuration among three HP filter candidates for a given harmonic problem. Unlike the conventional optimization-based filter studies, this paper investigates three HP filters in an analytical way. As a result, the paper provides a deep insight into the inherent characteristics of the filter and the conclusions drawn in the paper are universal; thus can be used in different applications, ranging from low voltage levels to high voltage levels. The research results lead to a recommended application scope of each HP filter, which is very useful to guide the design of filter packages and help designers to evaluate the design results. [ABSTRACT FROM AUTHOR]

Virtual synchronous generator (VSG)-based control approaches for AC machine drivers have attracted much attention in recent years. The contradiction between the strong motor loading capacity and the small DC voltage fluctuation is disregarded in previous studies. A larger virtual inertia is required to raise the torque gain and drive the motor with heavier loads, thus resulting in greater DC voltage variations. A systematic method is proposed for the optimal design of the virtual inertia for VSG-based motor starting systems to achieve the maximal motor loading capacity and the low DC voltage fluctuation in this paper. Firstly, the relationship between the virtual inertia and the loading capacity is revealed on the basis of the closed-loop analysis. Considering the DC voltage variation, the constraint on the maximal value of the virtual inertia is proposed from the energy-balance perspective despite the unknown contribution of the DC capacitors to the virtual inertia. To fully exploit the energy storage capacity of the DC capacitors and raise the upper limit of the virtual inertia under the same permitted DC voltage variation, a modified DC voltage reference is introduced. Extensive simulation and experimental results are presented to validate the effectiveness of the proposed methods. [ABSTRACT FROM AUTHOR]

This paper proposes an adaptive self-tuned current controller design for an LCL-filtered LC-tuned single-phase shunt hybrid active power filter (HAPF), which offers adaptability and flexibility of the control system to filter parameters changes. System modelling and online identification of parameters are presented. Then, a systematic self-tuned controller (STC) design is proposed to calculate the controller parameters and obtain the final control law adaptively. The exact HAPF parameters design is described and the overall closed-loop stability evaluation with considering digital control delay is discussed in this paper. To confirm the theoretical achievements, simulations and experimental tests on a real prototype system are performed. The results are in good accordance and demonstrate the effectiveness and superior performance of the suggested control technique. Furthermore, a comprehensive comparison between the proposed control technique and other controllers is provided to show the superiority of the proposed system from different aspects. [ABSTRACT FROM AUTHOR]

In renewable energy micro-source applications, a wide range of voltage conversion of the step-up converter is an essential part to equalize the typical low voltage of micro-source with DC-bus voltage of Inverter or motor drives. In order to meet this purpose, an ultra-voltage gain step-up DC-DC converter is proposed in this paper. The proposed converter has made an arrangement of the regenerative-boost fed switched inductor and capacitor configurations. Thereby, due to such an organization of structure, the proposed converter can develop an extremely high voltage-gain even at lower duty ratios. In addition, it has the advantage of lower switching stress across all power semi-conductive diodes. Furthermore, this paper describes the steady-state analysis and comparative features of the converter with existing recent literature. Finally, to validate theoretical analysis and test the feasibility and suitability of the proposed ultra-gain converter, the experimental results were observed by a 500 W fabricated prototype. [ABSTRACT FROM AUTHOR]

Conventional half bridge modular multilevel converter (MMC) system will suffer great over-current when there is a dc side fault. Therefore, topology study in sub-modules with dc side fault blocking capability have become one of the hotspots in MMC field. However, fault blocking topologies using conventional IGBT devices must employ more semiconductors than half bridge topology. The extra semiconductor devices employed in the topology will lead to the increase of cost and conduction loss. To reduce the conduction loss of the fault blocking topology, a novel sub-module topology is proposed in this paper. The proposed topology employs reverse blocking devices to form the low conduction loss path. Conduction loss analysis is conducted in this paper to show the priority of the proposed topology. Simulation and experiment results verified the dc fault blocking capability of the proposed topology. [ABSTRACT FROM AUTHOR]

This paper analyzes the unsymmetrical operation of the dc/dc MMC caused by parametric uncertainty. The unsymmetrical operation is referred to as the condition in which parameters involved in ac power generation are not equal in the phase-legs of the converter. Because existing models in the literature cannot exhibit the unsymmetrical operation of the dc/dc MMC, new detailed and simplified steady-state models are developed in this paper. In the developed models, the connection between the operation of different phase-legs shows itself when the dc-link impedance is considered. Using the developed models, the parameters that can force the converter to operate in unsymmetrical conditions are identified, and the maximum variation that the converter can tolerate is found. It is shown that even a small parameter variation leads to the leakage of the ac circulating current into the dc-link, which is not acceptable. By conducting various case studies, the impacts of the dc-link length, the transmitted power, and the conversion ratio on the unsymmetrical operation of the dc/dc MMC are characterized. The results showed that the converter would be more sensitive to the parameter variation as these parameters increase. Comparative analysis and simulation results confirm the validity and effectiveness of the presented models and analysis method. [ABSTRACT FROM AUTHOR]

The risk of unstable subsynchronous oscillations (SSO) in DFIG-based wind parks radially connected to transmission lines with series capacitive compensation is typically assessed with numerous electromagnetic transient (EMT) simulations, which is a time-consuming process. However, not all operating scenarios present risk of SSO and require such a detailed investigation. This paper proposes two charts based on impedance equivalents of wind generators obtained through frequency scans to quickly map which combinations of parameters can create unstable SSOs and which combinations are risk-free. With the information, engineers can immediately filter out scenarios with no risk of instability and conduct detailed studies on fewer scenarios that are truly critical. These charts can be obtained with simple equations that use only information readily available in practice to engineers, without the need to run any computer simulation. The charts also reveal the key operating conditions that can increase the risk of an unstable SSO and provide real-time quantitative insights into how close a wind park is to an instability. Application examples are provided to illustrate how this approach can help engineers speed up studies to identify the risk of SSO. [ABSTRACT FROM AUTHOR]

Multilevel converters (MLCs) are pioneers in the field of electrical energy conversion. From the classification of MLCs, modular multilevel converter (MMC) is top-rated due to its attractive structure and performance. The modular nature and no need for isolated DC resources are two significant advantages of this converter. However, the need for many sensors to control its performance is a considerable drawback. In addition, the internal circulating current in the MMC causes losses, decreases efficiency, and increases the voltage ripple of capacitors. This paper proposes combining a new capacitor voltage sorting method and an open-loop controller based on arms energy estimation to control the MMC using two voltage sensors in the arms and one current sensor at the output. The proposed method ensures continuous voltage balancing of the capacitors and removes multiple voltage sensors from sub-modules (SMs). The simulation and experimental results verify the accuracy and effectiveness of the proposed method. [ABSTRACT FROM AUTHOR]

DC fault protection is the bottleneck that restricts the development of modular multilevel converter based high voltage direct current (MMC-HVDC) system. Superconducting fault current limiters (SFCL) is an ideal protection device that can significantly limit short circuit current and enhance the fault tolerance ability of MMC-HVDC system. At present, several topologies of SFCLs have been proposed, but there is no systematical study of their current-limiting characteristics in MMC-HVDC. This paper studies the development process of DC short-circuit faults in MMC-HVDC system, and analyzes its demand for fault current limiting. Then, resistive type, saturated iron core type and hybrid type SFCL are modeled and their limiting effect of critical fault current under DC pole-to-pole fault is tested. By comparison, the current-limiting characteristics of three types of SFCL are concluded. Results show that resistive SFCL has best performance in steady state, while saturated iron core SFCL has best performance in transient state. The current-limiting characteristic of hybrid type SFCL is between the other two types. [ABSTRACT FROM AUTHOR]

The dc-dc converters with high step-up DC-voltage gain play a vital role in integrating low voltage DC sources. Though several converter topologies are reported in the recent past, attempts have been made to reduce the components, especially the switching devices, passive elements, converter losses, etc., of the converter. A novel DC-DC converter topology, viz., single switched impedance network (SSIN)-based converter with n-stage is proposed in this paper. The operation of the SSIN based converter in continuous and discontinuous conduction modes are discussed. The effect of parasitic elements on DC-voltage gain and efficiency of the SSIN is carried out. The small-signal model of the SSIN converter is derived. The performance of the SSIN converter is compared with the similar converter topologies. The 500 W prototypes of the SSIN with n = 1 and n = 2 are fabricated, and the experimental results are presented in this paper. To improve the converter performance, SiC-based semiconductor devices are used. The SSIN converter with two-stage has low switch loss at 500 W load, improved efficiency during high power and high output voltage operation, the switch stress of Vo/2, etc. [ABSTRACT FROM AUTHOR]

The separation of the data capture and analysis in modern vision systems has led to a massive amount of data transfer between the end devices and cloud computers, resulting in long latency, slow response, and high power consumption. Efficient hardware architectures are under focused development to enable Artificial Intelligence (AI) at the resource-limited sensing devices. One of the most promising solutions is to enable Processing-in-Pixel (PIP) scheme. However, the conventional schemes suffer from the low fill-factor issue. This paper proposes a PIP based Complementary Metal-Oxide-Semiconductor (CMOS) sensor architecture, which allows convolution operation before the column readout circuit to significantly reduce the overall power consumption while improving the resource utilization of the succeeding deep learning accelerator. The simulation results show that the proposed architecture could support the computing efficiency up to 3.37 TOPS/W at the 8-bit weight configuration, which is four times as high as the conventional schemes after normalization. The transistors required for each pixel are only 3.5T, significantly improving the fill-factor. [ABSTRACT FROM AUTHOR]

When a fault occurs on the dc side of the voltage source converter based high voltage direct current (VSC-HVDC) transmission system, the fault current rises quickly due to the low damping of the dc system. Using a dc fault current limiter (DC-FCL) to limit the rise of the fault current can significantly reduce the breaking requirements of the DCCB. A topology of a bidirectional active dc fault current limiter (BA-FCL) based on coupled inductor is proposed in this paper. No expensive full-controlled power electronic devices are used in this topology. Only a few half-controlled power electronic devices are used to achieve active control of the current limiting unit. Compared with many topologies of current limiter at present, the fault current limiting effect of BA-FCL is improved significantly while the cost, volume, topology complexity, and control complexity are reduced. The stress analysis and parameter design of the proposed current limiter are carried out. Finally, the simulation case study and hardware experiment are implemented to verify the good economy and current limiting performance of the proposed topology. [ABSTRACT FROM AUTHOR]

As the weakest components of wind turbine converters, dc-link capacitor withstands high-frequency ripple currents from both rectifier and inverter. Traditional wind turbine control strategy does not consider the influence of the harmonic current generated by both side converters on the dc-link capacitor, and ignores the restriction on the reliability of direct-drive wind turbine converter. For the reason, this paper synthesized the wind turbine model and dc-link capacitor harmonic spectrum analytical approach to derive the connection between mission profile and harmonic spectrum. Regarding with the capacitor lifetime model, the optimal mapping from control strategy to mission profile, maximizing the service life of capacitor, was solved. With the proposed health-oriented control strategy, the core temperature of dc-link capacitor can be effectively reduced, which can increase the service life of capacitor, making the dc-link capacitor no longer the most fragile component in wind turbine converter and ultimately improving the reliability of converters. [ABSTRACT FROM AUTHOR]

As high-speed railways develop rapidly worldwide, the problems of neutral section and power quality are becoming increasingly prominent. These problems affect the normal operation of the power grid and the electric locomotives. The co-phase power supply schemes were proposed by researchers, which can solve these problems well. Among them, the MMC-based scheme (MMC-5 L) is a representative one. The existing scheme, when applied to the auto-transformer (AT)-fed system which is usually adopted by high-speed railways, needs to install an auto-transformer on the output side. To eliminate the auto-transformer and to obtain the more suitable and superior co-phase power supply schemes to AT-fed system, two improved schemes are proposed in this paper based on the novel MMC-based scheme (MMC-6 L) we proposed before. While establishing the mathematical model, creating the control system, and carrying out simulation verification of the proposed schemes, the proposed schemes are compared with MMC-6 L and MMC-5 L in terms of topological characteristics, control system complexity, power loss, and functionality. The results show that while the proposed schemes can fulfill the functions of the co-phase power supply scheme well like the MMC-5 L and MMC-6 L, they are more suitable and superior for the AT-fed system in terms of control system complexity and power loss. Among them, MMC-5L1CB performs best in power loss, and MMC-4L2CB performs best in control system complexity. [ABSTRACT FROM AUTHOR]

The paper develops two computationally efficient models, namely a detailed equivalent model and an average-value model, with provisions for representation of the critical state of converter blocking, for modular multilevel converters with embedded storage. These models are indispensable in the simulation of dc faults. The developed detailed equivalent model provides accuracy that matches electromagnetic transient (EMT) simulations, with much reduced computational burden; the developed average-value model represents the averaged behavior of the converter by neglecting switching transients. Both models are extensively evaluated in the context of an HVDC system against benchmark results form a detailed switching model developed in PSCAD/EMTDC. The results confirm the validity and accuracy of the models for steady state, transient, and faulted operating conditions including when the converter is blocked in response to a dc fault. [ABSTRACT FROM AUTHOR]

This paper applies the principles of distribution locational marginal pricing (DLMP) to unbalanced three-phase distribution networks. We first propose a linear model for AC optimal power flow derived through a series of approximation and reformulation techniques. Then a scenario-generation algorithm is proposed to properly model the uncertain parameters in the linear model. Through a proposed No U-Turn sampler (NUTS) based algorithm, probability density functions (PDFs) of DLMPs are calculated. These PDFs provide statistical information about the locational and temporal price risks. By means of applications to two IEEE unbalanced test networks, the numerical results show promising performance for the proposed linear model and the NUTS-based algorithm in creating PDFs of DLMPs. DLMP price densities will be increasingly useful as distribution system operators seek flexible, low risk solutions from embedded generators and aggregators of distributed energy resources. [ABSTRACT FROM AUTHOR]

The vacuum interrupter-based DC circuit breaker is one of the most important equipments in the DC power system. The dielectric recovery (DR) of vacuum interrupter (VI) is essential for breaking reliability, especially on some occasions with ultra-large fault current such as the outlet of generator. To measure the DR of VI under high arcing current, an experiment circuit is designed and the DR under arcing current from 20 kA to 60 kA is presented in this paper. The influence of arcing current, contact separation, di/dt before current zero and arcing time on the DR is investigated. Particularly, it's found that under a specific arcing current, there exists an optimal arcing time for DR, and it shows a negative correlation with the arcing current. [ABSTRACT FROM AUTHOR]

Voltage source converters (VSCs) have been extensively used in power systems for interfacing renewable energies and other modern loads. Because of their nonlinear nature, a proper harmonic model of VSC devices must be established when conducting harmonic analyses in power systems. This is especially true for low-order harmonics, which are routinely encountered in present power systems. To this end, an analytical harmonic model that represents the low-order harmonic characteristics of VSCs is developed in this paper. The new model takes both the control loop and power loop (i.e., DC-link capacitor) of the VSC into account through rigorous mathematical derivations. The final result has shown that the VSC can be represented by a harmonically coupled impedance matrix at harmonic frequencies, which can be easily used for harmonic analyses of large-scale power systems. It also shows that the DC-link capacitor has a more noticeable impact on the harmonic impedance of VSCs with a smaller DC-link capacitance and low-order harmonics. The appropriateness of the new model was verified using EMT simulations and lab experiments. A complete procedure to construct the proposed VSC model is also established based on the research findings. [ABSTRACT FROM AUTHOR]

The current-limiting inductors (CLIs) are commonly used to suppress DC fault current to safely trip DC circuit breakers in MMC-HVDC systems, but it significantly jeopardizes DC dynamics and causes instantaneous power mismatch between AC and DC sides of islanded rectifier station (RS), exposing MMC internal states to large disturbance. This paper firstly provides a detailed analysis of the influence of CLIs on AC fault, establishes RS mathematical representation including AC side dynamic, and reveals the mechanism of DC voltage oscillation, modulation saturation and PCC waveform distortion. The analysis shows that the AC and DC fault characteristics are decoupled under unsaturated AC modulation, but coupled under excessively low submodule capacitor voltage, where AC modulation is saturated and PCC waveforms are distorted. To solve this issue, a novel RS AC fault ride through method for MMC-HVDC system with CLIs is proposed to stabilize RS DC voltage, desaturate AC modulation and decouple fault characteristics by regulating the zero-sequence modulation of circulating current suppression. In addition, a current reference disturbance and an AC energy dissipation device coordinated control are designed, which adaptively recovers the submodule capacitor voltage. Finally, the feasibility of the proposed method is verified by simulation results. [ABSTRACT FROM AUTHOR]

Miniaturization and low cost contribute to the development and popularization of wireless power transfer (WPT). Reducing the number of power conversion stages can reduce the volume and cost of the WPT converter, and even make it possible to improve the efficiency. A single-stage WPT converter with constant current (CC) and constant voltage (CV) output and its asymmetric modulation method are proposed in this paper. A direct AC-AC converter is applied to the primary side of the WPT converter to directly convert line-frequency AC to high-frequency AC. The applied direct AC-AC converter that can replace the commonly used multi-stage primary converter reduces the number of circuit devices, thereby reducing the volume and cost of primary converter. The proposed WPT converter can realize zero voltage switching (ZVS) and power factor correction (PFC). In order to achieve CC and CV output, a switchable hybrid compensation topology is applied to the proposed WPT converter. A 720-W experimental prototype was manufactured to verify the rationality of the proposed WPT converter and the correctness of the theoretical analysis. [ABSTRACT FROM AUTHOR]

This paper presents a new control strategy for enhancing the dc voltage regulation and the transient response in the multi-terminal VSC-HVDC system by ensuring swift power-sharing among converters when encountering large disturbance such as converter loss or ac fault at one of the converter stations. The quick power sharing can be realized using direct power control (DPC) since it has a merit of fast power dynamic response. On the other hand, to limit the converter current during ac fault, a new coordination strategy between DPC and vector current control (VCC) is proposed. Furthermore, a new simplified model of the MTDC system is developed to study the performance of DPC in enhancing the dc voltage dynamics response analytically. The time-domain simulation of the detailed model of the four converter stations MTDC system verify that the proposed control strategy significantly reduces the overshoot in the transient dc voltage response following an outage or ac fault. As a result, together with the droop gain selection for the maximum permissible steady-state dc voltage deviation, the proposed control strategy can help to reduce the size of the dc chopper in the MTDC grid or even avoiding it. Moreover, the comparative analysis based on time-domain simulation depicts that the proposed simplified model has the same dc voltage response compared to the detailed model of the MTDC system except for a steady-state error of 0.47% and a little bit longer settling time (1.5 ms) at transient. [ABSTRACT FROM AUTHOR]

Nowadays, nonlinear loads such as load commutated inverter (LCI) drives are being used by industrial sector throughout the world. However, despite the LCI drive uses low-cost thyristors and their corresponding controllers, which have high efficiency and low manufacturing cost, there are concerns regarding the use of LCI drives which are two-fold: (i) they generate harmonics and (ii) they are sensitive to voltage sags occurring at their PCC. In the literature, passive harmonic filters have been suggested to address the former concern and therefore various filter designing techniques have been introduced. However, the need to elaborate a cost-effective filter to address both concerns regarding LCI drive operation has been neglected. Therefore, this paper presents an innovative approach for designing passive filters which can decrease the harmonic distortions generated by LCI drives while ensuring more reliable annual operation of these equipment. Besides, other aspects of passive filter designing, such as eliminating detuning effects, resonance elimination and harmonic loading of capacitors, have been taken into account to provide a general and practical filter designing approach for real industrial applications. In order to evaluate the innovative proposed approach, a passive filter is designed for LCI drive used in an Iranian large copper mine company. [ABSTRACT FROM AUTHOR]

The missing capability of DC fault current limitation is an inherent disadvantage in the typical half-bridge modular multilevel converter (MMC), which restricts its application in long-distance high voltage direct current (HVDC) systems. The full-bridge submodule (FBSM) and clamped double submodule (CDSM) topologies allow for fault current self-clearing, but also suffer from additional hardware cost and power losses. In this paper, an improved submodule topology utilizing the new reverse-blocking insulated gate bipolar transistor (RB-IGBT) is proposed to improve system economy without compromising its performance. The operating principles and DC fault characteristics of the proposed topology are analyzed in details, including comparison with various topologies in terms of cost, losses, fault current clearing speed and thermal. Compared with the traditional CDSM topology, the proposed RBSM can clear DC faults faster with reduced cost of switching devices. A DC fault protection strategy for MMC-HVDC system is also presented. Simulation results under normal operating, permanent and transient fault conditions are carried out to verify the effectiveness of the proposed topology. [ABSTRACT FROM AUTHOR]

The paper addresses an improved inner current reference calculation to be employed in the control of modular multilevel converters operating during either balanced or unbalanced conditions. The suggested reference calculation is derived based on the AC and DC additive and differential voltage components applied to the upper and lower arms of the converter. In addition, the impacts caused not only by the AC network’s impedances but also by the MMC’s arm impedances are also considered during the derivation of the AC additive current reference expressions. Another issue discussed in this article regards that singular voltage conditions, where the positive-sequence component is equal to the negative one, may occur not only in the AC network but also internally (within the converter’s applied voltages). Several different inner current reference calculation methods are compared and their applicability during the former fault conditions is analyzed. The paper presents a detailed formulation of the inner current reference calculation and applies it to different unbalanced AC grid faults where it is shown that the presented approach can be potentially used to maintain the internal energy of the converter balanced during normal and fault conditions. [ABSTRACT FROM AUTHOR]

Modular multilevel converters (MMCs) have been recognized as the most attractive technology for high voltage direct current (HVDC) applications during the last years. Their advantages include the ability to freely control the internally stored energy in the distributed submodules (SMs) and to independently control AC and DC powers. Recent studies showed that an MMC can take advantage of this degree of freedom to supply ancillary services with low energy requirements such as frequency response or power oscillation damping by connecting energy storage systems (ESSs) to its SM capacitors. This paper proposes a modular DC-DC converter as an interface between the energy storage element and the SM capacitor. As it can be built with switches allowing a high switching frequency, it is shown that the volume of the passive components can be reduced in comparison with interface converters known in the literature. The proposed control strategy avoids to transfer the harmonics of a SM to the ESS that prevents to drastically oversize the system. The proposed control method also provides an appropriate energy exchange without affecting the control philosophy of an MMC and it addresses balancing issues. Simulations and a downscaled prototype confirm the relevance of the proposed control. As the proposed interface converter is able to track the power reference with fast dynamics, it provides the same system-level advantages as other interface converters known in the literature but with a reduced volume. [ABSTRACT FROM AUTHOR]

Currently, HVDC is in the spotlight for long-distance transmission and power connection between countries. Among them, MMC-HVDC is a new conversion technology that can solve the problems of switching loss and harmonics. MMC consists of many submodules connected in series. And the one submodule is composed of IGBTs, Diode, and Capacitor. At the transient state, the charged capacitor is discharged and added to the fault current. It will generate tens of times the surge current during the delays all IGBTs turn-off. This causes semiconductor device destruction. To solve this problem, we applied SFCL with fast response characteristics to the MMC. The response speed of the resistive SFCL is faster than that of the MMC system protection device, which can effectively limit the capacitor discharge current before the protection device operates. In this paper, AC grid, MMC-HVDC, DC cable and SFCL were modeled using PSCAD/EMTDC. After that, we confirmed the capacitor discharge current, current limiting rate, and interruption characteristics through DC line short circuit failure simulation. As a result, SFCL effectively limits the capacitor discharge current and continuously lowers the level of the fault current. [ABSTRACT FROM AUTHOR]

Both the local and concurrent commutation failures (LCF and CCF) are concerned threats to the secure operation of multi-infeed LCC-HVDC (MIDC) systems, which will be largely impacted by the voltage stability. However, this impact has not been clearly revealed yet by earlier works due to the lack of the related analytical evaluation method. Thus in this paper, the analytical evaluation method related to the LCF and CCF with the voltage stability in MIDC systems is firstly proposed considering the complicated inter-inverter interactions. This is realized by deriving the analytical expressions of the LCF and CCF immunity indices (LCFII and CCFII) as the functions of the voltage stability factor (VSF) based on the system quasi-steady-state model. Moreover, the proposed method is used to clearly evaluate the impact of the voltage stability on the LCF and CCF by comprehensively conducting the parametric dependence analysis of the LCFII, CCFII, and VSF versus various system parameters and operation variables. The analysis results indicate that in some certain situations, increasing the voltage stability of MIDC systems however imposes an unexpected negative impact on the LCF and CCF. Finally, the simulation results of the PSCAD/EMTDC program based on a tri-infeed LCC-HVDC system validate the theoretical developments. [ABSTRACT FROM AUTHOR]

This paper proposes an improved SOC balancing strategy for the modular energy storage system (ESS) based on low bandwidth communication (LBC) technology, aiming at solving the drawbacks of the conventional balancing strategy based on droop control. The proposed control scheme can improve the SOC balancing efficiency and remove the current deviation by using the SOC slope-adjusting and current-shifting approaches simultaneously. The average value of SOC can be derived through the LBC line, and the droop coefficient based on SOC can be controlled in the local control layer. Thus, the SOC of each sub-module can converge to the average SOC value in system dynamic process, and the balancing speed under the condition of low SOC difference between sub-modules can be improved. Furthermore, the current regulation performance in steady and transient states can be enhanced by using the proposed method. At last the effectiveness of the proposed strategy is verified by experimental results. [ABSTRACT FROM AUTHOR]

An improved two-stage model predictive current control (MPCC) for three-phase three-level converters in the paper, which can simultaneously achieve common-mode voltage (CMV) reduction, effective dc-link capacitor voltage control, and decreased computational burden, is proposed. Compared to the other current control strategies, it has the capability of handling multiple control objectives and possesses a simple structure. Furthermore, it greatly reduces the CMV since the peak CMVs of all the candidate voltage vectors are constrained to be less than one sixth of the dc-link voltage. In addition, an optimal two-stage voltage vector selection mechanism is employed in the proposed method. It helps to significantly reduce the computational complexity. Simulation and experimental results are provided to verify the effectiveness of the proposed method. [ABSTRACT FROM AUTHOR]

Although the use of a series capacitor increases the transmission line (TL) capacity, it inverts the voltage/current and creates a sub-harmonic frequency that results in unintended operation of the protection devices, which further decreases the transient stability under fault conditions. Restoring the transient stability requires an accurate diagnosis of faults in TLs, which further requires exploration of in-depth features. This imposes challenges for the existing approaches as they demand a large amount of data. In this paper, a self-attentive weight-sharing capsule network (WSCN) is proposed to achieve robust and high classification performance while utilizing a limited amount of data. The capsule network, with the weight-sharing mechanism delivers robust performance in detecting and classifying the faults in the TL domain. Simultaneously, the self-attention layer highlights the more dominant features that make the network work upon the limited data effectively. A Western-System-Coordinating-Council WSCC 9-bus and 3-machine test model, which was modified with the series capacitor was studied to quantify the robustness of the self-attention WSCN. The results were compared with those of others networks to confirm the explicit classification ability of the proposed network. A study on real-world data obtained from power network was also conducted to validate the proposed self-attention WSCN. [ABSTRACT FROM AUTHOR]

The medium voltage direct current (MVDC) is a promising direction of future shipboard power system (SPS). However, one of the main limitations encountered in its development is the fault isolation of DC side. This paper reveals the evolution process of short-circuit fault in typical MVDC SPS through equivalent circuit and transient simulation. Based on the analysis of protection needs, a superconducting current-limiting switch (SCLS) topology is proposed, which includes one superconducting coupled coil and two DC circuit breakers (DCCBs). The models of SCLS is built on MATLAB/Simulink and the current limiting principle and current sharing principle of SCLS are verified. The results show that the SCLS has effective current limiting performance and fault clearing effect. [ABSTRACT FROM AUTHOR]

DC fault is one of the most important and critical challenges for stable operation of DC microgrids. Resistive type superconducting fault current limiter (R-SFCL) is an ideal protective solution to limit DC fault current. However, the effect of only using SFCL may further deteriorate the DC bus voltage stability. This paper first analyzes the effect of R-SFCL on DC microgrid under different operation modes and different fault locations, and then presents a coordinated control method of SMES-battery hybrid energy storage system (HESS) and SFCL in ground fault. This method can not only reduce the fault current level but also regulate the DC bus voltage. Finally, the comparative study is conducted in PSCAD/EMTDC, the feasibility and superiority of the proposed method is verified. [ABSTRACT FROM AUTHOR]