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The article reports on the development of Xilinx Inc.'s forthcoming Virtex 5 generation of field programmable gate array in the U.S. Semiconductor companies are shifting to 65-nanometer design rules which predict exceptional logic density and performance. The design rules showed an edge in process technology, circuit design, physical lay-out and software methodologies and equipped with engineering talent.

The article discusses the development of a high-performance programmable-logic platform by Velogix Inc. to keep pace with the accelerating shift of Field-programmable gate array (FPGA). Accordingly, FPGA can take on data-path-dominated designs that calls substantial computation capabilities which also allows billions of multiply-accumulate operations. The company developed the logic platform to run billions of operations in video and imaging, test and measurements and communications.

The article reports that DRC Computer Corp. and XtremeData Inc., the first two companies to provide socket-compatible coprocessors for AMD64 Opteron processor sockets, are offering programmable solutions that can speed up time-critical algorithms. These coprocessors take advantage of the flexibility of Xilinx and Altera field-programmable arrays.

The article reports on developments relevant to field-programmable logic array (FPGA) circuits and devices in the United States, which dominates the application specific integrated circuit market. When circuit designers were asked what percentage of their design projects employ FPGA, they shared that 81 percent of their projects include FPGAs.

The article presents information related to Altera Corp.'s new 65-nm field programmable gate arrays. The company has launched the enhanced version of its adaptive logic module (ALM) for 65-nanometer FPUAs. The enhanced ALMs developed for the Stratix III line incorporate software configurable features. The incorporation of 65-nm process technology and configurable power in each ALM helps drive down overall power in the Stratix III line. The next Quartus II release will include support for design-space convergence.

The article reports that the next-generation field programmable gate array, which is based on 65-nanometer design rules, manufactured by Xilinx Inc., is set for sampling in the second half of 2006 in the U.S. According to Chuck Tralka, director of product marketing for Advanced Products Division, the field programmable gate array will have higher gate counts than the 90-nanometer Virtex-4 devices without consuming more power.