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Modular converters based on the connection of multiple power cells have become a competitive solution for many applications, achieving high performance with reduced production and maintenance costs. However, their performance is degraded if the power modules present an unbalanced operation, which is a common case in some applications and/or when they implement active thermal control methods. Variable-angle carrier-based pulsewidth modulation (PWM) strategies face this challenge by minimizing the negative impact of unequal power sharing among the cells. They do this by improving the harmonic quality of the output waveforms, which has a direct impact on the lifetime of the output filters and/or components. [ABSTRACT FROM AUTHOR]

Modular converters such as the multilevel cascaded H-bridge (CHB) are an attractive option for multiple applications mainly because of inherent modularity and fault-tolerant operation. This article is focused on the CHB converter operating with unbalanced conditions (different dc voltages and/or modulation indexes). Under these circumstances, applying the conventional control and modulation strategies, the output voltage harmonic spectrum is degraded. In this article, a generalized variable-angle phase-shifted pulsewidth modulation (PS-PWM) technique for CHB converters with a large number of power modules (> 3) is presented. The method considers all possible cells’ combinations to form groups and assigns the role of each cell in the group. This cell role defines the identifier of the cell in the variable-angle PS-PWM technique. In the steady state, in each group of cells, the harmonic distortion of the CHB output voltage located at twice the carrier frequency ƒc is eliminated, while the distortion at 4ƒc is also diminished. Experimental results show how the proposed technique achieves superior harmonic performance without introducing any significant disadvantage. [ABSTRACT FROM AUTHOR]

This article presents a dc solid state transformer based on three-level power module (PM) (TL-DCSST) for interconnection of medium-voltage dc (MVdc) and low-voltage dc distribution system. The proposed TL-DCSST adopts the low-voltage insulated-gate bipolar transistor (IGBTs) with excellent switching characteristics to build medium voltage PM and reduces the number of medium frequency transformer (MFT). This topology features inherent antibias mechanism for MFTs on the primary side, which saves the resonant capacitor at primary side. Meanwhile, the active front end is integrated to realize voltage and power regulation, low voltage ride-through and DC fault handling for MVdc side. In this article, the topology, operation principle, interleaving modulation, circuit parameter design, and control schemes are presented and analyzed comprehensively. At last, a prototype rated at 7 kW has been built and tested, and the experimental results verify effectiveness of the proposed TL-DCSST. [ABSTRACT FROM AUTHOR]

Energy storage systems (ESSs) facilitate utility grid operations on various levels, which include power generation, power transmission, and power distribution. The benefits of these systems produce an overall improvement of grid stability, security, and resilience; cost reductions resulting from the need for less expensive reserve equipment; enhanced power quality; and customer satisfaction. In line with the development of the technology, pricing standards, and operator familiarity, ESSs' role in future utility operations will be substantial. This article summarizes ESS applications and control and specific issues related to power electronic converter (PEC) applications. [ABSTRACT FROM AUTHOR]

Multilevel cascaded H-bridge (CHB) converters are an attractive solution for multiple applications like flexible ac transmission systems and solid-state smart transformers, among others. This article is focused on a CHB working with unbalanced conditions per cell (different cell dc voltages and/or cell voltage references). In this scenario, the phase-shifted pulsewidth modulation (PS-PWM) technique produces a harmonic distortion around twice the carrier frequency and its multiples in the CHB output voltage. In this article, a generalized variable-angle PS-PWM method is presented in order to mitigate this drawback improving the CHB output voltage harmonic spectrum. The proposed method is based on applying a mathematical search algorithm to determine the phase displacement angles to be applied to the PS-PWM technique. Experimental results show how this objective is achieved without introducing any disadvantage in the CHB operation. The method can be applied to CHB with any number of cells. [ABSTRACT FROM AUTHOR]

This paper proposes generation of a 15-level (14 concentric) dodecagonal voltage space vector structure (DVSVS) for a star connected induction motor drive. The proposed multilevel DVSVS is obtained by cascading two inverters, namely a primary and secondary inverter. The primary inverter is a five-level (5L) structure formed by stacking two three-level flying capacitors with individual reduced dc sources and the secondary inverter is also a 5L structure formed by cascading two capacitor-fed cascaded H-bridges (CHB). The active power is supplied by the primary inverter, while the secondary inverter acts as switched capacitor harmonics filter, and capacitors in the secondary inverter are balanced naturally irrespective of load power factor for entire modulation index. The high-voltage dc supply fed primary inverter is operated in quasi-square wave mode, while the high frequency switching is applied to low voltage CHBs, thus, reducing the overall switching loss. The proposed scheme gives the advantages of both DVSVS and multilevel structure, thus, making it one of the solutions for battery or stacked dc-fed applications. The paper also presents the experimental results as well as comparison study with the existing topologies to support the advantages of proposed scheme. [ABSTRACT FROM AUTHOR]

This paper proposes a novel 49-level stacked inverter topology for drives. The 49 levels are achieved by stacking three 17-level inverters. Each of the 17-level inverter is developed by cascading a flying capacitor (FC) inverter with three capacitor-fed H-bridges. The device count can be reduced by making the FC and the three cascaded H-bridges common to the dc link in each phase using selector switches in between them. The selector switches need to operate at fundamental frequency only. Also, the devices need to block very low voltages. Hence, MOSFETs can be used. This topology requires three dc sources, each of V\text{dc} /6 only, which can be replaced with stacked batteries for electric vehicle applications. The reduction in the dc voltage requirement is achieved by using a normal symmetric six-phase induction motor with parallel connection of the opposite phase windings. All the floating capacitors in the topology can be balanced irrespective of any modulation index or load power factor. Due to the high number of voltage levels, nearest level control can be used instead of pulse width modulation, which reduces the switching losses. The $dv/dt$ during the inverter operation is also less. Detailed experimental results at different speeds of operation and during transients ensure that the novel topology can be a viable option for high-power adjustable speed drives. [ABSTRACT FROM PUBLISHER]

In the last decades, multilevel converters have been developed usually for medium-voltage high-power applications. They have become a mature solution for the increasing power demand of multiple applications such as renewable energy systems, power quality improvement, and motor drives. In this paper, the operation of multilevel converters is addressed focusing on control and modulation techniques for different well-known applications. The new developments are presented as an extension of conventional methods for two-level voltage-source converters which are still the mainstream solution for most cases. [ABSTRACT FROM PUBLISHER]

Multilevel cascaded H-bridge converters have become a mature technology for applications where high-power medium ac voltages are required. Normal operation of multilevel cascaded H-bridge converters assumes that all power cells have the same dc voltage, and each power cell generates the same voltage averaged over a sampling period using a conventional phase-shifted pulse width modulation (PWM) technique. However, this modulation method does not achieve good results under unbalanced operation per H-bridge in the power converter, which may happen in grid-connected applications such as photovoltaic or battery energy storage systems. In the paper, a simplified mathematical analysis of the phase-shifted PWM technique is presented. In addition, a modification of this conventional modulation method using variable shift angles between the power cells is introduced. This modification leads to the elimination of harmonic distortion of low-order harmonics due to the switching (triangular carrier frequency and its multiples) even under unbalanced operational conditions. The analysis is particularized for a three-cell cascaded H-bridge converter, and experimental results are presented to demonstrate the good performance of the proposed modulation method. [ABSTRACT FROM PUBLISHER]

Zero-common-mode-voltage (CMV) operation of multilevel inverters results in reduced dc-bus utilization and reduced linear modulation range. In this paper, a method to increase the linear modulation range for zero-CMV operation without increasing the dc-bus voltage using a cascaded multilevel inverter with a single dc supply is presented. Using this method, the peak fundamental output voltage can be increased from 0.499 to 0.637  \textV\text{dc} with zero CMV inside the linear modulation range. Also, various pulse width modulation (PWM) switching sequences are analyzed in this paper, and the PWM sequence that gives minimum current ripple is used for the zero-CMV operation of the inverter. The inverter topology with single dc supply is realized by cascading a two-level inverter with two floating-capacitor-fed full-bridge modules. Simulation and experimental results for steady-state and dynamic operating conditions are presented to validate the proposed method. [ABSTRACT FROM AUTHOR]

For cascaded multilevel inverter topologies with a single dc supply, closed-loop capacitor voltage control is necessary for proper operation. This paper presents zero and reduced common-mode voltage (CMV) operation of a hybrid cascaded multilevel inverter with predictive capacitor voltage control. Each phase of the inverter is realized by cascading two- three-level flying capacitor inverters with a half-bridge module in between. For the presented inverter topology, there are redundant switching states for each inverter voltage levels. By using these switching state redundancies, for every sampling instant, a cost function is evaluated based on the predicted capacitor voltages for each phase. The switching state that minimizes cost function is treated as the best and is switched for that sampling instant. The inverter operates with zero CMV for a modulation index upto 86%. For modulation indices from 86% to 96%, the inverter can operate with reduced CMV magnitude (Vdc/18) and reduced CMV switching frequency using the new space-vector pulsewidth modulation (SVPWM) presented herein. As a result, the linear modulation range is increased to 96% as compared to 86% for zero CMV operation. Simulation and experimental results are presented for the inverter topology for various steady state and transient operating conditions by running an induction motor drive with open loop $V/f$ control scheme. [ABSTRACT FROM PUBLISHER]

In this study, analysis of extending the linear modulation range of a zero common-mode voltage (CMV) operated n-level inverter by allowing reduced CMV switching is presented. A new hybrid seven-level inverter topology with a single DC supply is also presented in this study and inverter operation for zero and reduced CMV is analysed. Each phase of the inverter is realised by cascading two three-level flying capacitor inverters with a half-bridge module in between. Proposed inverter topology is operated with zero CMV for modulation index <86% and is operated with a CMV magnitude of Vdc/18 to extend the modulation range up to 96%. Experimental results are presented for zero CMV operation and for reduced common voltage operation to extend the linear modulation range. A capacitor voltage balancing algorithm is designed utilising the pole voltage redundancies of the inverter, which works for every sampling instant to correct the capacitor voltage irrespective of load power factor and modulation index. The capacitor voltage balancing algorithm is tested for different modulation indices and for various transient conditions, to validate the proposed topology. [ABSTRACT FROM AUTHOR]

Photovoltaic (PV) energy has grown at an average annual rate of 60% in the last five years, surpassing one third of the cumulative wind energy installed capacity, and is quickly becoming an important part of the energy mix in some regions and power systems. This has been driven by a reduction in the cost of PV modules. This growth has also triggered the evolution of classic PV power converters from conventional single-phase grid-tied inverters to more complex topologies to increase efficiency, power extraction from the modules, and reliability without impacting the cost. This article presents an overview of the existing PV energy conversion systems, addressing the system configuration of different PV plants and the PV converter topologies that have found practical applications for grid-connected systems. In addition, the recent research and emerging PV converter technology are discussed, highlighting their possible advantages compared with the present technology. [ABSTRACT FROM PUBLISHER]

Multilevel converters have received increased interest recently as a result of their ability to generate high quality output waveforms with a low switching frequency. This makes them very attractive for high-power applications. A cascaded H-bridge converter (CHB) is a multilevel topology which is formed from the series connection of H-bridge cells. Optimized pulse width modulation techniques such as selective harmonic elimination or selective harmonic mitigation (SHM-PWM) are capable of preprogramming the harmonic profile of the output waveform over a range of modulation indices. Such modulation methods may, however, not perform optimally if the dc links of the CHB are not balanced. This paper presents a new SHM-PWM control strategy which is capable of meeting grid codes even under nonequal dc link voltages. The method is based on the interpolation of different sets of angles obtained for specific situations of imbalance. Both simulation and experimental results are presented to validate the proposed control method. [ABSTRACT FROM PUBLISHER]

In this paper, a new three-phase, five-level inverter topology with a single-dc source is presented. The proposed topology is obtained by cascading a three-level flying capacitor inverter with a flying H-bridge power cell in each phase. This topology has redundant switching states for generating different pole voltages. By selecting appropriate switching states, the capacitor voltages can be balanced instantaneously (as compared to the fundamental) in any direction of the current, irrespective of the load power factor. Another important feature of this topology is that if any H-bridge fails, it can be bypassed and the configuration can still operate as a three-level inverter at its full power rating. This feature improves the reliability of the circuit. A 3-kW induction motor is run with the proposed topology for the full modulation range. The effectiveness of the capacitor balancing algorithm is tested for the full range of speed and during the sudden acceleration of the motor. [ABSTRACT FROM AUTHOR]

Single-phase power converters are widely used in power applications as photovoltaics and fuel-cell power conditioners. In addition, multilevel converters are a well-known solution in order to achieve high-quality output waveforms in power systems. In this paper, a time-domain duty-cycle computation technique for single-phase multilevel converters named IDM is presented. The proposed technique is based on geometrical calculations with outstanding simplicity and generality. The proposed modulation technique can be easily applied to any multilevel converter topology carrying out the necessary calculations. The most common multilevel converter topologies have been studied in this paper as examples to introduce the proposed modulation strategy. Any other multilevel converter topology could be studied, and the corresponding IDM could be easily developed. In addition, the well-known optimized voltage balance strategy for voltage capacitor control using the redundant switching states of the system is applied working with the proposed IDM method, showing that both techniques are compatible. Experimental and simulation results for several single-phase multilevel converters are shown to validate the proposed modulation technique. [ABSTRACT FROM AUTHOR]