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Recent advances in superconducting circuit technology have made the fabrication of large, customizable circuits routine. This has led to their application to areas beyond quantum information and, in particular, to their use as quantum simulators. A key challenge in this effort has been the identification of the quantum states realized by these circuits. Here, we propose a probe circuit capable of reading out many-body correlations in an analog quantum simulator. Our measurement scheme, designed for many-photon states, exploits the non-linearity of the Josephson junction to measure two-point (and potentially higher-order) correlation functions of the superconducting phase operator. We demonstrate the capabilities of this design in the context of an LC-ladder with a quantum impurity. The proposed probe allows for the measurement of inherently quantum correlations, such as squeezing, and has the potential to significantly expand the scope of analog quantum simulations using superconducting circuits., Comment: 12 pages, 4 figures

The prospect of using light to probe or manipulate quantum materials has become an active area of interest. Here, we investigate a quantum wire -- treated as a finite-sized one-dimensional electron gas -- that is coupled to a single photonic mode. This work focuses on the radiative properties of the wire when it is prepared in some excited state. One of our key results addresses the photon cascade initiated by the creation of a single electron-hole pair. Repeated photon emission leads to the generation of entanglement between the electron and hole and the emission rates exhibit Dicke-like superradiance. In general, the radiation is characterized by a competition between superradiance and Pauli blocking. We find that the one-dimensional electron gas represents an ideal system for investigating quantum coherent phenomena and quantum entanglement. This work has direct relevance to applications in quantum computation and quantum transduction., Comment: 10 pages, 7 figures

Security associated threats are often increased for online social media during a pandemic, such as COVID-19, along with changes in a work environment. For example, employees in many companies and organizations have started to work from home due to the COVID-19 pandemic. Such working style has increased many remote activities and further relied on email for communication, thus creating an ideal condition for email fraud schemes. Motivated by this observation, the main purpose of this work is to evaluate the privacy policy of online social media and identify potential security associated problems. First, we perform a risk analysis of online social media networks such as Facebook, Twitter and LinkedIn by using the STRIDE model. This aims to find threats and vulnerabilities in the online social media. Then in this analysis, the phishing attack was found to be a main threat in online social media, which is a social engineering attack, where users are convinced through some fake messages or emails to extract their personal credentials., Comment: The 19th International Conference on Networking and Services (ICNS 2023), pp. 28-33, IARIA, 2023

In this paper, we propose an architecture/methodology for making FPGAs suitable for integer as well as variable precision floating point multiplication. The proposed work will of great importance in applications which requires variable precision floating point multiplication such as multi-media processing applications. In the proposed architecture/methodology, we propose the replacement of existing 18x18 bit and 25x18 bit dedicated multipliers in FPGAs with dedicated 24x24 bit and 24x9 bit multipliers, respectively. We have proved that our approach of providing the dedicated 24x24 bit and 24x9 bit multipliers in FPGAs will make them efficient for performing integer as well as single precision, double precision, and Quadruple precision floating point multiplications., Comment: Published in Proceedings of the 2007 International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA'07), Las Vegas, U.S.A, June 2007, Volume 1, pp. 449-450.(CSREA Press)

IEEE 754r is the ongoing revision to the IEEE 754 floating point standard and a major enhancement to the standard is the addition of decimal format. Furthermore, in the recent years reversible logic has emerged as a promising computing paradigm having its applications in low power CMOS, quantum computing, nanotechnology, and optical computing. The major goal in reversible logic is to minimize the number of reversible gates and garbage outputs. Thus, this paper proposes the novel concept of partial reversible gates that will satisfy the reversibility criteria for specific cases in BCD arithmetic. The partial reversible gate is proposed to minimize the number of reversible gates and garbage outputs, while designing the reversible BCD arithmetic circuits., Comment: Published in Proceedings of the 2007 International Conference on Computer Design(CDES'07), Las Vegas, U.S.A, June 2007, pp. 90-91(CSREA Press)