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1. Fast Shared-Memory Barrier Synchronization for a 1024-Cores RISC-V Many-Core Cluster

2. Machine Learning Methodologies to Support HPC Systems Operations: Anomaly Detection

3. An Optimized Heart Rate Detection System Based on Low-Power Microcontroller Platforms for Biosignal Processing

4. Rule-Based Thermal Anomaly Detection for Tier-0 HPC Systems

5. Low-Overhead Early-Stopping Policies for Efficient Random Forests Inference on Microcontrollers

6. A Data-Driven Approach to Lightweight DVFS-Aware Counter-Based Power Modeling for Heterogeneous Platforms

7. PULP-TrainLib: Enabling On-Device Training for RISC-V Multi-core MCUs Through Performance-Driven Autotuning

8. ControlPULP: A RISC-V Power Controller for HPC Processors with Parallel Control-Law Computation Acceleration

10. RVfplib: A Fast and Compact Open-Source Floating-Point Emulation Library for Tiny RISC-V Processors

11. Explainable Deep Learning for Medical Time Series Data

12. Streamlining the OpenMP Programming Model on Ultra-Low-Power Multi-core MCUs

13. Predicting Hard Disk Failures in Data Centers Using Temporal Convolutional Neural Networks

14. Thermal Characterization of a Tier0 Datacenter Room in Normal and Thermal Emergency Conditions

15. Leveraging Automated Mixed-Low-Precision Quantization for Tiny Edge Microcontrollers

16. An Energy Optimized JPEG Encoder for Parallel Ultra-Low-Power Processing-Platforms

17. The Memory Challenge in Ultra-Low Power Deep Learning

20. A LoRaWAN Wireless Sensor Network for Data Center Temperature Monitoring

21. Modeling and Evaluation of Application-Aware Dynamic Thermal Control in HPC Nodes

23. Frequency Assignment in High Performance Computing Systems

31. Introduction

38. Leakage Bounds for Gaussian Side Channels

39. Outlook

40. A Dual Processor Energy-Efficient Platform with Multi-core Accelerator for Smart Sensing

41. SHelmet: An Intelligent Self-sustaining Multi Sensors Smart Helmet for Bikers

42. SNW-MAC: An Asynchronous Protocol Leveraging Wake-Up Receivers for Data Gathering in Star Networks

45. Optimal Tiling Strategy for Memory Bandwidth Reduction for CNNs

47. Ultra-Low Power Context Recognition Fusing Sensor Data from an Energy-Neutral Smart Watch

48. Predictive Modeling for Job Power Consumption in HPC Systems

49. Design and Evaluation of a Processing-in-Memory Architecture for the Smart Memory Cube

50. DARDIS: Distributed And Randomized DIspatching and Scheduling

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