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How to design a universal fault-tolerant quantum computation protocol with high fidelity and low resource consumption is a hot topic in the field of quantum computing research. By reducing the effective code distance, the design of a universal fault-tolerant gate set based on concatenation code has been proposed. The auxiliary state required by the error correction of code must be verified before it can be used, so as to avoid the errors spread from the auxiliary state to the data state. But the qubit consumption can be very large due to multiple verification processes for the ancillary block. In this work, we analyze the ancillary consumption of two different verification schemes used in the Steane's error correction process. We take the basic state preparation of a 25-qubit 2-level concatenation code as an example, adopt a simpler verification circuit in its error correction process, and design an efficient decoding strategy by using deep neural network algorithm. Numerical simulations are also performed to analyze our low qubit resource overhead error correction scheme. [ABSTRACT FROM AUTHOR]

We propose a non-transversal but pieceable fault tolerant conversion circuit that is used to convert encoded information between five-qubit code and seven-qubit CSS code. Since a syndrome extraction circuit requiring fewer ancillary qubit resources would facilitate the realization of large-scale quantum computations, we further adapt a flag-assisted fault tolerant syndrome measurement scheme to reduce the cost of ancillary preparation. Numerical simulations are also performed to further analyze the performance of our conversion method. [ABSTRACT FROM AUTHOR]