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The performance of theoretical ultrahigh-voltage power semiconductor devices has been predicted by means of numerical simulations using the Sentaurus technology computer-aided design tool. A general silicon carbide punch-through insulated-gate bipolar transistor (IGBT) structure has been implemented with suitable physics-based models and parameters to reflect the device characteristics in a wide range of device blocking voltages from 20 to 50 kV. The models for 20 kV class IGBTs have been implicitly validated by means of published experimental results. Mixed-mode simulations were performed that predicted total switching energy loss densities of 335, 629, 906, and 999 mJ/cm2 for 20, 30, 40, and 50 kV class devices, respectively, at 25 °C, JC = 20 A/cm2, and an ambipolar carrier lifetime of 20 μs. While the IGBT on-state forward voltage drop reduces, the switching losses increase with higher charge-carrier lifetime for a given current density (e.g., 20 A/cm2). The large span of simulation results will be used as an input support to the design of future high-power converters. [ABSTRACT FROM AUTHOR]

In this article, the static, dynamic, and short-circuit properties of 1.2-kV commercial 4H-SiC planar and trench gate metal–oxide–semiconductor field-effect transistors (MOSFETs) are compared and analyzed in a wide temperature range from 90 to 493 K. The temperature-dependent specific ON-resistance (${R}_{\text {sp}- \mathrm{\scriptscriptstyle ON}}$) and threshold voltage (${V}_{\text {th}}$) are analyzed in relation to the density of the interface state. The turn-on rise and turn-off fall times (${T}_{r}$ and ${T}_{f}$) and the corresponding energy loss (${E}_{r}$ and ${E}_{f}$) are extracted from a double-pulse test from cryogenic to high temperature and analyzed. The short-circuit capability of the two structures is studied at low temperature for the first time. The comprehensive comparison and analysis of the planar and trench gate MOSFET versus temperature in this work show the importance to study applications with SiC MOSFETs in a wide temperature range, especially for the cryogenic temperatures. [ABSTRACT FROM AUTHOR]

In this paper, an improved 4H-SiC U-shaped trench-gate metal–oxide–semiconductor field-effect transistors (UMOSFETs) structure with low ON-resistance (${R}_{ \mathrm{\scriptscriptstyle ON}}$) and switching energy loss is proposed. The novel structure features an added n-type region, which reduces ON-resistance of the device significantly while maintaining the breakdown voltage (${V}_{\textsf {BR}}$). In addition, the gate of the improved structure is designed as a p-n junction to reduce the switching energy loss. Simulations by Sentaurus TCAD are carried out to reveal the working mechanism of this improved structure. For the static performance, the ON-resistance and the figure of merit (FOM $= {V}_{\textsf {BR}}^{\textsf {2}}/{R}_{ \mathrm{\scriptscriptstyle ON}}$) of the optimized structure are improved by 40% and 44%, respectively, as compared to a conventional trench MOSFET without the added n-type region and modified gate. For the dynamic performance, the turn-on time (${T}_{ \mathrm{\scriptscriptstyle ON}}$) and turn-off time (${T}_{ \mathrm{\scriptscriptstyle OFF}}$) of the proposed structure are both shorter than that of the conventional structure, bringing a 43% and 30% reduction in turn-on energy loss and total switching energy loss (${E}_{\mathbf {SW}}$). [ABSTRACT FROM AUTHOR]

Silicon nanoparticles (SiNPs) are formed by implanting 70keV Si+ into a SiO2-film and subsequent thermal annealing. SiNP samples are further annealed in forming gas. Another group of samples containing SiNP is implanted by 7.5 keV H+ and subsequently annealed in N2-atmosphere at 450°C to reduce implantation damage. Nuclear reaction analysis (NRA) is employed to establish depth profiles of the H-concentration. Enhanced hydrogen concentrations are found close to the SiO2 surface, with particularly high concentrations for the as-implanted SiO2. However, no detectable uptake of hydrogen is observed by NRA for samples treated by forming gas annealing (FGA). H-concentrations detected after H-implantation follow calculated implantation profiles. Photoluminescence (PL) spectroscopy is performed at room temperature to observe the SiNP PL. Whereas FGA is found to increase PL under certain conditions, i.e., annealing at high temperatures, increasing implantation fluence of H reduces the SiNP PL. Hydrogen implantation also introduces additional defect PL. After low-temperature annealing, the SiNP PL is found to improve, but the process is not found equivalently efficient as conventional FGA. [ABSTRACT FROM AUTHOR]

A high gamma radiation hardness of 4H-SiC circuits is performed. The OR NOR circuits are based on emitter coupled logic (ECL), using integrated bipolar NPN transistors. Gain degradation in individual bipolar junction transistors (BJT) is minimal up to a dose of 38 Mrad (SiO2), but for the dose of 332 Mrad (SiO2) a degradation of 52% is observed. The SiC BJTs show higher radiation hardness than existing Si-technology and high stability under temperature stress. It is proposed that the oxide charge-dominated recombination is the key base current recombination mechanism contributing to gain degradation. An improvement in the gain is seen after annealing at 400 °C for 1800 s due to the possible annealing of some of the oxide defects contributing to the oxide charge. [ABSTRACT FROM PUBLISHER]