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Coupled inductors offer significant advantages over their uncoupled counterparts; however, with these advantages come a number of additional design caveats. The factors affecting the design and optimization of coupled stripline microinductors for PwrSoC applications are outlined, which include device area, the number of coupled phases, duty cycle, paralleling of coupled inductors, switching frequency, as well as thermal and saturation constraints. Results of this analysis are presented and discussed along with guidelines for the design of coupled stripline microinductors, which show that paralleling coupled inductors is the best route toward higher output current. Analytical models predict a peak inductor efficiency of 86.8% and 86.3% for fabricated 3 and 5-phase coupled stripline microinductors with an Ni45Fe55 core, respectively. Models are verified by measurements on prototype 3 and 5-phase converters with parallel coupled stripline microinductors over a range of operating conditions. [ABSTRACT FROM AUTHOR]

In this paper, models that account for the duty cycle and phase shift angle of the applied phase voltages in coupled stripline microinductors are presented and are shown to have a significant impact on harmonic current amplitudes and therefore microinductor efficiency. The impact of a high coupling factor between two windings surrounded by a single core is also investigated. The models are validated using finite-element analysis and measurements. A three-phase-coupled microinductor has been fabricated with a Ni45Fe55 core and analyzed for a number of operating conditions. A prototype 1.6 W, three-phase converter utilizing this inductor has also been measured and is discussed in detail. The coupled microinductor is predicted to have a peak efficiency of 86.6% at 20 MHz in the prototype circuit. [ABSTRACT FROM AUTHOR]

Inductor-on-silicon research to date has focused on optimizing technologies for maximum power density and efficiency, with most design procedures based on computationally intensive methods. In this paper, a simple and intuitive method for designing microinductors based on a given dc–dc converter specification, which includes accurate models for all loss components, is presented. A detailed examination of variations in designs to realise the same circuit performance is presented. Finally, finite element analysis simulations demonstrating the accuracy of the models are given, along with measured results. [ABSTRACT FROM AUTHOR]

This paper examines the process challenges in developing high aspect-ratio copper structures for improving microinductor performance. With increased miniaturization, increasing windings losses become a major challenge limiting the microinductor efficiency. It was also identified that within constraint footprints coil thickness to spacing ratio increase can reduce dc resistance significantly. In this paper, we present a reliable process for developing high aspect ratio ( $\sim 5.8$ ) resist moulds for copper electrodeposition. This resist provided coil spacings 10 $\mu $ m for 58 $\mu $ m resist thickness; this in turn reduces the dc resistance of a typical microinductor by more than 17% when compared with a similar device reported previously. [ABSTRACT FROM AUTHOR]