Search

This article has shown the design and characterization of silicon-integrated thin-film micro-transformers and their application in a quasi-resonant flyback converter. Two micro-transformers with different turn ratios of 4:4 and 3:3 were designed. The micro-transformers in this study have elongated spiral shape windings sandwiched between two layers of the thin-film magnetic core, and this structure can leverage the anisotropic core property. The micro-transformers were built on a silicon substrate using micro-electro-mechanical systems (MEMSs) fabrication process to ensure a high integration level and high power density. The inductance of 4:4 and 3:3 micro-transformers are 57.3 and 31.5 nH, respectively, their coupling coefficients are 90.5% and 82.7% at 30–40 MHz, and the measured quality factors are 7.82 at 21 MHz and 8.94 at 35 MHz, respectively. A resonant flyback converter topology deploying with a high electron mobility transistor [Gallium nitride (GaN)] was used to evaluate the electrical performance of two micro-transformers. Two resonant flyback converters operating at zero voltage switching (ZVS) reached the maximum conversion efficiency of 46.4% (3:3) and 45.7% (4:4), respectively, with 3.3 V input. The 3:3 micro-transformer developed in this work achieved the highest power density of 128 mW/mm2 with a similar efficiency compared to other cored micro-transformers. The loss analysis of the flyback conversion circuit shows that the main losses in the circuit are the copper winding loss of the micro-transformer and the eddy current loss of the magnetic core. The conversion efficiency of the circuit will be improved by applying thicker copper and core lamination in the future. [ABSTRACT FROM AUTHOR]

This letter demonstrates an on-silicon integrated thin film coupled inductor using a novel cascade matrix concept to suit multiphase integrated voltage regulator (IVR) applications. The novel cascade matrix coupled (CMC) stripline inductor facilitates all-phase-coupled configuration to reduce the phase ripple current in IVRs. It also shows excellent scalability and neat floor planning. Moreover, the proposed CMC inductor uses double layer metal scheme for windings and interconnects, which significantly reduces the ac winding resistance. A four-phase CMC inductor has been successfully fabricated on-silicon substrate and characterized, which uses conventional thin film magnetic core deposition process to achieve in-plane magnetic uniaxial anisotropy. The device occupies 3.2 × 1.7 mm2 floor area and provides 19.5 nH phase inductance with 120 mΩ dc resistance. The saturation current for each phase is up to 0.4 A when the phase inductance drops by approximately 20%. The coupling coefficient between any two phases of the proposed CMC inductor is 0.27, much higher and more controllable than that of toroid core-based coupled inductors. [ABSTRACT FROM AUTHOR]

In this work a stacked winding thin film magnetic core microinductor is proposed to improve the ratio of inductance to dc resistance (DCR). This article also describes an improved ac winding loss model accounting for the asymmetric 2-D magnetic fields present within the device. Two six-turn single layer and stacked winding devices are fabricated, and small signal measurements are presented with dc inductance of 150 nH and DCR of $0.35~\Omega $ for the stacked winding inductor, and with DCR of $0.47~\Omega $ for the single winding inductor. In this case, the total DCR of stacked winding inductor is reduced by approximately 25% compared with the corresponding single layer structure with an equivalent inductance and device area. [ABSTRACT FROM AUTHOR]

Coupled inductors offer significant advantages over their uncoupled counterparts; however, with these advantages come a number of additional design caveats. The factors affecting the design and optimization of coupled stripline microinductors for PwrSoC applications are outlined, which include device area, the number of coupled phases, duty cycle, paralleling of coupled inductors, switching frequency, as well as thermal and saturation constraints. Results of this analysis are presented and discussed along with guidelines for the design of coupled stripline microinductors, which show that paralleling coupled inductors is the best route toward higher output current. Analytical models predict a peak inductor efficiency of 86.8% and 86.3% for fabricated 3 and 5-phase coupled stripline microinductors with an Ni45Fe55 core, respectively. Models are verified by measurements on prototype 3 and 5-phase converters with parallel coupled stripline microinductors over a range of operating conditions. [ABSTRACT FROM AUTHOR]

In this paper, models that account for the duty cycle and phase shift angle of the applied phase voltages in coupled stripline microinductors are presented and are shown to have a significant impact on harmonic current amplitudes and therefore microinductor efficiency. The impact of a high coupling factor between two windings surrounded by a single core is also investigated. The models are validated using finite-element analysis and measurements. A three-phase-coupled microinductor has been fabricated with a Ni45Fe55 core and analyzed for a number of operating conditions. A prototype 1.6 W, three-phase converter utilizing this inductor has also been measured and is discussed in detail. The coupled microinductor is predicted to have a peak efficiency of 86.6% at 20 MHz in the prototype circuit. [ABSTRACT FROM AUTHOR]

Inductor-on-silicon research to date has focused on optimizing technologies for maximum power density and efficiency, with most design procedures based on computationally intensive methods. In this paper, a simple and intuitive method for designing microinductors based on a given dc–dc converter specification, which includes accurate models for all loss components, is presented. A detailed examination of variations in designs to realise the same circuit performance is presented. Finally, finite element analysis simulations demonstrating the accuracy of the models are given, along with measured results. [ABSTRACT FROM AUTHOR]

This paper details the design, fabrication, and characterization of silicon-integrated microtransformers for isolated bias supplies. Racetrack-shaped microtransformers were designed and fabricated using the advanced double-layer metal (DLM) microfabrication process. The DLM devices have high inductance density of more than 80 nH/mm2 with an efficiency of approximately 78.2% at 20 MHz at 0.5-W output. This is the highest efficiency and power density reported for an integrated transformer in the literature. The inductance drop is less than 20% with a bias current of 0.35 A with up to 6-kV dc breakdown voltage achieved. [ABSTRACT FROM AUTHOR]