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The relative share of renewable energy, specifically the solar photovoltaic (PV), is increasing exponentially in the world electric energy sector. This is a cumulative result of reduction in the cost of solar panels, improvement in the panel efficiency, and advancement in the associated power electronics. Among different types of PV plants, installation of small-scale rooftop PV is growing rapidly due to direct end-user benefits and lucrative governmental incentives. There are various standards developed in regards to grid integration of PVs and other distributed generations (DGs). Different power converter topologies are developed to interface the PV panel with the utility grid. To keep up with the stringent regulations imposed by the standards, various control strategies and grid synchronization methods have been developed. This review article amalgamates and summarizes all of the aforementioned aspects of a grid-integrated PV system including various standards, power stage architectures, grid synchronization methods, operation under extreme events, and control methodologies, pertaining to small-scale PV plants. This article will help freshman researchers to gain some familiarity with the topic and introduce them to some of the key issues encountered in this field. [ABSTRACT FROM AUTHOR]

Due to the pulsating power at the inverter output terminals, the passive storage elements of the boost stage of the current-fed switched inverter (CFSI) contain a power frequency harmonic component (100 Hz), apart from dc and switching frequency components. In prior designs, the second harmonic component is suppressed by increasing the size of the input filter inductor and capacitor or by using additional circuits. This paper presents a complete characterization of a control-based approach to suppress the power frequency harmonic component in the input inductor current of a CFSI. It also presents a comprehensive characterization of the harmonic power redistribution. Using the proposed approach, it is demonstrated that the inductor value of a CFSI is reduced by 61% for the same peak-to-peak ripple. This leads to an improvement in the conversion ratio, efficiency, and power density of the overall converter. A SiC MOSFET-based CFSI with 75-kHz switching frequency is used to verify the proposed design philosophy. [ABSTRACT FROM AUTHOR]

Impedance source inverters (ISIs) are gaining attention due to features such as single-stage conversion, buck-boost capability, and inherent shoot-through protection. To maintain the required ac output voltage, typically ISIs are operated at a higher dc-link voltage due to constrained modulation index. This also increases voltage stress across capacitors and switches of the converter. This voltage stress is approximately double compared to that of voltage source inverter with preboost stage (Boost-VSI). To mitigate this problem, a new pulsewidth modulation (PWM) scheme for the active-front-end based ISIs (AFE-ISIs) is proposed. The proposed scheme enables the ISIs to produce high ac gain with lower voltage stress across the capacitor and switches. In other words, the proposed scheme blends the advantages of Boost-VSI into ISIs. With the new PWM scheme, there are also reductions in output voltage total harmonic distortion, switching frequency ripple in the inductor current, and power loss in the converter. A prototype of the current-fed switched inverter, an AFE-ISI, is designed, and the proposed PWM scheme is implemented. Experimental results obtained are in accordance with the proposed theory and show that the voltage stress has reduced from 325 V to 203 V for an ac output of 110 V. [ABSTRACT FROM AUTHOR]