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Inverter-based memristive neural networks have the advantages of much lower power consumptions and higher speeds compared to those of digital implementations while they suffer from accuracy degradation due to the circuit elements variations. In this brief, we propose a circuit-level method, called RIM (Resistor-Inverter based Memristive neural network) to mitigate the accuracy degradation of this type of neural network implementation at the presence of variations as well as improve the efficacy of its offline training. In the proposed method, the high slope of the inverter voltage transfer characteristic (VTC) is reduced by adding a grounded resistor to the inverter output node. While decreasing the resistance, generally, suppresses the adverse effects of variations on the network accuracy as well as the loading effect of the memristive crossbar, it may lead to output accuracy decrease under the nominal (no variation) condition. Thus, some trade-off is considered for choosing a proper value for the added resistance. The study reveals that RIM can improve the output accuracy in the range of 10%–96% (51%–74%) in the nominal condition (variations condition). [ABSTRACT FROM AUTHOR]

In this paper, we propose a training framework for an inverter-based memristive neuromorphic hardware. The framework, which is called PHAX, is a physical characteristics aware one relying on an ex-situ training approach. The considered neuromorphic circuit is highly energy efficient hybrid CMOS-memristive implementation of neuromorphic circuits. To solve the problem of high sensitivity of the training to the mismatches between the high-level mathematical modeling of the neurons and the corresponding physical characteristics, an approach for analytical yet accurate modeling of the memristive crossbar and neuron circuits is suggested. The approach, which is based on SPICE simulations, models the inverter-based neurons using a hyperbolic tangent function. To increase the training efficacy, the backpropagation training algorithm is modified by considering some constraints based on the physical characteristics of the memristive circuit. This modification along with the accurate back-annotation of the physical characteristics considerably improve the effectiveness of the ex-situ training method of the neuromorphic circuit. The results of this paper show an average reduction of $1805{\times }$ in the training runtime compared to that of the in-situ training approach. Furthermore, the results of applying the approach on the kernels of some applications such as image recognition, image processing, and financial analysis reveal that the designed neuromorphic circuits provide an average power saving (speed up) of $1478{\times }$ ( $5.2{\times }$ ) over the ASIC implementation in a 90-nm CMOS technology. [ABSTRACT FROM AUTHOR]