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Space vector modulation (SVM) is a mature modulation scheme, which is widely used for voltage source inverters. In this article, a flexible online SVM scheme is proposed for a cascaded H-bridge multilevel inverter (CHMI) under short-circuit and open-circuit switch as well as cell failure conditions. The proposed scheme directly calculates all the active redundant switching states and the dwelling duty cycles of the three space vectors enclosing the reference vector for a CHMI such that balanced line-to-line voltages and currents under failure conditions are generated. Accordingly, the resultant switching sequences are determined to meet any specific requirement, e.g., even-order harmonics elimination and minimization of switching losses. Furthermore, in order to reduce voltage stress on the semiconductors under short- and open-circuit switch conditions, an equal power distribution criterion is introduced. The proposed SVM scheme is fast and independent of the number of levels. Experimental results are presented to demonstrate performance and effectiveness of the proposed scheme. [ABSTRACT FROM AUTHOR]

This article proposes a multiport modular single-stage current-source solid-state transformer (SST) for applications like photovoltaic, energy storage integration, electric vehicle fast charging, data center, etc. The 7.2 kV 50 kVA current-source SST consists of five input-series output-parallel modules, each based on 3.3 kV SiC reverse-blocking mosfet-plus-diode modules. The proposed SST has some unique features. First, compared with the voltage-source or matrix converter-based SSTs, the current-source SST has a unique advantage of single-stage isolated ac/dc or ac/ac conversion with an inductive dc link, but no medium-voltage (MV) ac experiments have been reported. This article for the first time demonstrates MV ac current-source SST up to 7.5 kV peak. Second, the multiport SST has a buffer port for active power decoupling (APD) or energy storage integration. The double-line-frequency power ripple from single-phase ac grid normally results in a large capacitor size in MV SSTs. The APD scheme is proposed in MV applications for the first time to enable a reduced dc link and the electrolytic capacitor-less SST with high reliability. Third, for a direct grid-connected converter without line-frequency transformer, insulation and protection are critical. A medium-frequency transformer design passes 55 kV basic-insulation level (BIL) and 60 kV high potential dielectrics withstand test with only 0.09% leakage inductance. Importantly, a lightning protection scheme is presented to protect the SST itself from 90 kV BIL impulse. Fourth, the proposed current-source SST topology is a modular soft-switching solid-state transformer (M-S4T) with full-range zero-voltage switching and controlled dv/dt for low electromagnetic interference. These concepts are verified in a three-port M-S4T prototype with forced oil cooling under single-module, stacked-module, steady-state, and dynamic operations. [ABSTRACT FROM AUTHOR]

Silicon carbide (SiC) MOSFETs with ratings of 3.3 to 15 kV represent a dramatic improvement over available silicon devices, enabling the realization of medium-voltage converters in demanding applications such as solid-state transformers. Typical voltage-source converter configurations realize significant reduction in switching loss with SiC devices, but high dv/dt of 30–50 kV/μs generates high levels of electromagnetic interference (EMI) and displacement currents. Current-source based zero-voltage switching (CS-ZVS) converters such as the soft-switching solid-state transformer (S4T), dramatically reduce switching loss using ZVS, thus realizing both controlled dv/dt and low EMI. CS-ZVS converters require reverse blocking (RB) modules that are realized using series connection of a diode and a MOSFET. However, no data are available from manufacturers or from literature on RB module characterization under ZVS conditions. This article presents detailed characterization results and model extraction for a 3.3 kV 45 A and a 1.7 kV 10 A SiC RB module, under both hard switching and ZVS modes. A novel double-pulse testbed is designed and built for this characterization of RB devices under both hard switching and ZVS conditions. Significantly, it is shown that when the RB modules are used in CS-ZVS converters, the dynamic voltage sharing between the RB modules in a phase leg and within the RB module (between the diode and the switch) results in a unique voltage stress. Modulation strategies to address this unique voltage stress are proposed and verified through experiment results, using a S4T prototype rated at 1.5 kV, 10 kVA. [ABSTRACT FROM AUTHOR]

The cascaded H-bridge multilevel converter (CHMC) is a promising topology for medium- and high-voltage applications, as it features modularity and scalability. In this letter, a simplified space vector modulation (SVM)-based reconfiguration strategy is proposed to enable fault-tolerant operation of a CHMC. Assuming that the faulty power cells are bypassed, the proposed strategy decomposes the asymmetric CHMC into two parts, i.e., healthy part with healthy modules and unhealthy part with faulty modules. Consequently, the basic reference vector (BRV) and the remainder reference vector (RRV) are generated from the reference vector (RV) to achieve balanced line-to-line voltages and currents with optimized harmonic performance. The proposed strategy can be easily implemented online. Performance and effectiveness of the proposed strategy is verified by experimental results. [ABSTRACT FROM AUTHOR]

A sequential switching strategy for hybrid dc circuit breaker (CB) is proposed to improve transients during dc fault interruption in multiterminal high voltage direct current (HVdc) grids. Compared to the conventionally tripped dc CB, the proposed switching strategy, which sequentially trips the breaking modules within the CB, reduces the peak fault current and overvoltage as well as fault clearance time. These metrics are analytically computed through a time-domain calculation approach considering the traveling wave phenomena in dc transmission systems. By rescheduling the tripping sequence and optimal rating and number of individual modules of the CB, the energy distributed among the modules is well balanced. Finally, an analytic evaluation of the proposed sequential tripping is performed and, subsequently, the best practice and the optimal design process are provided. Performance of the sequential switching strategy as well as the optimal design process are verified through simulation studies in the PSCAD/EMTdc software environment. [ABSTRACT FROM AUTHOR]

This paper presents a general space vector modulation (SVM) method for the modular multilevel converter (MMC). Compared with earlier modulation methods, the proposed SVM method not only utilizes the maximum level number (i.e., $2n+ 1$, where $n$ is the number of submodules in the upper or lower arm of each phase) of output phase voltages, but also leads to an optimized control performance in terms of capacitor voltage balancing, circulating current suppression, and common-mode voltage reduction. The maximum level number is achieved by introducing a new equivalent circuit of the MMC, and the optimized control is obtained by selecting the optimal redundant switching states. Since the computational burden of the SVM scheme is independent of the voltage level number, the proposed method is well suited to the MMC with any number of submodules. Simulation and experimental results are presented to validate the proposed method. [ABSTRACT FROM PUBLISHER]

The three-level neutral point-clamped (NPC) converter has attracted much attention in high-power medium-voltage applications, but it is well-known that the NPC topology suffers from unequal power loss distribution among its semiconductor devices. The power loss unbalance problem becomes especially severe when the converter is operating at low fundamental frequencies. To overcome the loss unbalance problem of the NPC converter, the active NPC (ANPC) technique was introduced. However, it is demonstrated in this paper that in many cases, the conventional modulation method for the ANPC converter only marginally relieves the loss unbalance problem. This paper proposes a new modulation scheme (named the adaptive doubled frequency modulation) for the three-level ANPC converter, which significantly improves the power loss and thermal sharing among the semiconductor devices. The basic idea of the proposed scheme is adaptively adjusting the duty cycles of the switching states for every switching cycle, so as to optimize the power loss distribution. Simulation and experimental results verify this new method. [ABSTRACT FROM AUTHOR]

The modular multilevel converter (MMC) has become one of the most promising converter topologies for medium/high-power applications. Since the MMC is structured based upon stacking up a number of series-connected identical submodules (SMs), to improve its fault tolerance and reliability, SM failure detection and location is of significant importance. In this paper, the impact of open-circuit switch failures of the SMs on the operation of the MMC is analyzed. Based on the analysis under SM failure conditions, two SM failure detection and location methods are proposed, that is, a clustering algorithm (CA)-based method and a calculated capacitance (CC)-based method. In the proposed CA-based method, a pattern-recognition-based fault diagnosis approach, which employs the clustering algorithm to detect and locate the faulty SMs with open-switch failures through identifying the pattern of 2-D trajectories of the SM characteristic variables, is developed. The proposed CC-based method is based on the calculation and comparison of a physical component parameter, that is, the nominal SM capacitance, and is capable of failure detection, location, and classification within one stage. The performance of the proposed failure detection methods for an MMC system is evaluated based on time-domain simulation studies in the PSCAD/EMTDC software environment. The reported study results demonstrate the capabilities of the two proposed methods in detecting and locating any SM failure under various conditions accurately and efficiently. [ABSTRACT FROM PUBLISHER]

One of the main technical challenges associated with the modular multilevel converter (MMC) for any application is the optimal control of its states. Optimal control of the MMC requires determination of the following: 1) an accurate MMC model, 2) the MMC states to be controlled and their corresponding reference trajectories, and 3) an appropriate controller type/form and its parameters. The aforementioned tasks lead to the formulation of a multistate control optimization problem, which is tackled in this paper. This paper enhances the accuracy of the existing MMC state-space model by including the following: 1) a piecewise affine insulated-gate bipolar transistor/diode model and 2) the impact of dead time. This paper also proposes a simulation-based gradient-descent optimization algorithm (cosimulation) to optimize the controller gains, given the controller type/form and the reference state trajectory. The theoretical proofs of the gradients required in the optimization algorithm are also provided. The aforementioned optimization algorithm is applied to a variable-frequency MMC-based drive system. Experimental results on a scaled-down prototype and simulation results on a real-world application are provided to validate the accuracy of the proposed MMC model and to show the effectiveness of the proposed optimization algorithm. [ABSTRACT FROM AUTHOR]

The modular multilevel converter (MMC) is a potential candidate for medium/high-power applications, specifically for high-voltage direct current transmission systems. One of the main challenges in the control of an MMC is to eliminate/minimize the circulating currents while the capacitor voltages are maintained balanced. This paper proposes a control strategy for the MMC using finite control set model predictive control (FCS-MPC). A bilinear mathematical model of the MMC is derived and discretized to predict the states of the MMC one step ahead. Within each switching cycle, the best switching state of the MMC is selected based on evaluation and minimization of a defined cost function. The defined cost function is aimed at the elimination of the MMC circulating currents, regulating the arm voltages, and controlling the ac-side currents. To reduce the calculation burden of the MPC, the submodule (SM) capacitor voltage balancing controller based on the conventional sorting method is combined with the proposed FCS-MPC strategy. The proposed FCS-MPC strategy determines the number of inserted/bypassed SMs within each arm of the MMC while the sorting algorithm is used to keep the SM capacitor voltages balanced. Using this strategy, only the summation of SM capacitor voltages of each arm is required for control purposes, which simplifies the communication among the SMs and the central controller. This paper also introduces a modified switching strategy, which not only reduces the calculation burden of the FCS-MPC strategy even more, but also simplifies the SM capacitor voltage balancing algorithm. In addition, this strategy reduces the SM switching frequency and power losses by avoiding the unnecessary switching transitions. The performance of the proposed strategies for a 20-level MMC is evaluated based on the time-domain simulation studies. [ABSTRACT FROM PUBLISHER]

A parallel hybrid modular multilevel converter (PHMMC) belongs to the class of modular multilevel converters, which have become potential candidates for high-voltage direct-current (HVDC) transmission systems. Due to the circuit topology of a PHMMC, the dc bus voltage contains low-order harmonics and cannot be fully regulated at a constant dc voltage. The dc bus voltage, if not properly controlled, leads to improper power transfer and increases the magnitude of dc current ripple on the dc transmission line. This paper proposes a zero-sequence voltage injection (ZSVI)-based model predictive control (MPC) strategy to control the dc current/power flow and simultaneously minimize the dc current ripple. The proposed strategy takes advantage of a cost function minimization technique to determine and inject the optimal zero-sequence voltage components into the dc- bus voltage of a PHMMC system. This paper derives a discrete-time dynamic model of the dc transmission-line current and, correspondingly, develops a predictive model. The predictive model is used to inject the appropriate amount of zero-sequence voltage components to the dc bus reference voltage waveform. Compared with the existing triplen harmonics injection method, the proposed ZSVI-MPC strategy improves the performance of a PHMMC system in terms of minimization of the dc current/voltage ripple. Performance of the proposed strategy for a 21-level PHMMC-based HVDC station system is evaluated based on time-domain simulation studies in the PSCAD/EMTDC software environment. The reported results demonstrate superior performance of the PHMMC-HVDC station operating based on the proposed ZSVI-MPC strategy, under various operating conditions, as opposed to the existing triplen harmonics injection method. [ABSTRACT FROM AUTHOR]

In this paper, a new post-fault modulation strategy is proposed to operate the direct matrix converter as close as possible to its desired normal operation under an open-switch fault condition. The proposed strategy determines appropriate switching states associated with eight, out of the nine, remaining healthy switches of the converter, to synthesize the reference voltages. The corresponding duty cycles of the determined switching states are calculated by formulating a nonlinear optimization problem that aims at minimization of the error between the desired reference voltages and the voltages generated by the switching states. The solution to the nonlinear optimization problem is obtained based on the Karush–Kuhn–Tucker conditions. The performance of the proposed modulation strategy is evaluated based on time-domain simulation studies in the MATLAB/Simulink software environment and also experimentally verified. [ABSTRACT FROM PUBLISHER]

The modular multilevel converter (MMC) has become the most promising converter technology for high-voltage direct current (HVDC) transmission systems. However, similar to any other voltage-sourced converter-based HVDC system, MMC-HVDC systems with the half-bridge submodules (SMs) lack the capability of handling dc-side short-circuit faults, which are of severe concern for overhead transmission lines. In this paper, two new SM circuit configurations as well as a hybrid design methodology to embed the dc-fault-handling capability in the MMC-HVDC systems are proposed. By combining the features of various SM configurations, the dc-fault current path through the freewheeling diodes is eliminated and the dc-fault current is enforced to zero. Several MMC configurations based on the proposed hybrid design method and various SM circuits, that is, the half-bridge, the full-bridge, the clamp-double, and the five-level cross-connected SMs, as well as the newly proposed unipolar-voltage full-bridge and three-level cross-connected SMs, are investigated and compared in terms of the dc-fault-handing capability, semiconductor power losses, and component requirements. The studies are carried out based on time-domain simulation in the PSCAD/EMTDC software environment for various SM configurations and dc-fault conditions. The reported study results demonstrate the proposed hybrid-designed MMC-HVDC system based on the combination of the half-bridge and the proposed SM circuits is the optimal design among all evaluated systems in terms of the dc-fault-handing capability, semiconductor power losses, and component requirements. [ABSTRACT FROM PUBLISHER]

The modular multilevel converter (MMC) is the most promising converter topology for medium- and high-power applications. One of the main concerns in the operation of the MMC, particularly for high-power applications, is its efficiency, which should be maximized. Silicon Carbide (SiC)-based devices have the potential to provide significant efficiency improvement compared with silicon devices. However, the possibility and impact of using SiC-based devices instead of silicon devices for high-power conversion have not been thoroughly explored. This paper reports on the results obtained from a detailed study to evaluate the performance of MMCs based on medium-voltage SiC MOSFETs and diodes with hybrid MMCs that employ silicon IGBTs and SiC diodes. The results are based on detailed circuit simulations that use simple physics-based circuit models. The study suggests the potential for significant efficiency gain for MMCs based on SiC power devices. [ABSTRACT FROM AUTHOR]

The modular multilevel converter (MMC) has been a subject of increasing importance for medium/high-power energy conversion systems. Over the past few years, significant research has been done to address the technical challenges associated with the operation and control of the MMC. In this paper, a general overview of the basics of operation of the MMC along with its control challenges are discussed, and a review of state-of-the-art control strategies and trends is presented. Finally, the applications of the MMC and their challenges are highlighted. [ABSTRACT FROM AUTHOR]