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Model checkers and sequential equivalence checkers have become essential tools for the semiconductor industry in recent years. The Hardware Model Checking Competition (HWMCC) was founded in 2006 with the purpose of intensifying research interest in these technologies, and establishing more of a science behind them. For example, the conference provided a standardized benchmark format, a challenging and diverse set of industrially-relevant public benchmarks, and as a consequence, a significant motivation for additional research to advance the state-of-the-art in solvers for these verification problems. This paper provides an analysis of the tools and benchmarks submitted to the 2014 Hardware Model Checking Competition.

Hardware systems complexity has constantly increased in recent years. Guaranteeing their correctness is a must. Formal verification techniques, such as model checking, now play a major role in industrial environments. Their efficiency in dealing with large sets of properties is crucial. This paper deals with property grouping, decomposition, and coverage in model checking. Property grouping is a valuable solution whenever several properties must be proved for a single model. As such sets may include “easy-to-prove” and/or “similar” properties, grouping can reduce overhead avoiding sub-tasks repetition. Property decomposition, following the divide-and-conquer paradigm, can be effective whenever a property turns out to be “hard-to-prove.” Our contribution is a heuristic property manager, running on top of a multi-engine model checking portfolio, aiming at productivity optimization. We compare different clustering heuristics, and we exploit decomposition strategies for property sub-setting. We also consider the problem of evaluating a coverage measure for properties, used to monitor the “advancement” of the verification task.

Robotic controllers have to execute various complex independent tasks repeatedly. Massive processing power is required by the motion controllers to compute the solution of these computationally intensive algorithms. General-purpose graphics processing unit (GPGPU)-enabled mobile phones can be leveraged for acceleration of these motion controllers. Embedded GPUs can replace several dedicated computing boards by a single powerful and less power-consuming GPU. In this paper, the inverse kinematic algorithm based numeric controllers is proposed and realized using the GPGPU of a handheld mobile device. This work is the extension of a desktop GPU-accelerated robotic controller presented at DAS’16 where the comparative analysis of different sequential and concurrent controllers is discussed. First of all, the inverse kinematic algorithm is sequentially realized using Arduino-Due microcontroller and the field-programmable gate array (FPGA) is used for its parallel implementation. Execution speeds of these controllers are compared with two different GPGPU architectures (Nvidia Quadro K2200 and Nvidia Shield K1 Tablet), programmed with Compute Unified Device Architecture (CUDA) computing language. Experimental data shows that the proposed mobile platform-based scheme outperforms the FPGA by 5× and boasts a 100× speedup over the Arduino-based sequential implementation.

Recent developments in embedded processors have enabled heterogeneous computing on mobile devices using open-access general-purpose computing languages. Following the MPEG CDVS standard, this paper presents an efficient feature computation phase, completely implemented on embedded devices supporting the OpenCL framework. Following our contribution to the MPEG-CDVS standard, we present the new born CDVS detector and its design for multi- core parallel GPUs. We show how to adjust algorithmic choices and implementation details to target the intrinsic characteristics of the embedded platforms selected. We compare our GPU implementation of the ALP keypoint detector with the CPU based implementation of the CDVS standard. We present data on different GPUs showing that our solution is up to 7x faster than the CPU version. To sum up, one of the main feature of our algorithm is to be fast enough to be able to open new visual search scenarios exploiting entire real-time on-board computations with no data transfer

The realization of a deep neural architecture on a mobile platform is challenging, but can open up a number of possibilities for visual analysis applications. A neural network can be realized on a mobile platform by exploiting the computational power of the embedded GPU and simplifying the flow of a neural architecture trained on the desktop workstation or a GPU server. This paper presents an embedded platform-based Italian license plate detection and recognition system using deep neural classifiers. In this work, trained parameters of a highly precise automatic license plate recognition (ALPR) system are imported and used to replicate the same neural classifiers on a Nvidia Shield K1 tablet. A CUDA-based framework is used to realize these neural networks. The flow of the trained architecture is simplified to perform the license plate recognition in real-time. Results show that the tasks of plate and character detection and localization can be performed in real-time on a mobile platform by simplifying the flow of the trained architecture. However, the accuracy of the simplified architecture would be decreased accordingly.